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    <title>DEV Community: Phina Ren</title>
    <description>The latest articles on DEV Community by Phina Ren (@arina).</description>
    <link>https://dev.to/arina</link>
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      <title>DEV Community: Phina Ren</title>
      <link>https://dev.to/arina</link>
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    <item>
      <title>[Note] Osdev: Methods of Task Switching</title>
      <dc:creator>Phina Ren</dc:creator>
      <pubDate>Sun, 07 Dec 2025 12:54:12 +0000</pubDate>
      <link>https://dev.to/arina/note-osdev-methods-of-task-switching-3fco</link>
      <guid>https://dev.to/arina/note-osdev-methods-of-task-switching-3fco</guid>
      <description>&lt;p&gt;To use x86 call gates that allow cross-privilege-level transitions, the TR register must be used.[1]&lt;/p&gt;

&lt;p&gt;There are several approaches to task management using TR:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Hardware task switching: use JMP/CALL TSS:xxx to perform hardware task management and make maximum use of hardware features.&lt;/li&gt;
&lt;li&gt;Software switching (IRET-based): simulate an interrupt return using IRET, combined with LTR, with one TSS per task.&lt;/li&gt;
&lt;li&gt;Software switching (Linux/Windows-style): use a single TSS per CPU core for unified management.&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;Approaches 1 and 2 generally require each process to allocate at least one TSS selector in the GDT, and possibly an additional LDT entry. Because the GDT has a limited size, the third method is the most suitable for multi-tasking operating systems and is also more friendly to paging. However, upgrading directly from approach 1 to approach 3 is somewhat difficult, so approach 2 can be used as a transitional stage. After switching to approach 2, the system becomes more compatible with paging environments.&lt;br&gt;
In contrast, the first two approaches allow you to easily determine the task index using the contents of TR.&lt;/p&gt;

&lt;p&gt;When implementing approach 2, during execution of LTR, the CPU loads the TSS descriptor into the hidden cache. After that, the CPU no longer checks the busy bit in the GDT. Therefore, after clearing the busy bit, the GDT must be reloaded.&lt;/p&gt;

&lt;p&gt;Bochs simulation validation for approach 2:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight plaintext"&gt;&lt;code&gt;(0) [0x00000000ffde] 0010:000000008000ffde (unk. ctxt): ltr cx                    ; 0f00d9
&amp;lt;bochs:54&amp;gt; info gdt
GDT[0x0028]=32-Bit TSS (Busy) at 0x0001c824, length 0x00067
GDT[0x0030]=LDT
GDT[0x0038]=32-Bit TSS (Available) at 0x00101104, length 0x00067
GDT[0x0040]=LDT
↑ before LTR

&amp;lt;bochs:55&amp;gt; n
(0) [0x00000000ffe1] 0010:000000008000ffe1 (unk. ctxt): and byte ptr ds:[edx+5], 0xfd ; 806205fd
&amp;lt;bochs:56&amp;gt; info gdt
GDT[0x0028]=32-Bit TSS (Busy) at 0x0001c824, length 0x00067
GDT[0x0030]=LDT
GDT[0x0038]=32-Bit TSS (Busy) at 0x00101104, length 0x00067
GDT[0x0040]=LDT
↑ after LTR. There are more than one busy tasks

&amp;lt;bochs:57&amp;gt; n
(0) [0x00000000ffe5] 0010:000000008000ffe5 (unk. ctxt): lgdt ds:0x0001613c        ; 0f01153c610100
&amp;lt;bochs:58&amp;gt; info gdt
&amp;lt;bochs:59&amp;gt; n
(0) [0x00000000ffec] 0010:000000008000ffec (unk. ctxt): call .-220  (0x8000ff15)  ; e824ffffff
&amp;lt;bochs:60&amp;gt; info gdt
GDT[0x0028]=32-Bit TSS (Available) at 0x0001c824, length 0x00067
GDT[0x0030]=LDT
GDT[0x0038]=32-Bit TSS (Busy) at 0x00101104, length 0x00067
GDT[0x0040]=LDT
↑ refresh

&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;[1] The TR register points to the TSS, and the TSS contains the stack pointers for different privilege levels. When a call gate causes a change in privilege level, the stack must also be switched according to the privilege level of the new code segment and the stack pointers stored in the TSS, in order to satisfy the rule that &lt;code&gt;SS.DPL = CS.DPL&lt;/code&gt;.&lt;/p&gt;

</description>
      <category>osdev</category>
    </item>
    <item>
      <title>Everyday Special Knowledge of IT</title>
      <dc:creator>Phina Ren</dc:creator>
      <pubDate>Sat, 08 Jul 2023 01:05:32 +0000</pubDate>
      <link>https://dev.to/arina/everyday-special-knowledge-of-it-4baj</link>
      <guid>https://dev.to/arina/everyday-special-knowledge-of-it-4baj</guid>
      <description>&lt;p&gt;&lt;code&gt;If there are errors or questions, just respond~&lt;/code&gt;&lt;/p&gt;

&lt;h3&gt;
  
  
  20230708
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;CPL: &lt;strong&gt;-128&lt;/strong&gt; is an invalid signed char integer, and it is of a trap representation, so &lt;code&gt;SCHAR_MIN&lt;/code&gt; in  does not consider it.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  20230709
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;CPL Practice: In some implementations, &lt;code&gt;free()&lt;/code&gt; will do nothing when the argument is &lt;code&gt;NULL&lt;/code&gt; (normally &lt;code&gt;0&lt;/code&gt;), so if we operate memory directly by &lt;code&gt;malloc()&lt;/code&gt; and &lt;code&gt;free()&lt;/code&gt;, something bad may be invisible for us. Thus, setting the pointer null after &lt;code&gt;free()&lt;/code&gt; may not be a better behaviour for us to debug our projects.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  20230801
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Care about the buffer type! Any short string excluding new-line characters won't be shown on the screen or other devices before the specific points. For example, &lt;code&gt;printf("-"); while(1) sleep(1);&lt;/code&gt; won't make you see the output by default.&lt;/li&gt;
&lt;/ul&gt;

</description>
    </item>
    <item>
      <title>The Uniformed Symbols Project</title>
      <dc:creator>Phina Ren</dc:creator>
      <pubDate>Sat, 03 Jun 2023 13:29:54 +0000</pubDate>
      <link>https://dev.to/arina/the-uniformed-symbols-project-51mp</link>
      <guid>https://dev.to/arina/the-uniformed-symbols-project-51mp</guid>
      <description>&lt;p&gt;This is my first open-source project.&lt;br&gt;
For inline and external symbols; variables, macros and functions.&lt;br&gt;
Based on the official library or conventional styles.&lt;br&gt;
Now, the public codes contain:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;CPL CHR-ARITH (e.g. &lt;em&gt;ChrAdd&lt;/em&gt;) : String Number Arithmetic;&lt;/li&gt;
&lt;li&gt;CPL Inline-form string functions;&lt;/li&gt;
&lt;li&gt;...&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Here are my COVENANT:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;NULL is equivalent to 0 in CPL.&lt;/li&gt;
&lt;li&gt;char(1), short(2), int(4), ... have fixed size. For example, care about this if you develop Intel 8086/8051 applications.&lt;/li&gt;
&lt;li&gt;A normal string ends at 0.&lt;/li&gt;
&lt;li&gt;Little endian in CPL.&lt;/li&gt;
&lt;li&gt;"if(a)" is equivalent to "if(a!=0)", especially, for floating it is "0.0".&lt;/li&gt;
&lt;li&gt;Basic code-set is &lt;em&gt;8086&lt;/em&gt; and in &lt;em&gt;NASM&lt;/em&gt; style.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Welcome you to try and participate in~&lt;/p&gt;

&lt;p&gt;[LICENSE] APACHE LICENSE 2.0&lt;br&gt;
[LINKAGE] &lt;a href="https://github.com/ArinaMgk/unisym"&gt;https://github.com/ArinaMgk/unisym&lt;/a&gt;&lt;br&gt;
Arina June03, Respect for every technology sharer.&lt;/p&gt;

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