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    <title>DEV Community: Fen Liu</title>
    <description>The latest articles on DEV Community by Fen Liu (@fen_liu_8f2abca96163db4e2).</description>
    <link>https://dev.to/fen_liu_8f2abca96163db4e2</link>
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      <title>DEV Community: Fen Liu</title>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2</link>
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    <item>
      <title>SMT Assembly (PCBA) for Beginners</title>
      <dc:creator>Fen Liu</dc:creator>
      <pubDate>Thu, 05 Mar 2026 09:41:44 +0000</pubDate>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2/smt-assembly-pcba-for-beginners-1d2g</link>
      <guid>https://dev.to/fen_liu_8f2abca96163db4e2/smt-assembly-pcba-for-beginners-1d2g</guid>
      <description>&lt;p&gt;If you’re new to hardware, “SMT assembly” can sound like a black box: you send a PCB + BOM somewhere, and magically you get a working board back. In reality, SMT assembly is a repeatable manufacturing process with a few critical steps—and most delays or defects come from a small set of avoidable issues.&lt;/p&gt;

&lt;p&gt;This post explains SMT assembly in plain English and gives you a checklist you can use to evaluate &lt;strong&gt;any&lt;/strong&gt; PCB assembly supplier (whether you’re building 5 prototypes or 5,000 units).&lt;/p&gt;




&lt;h2&gt;
  
  
  What is SMT assembly?
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;SMT (Surface Mount Technology) assembly&lt;/strong&gt; is the process of soldering surface-mount components onto a PCB.&lt;/p&gt;

&lt;p&gt;A typical SMT flow looks like this:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;
&lt;strong&gt;Solder paste printing&lt;/strong&gt; (stencil + paste onto pads)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Pick-and-place&lt;/strong&gt; (placing components)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Reflow soldering&lt;/strong&gt; (oven profile melts paste into joints)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Inspection&lt;/strong&gt; (and often testing)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Rework/repair&lt;/strong&gt; (if needed)
&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;For beginners, the important takeaway is: &lt;strong&gt;SMT quality isn’t luck&lt;/strong&gt;. It’s mostly driven by paste control, placement capability, reflow control, and inspection gates.&lt;/p&gt;




&lt;h2&gt;
  
  
  Why SMT assembly goes wrong (common beginner pain points)
&lt;/h2&gt;

&lt;p&gt;Most first-time PCBA projects run into one of these:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Paste issues&lt;/strong&gt; → tombstoning, opens, weak joints
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Placement issues&lt;/strong&gt; → skew, polarity errors, missing parts
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Reflow issues&lt;/strong&gt; → insufficient wetting, solder bridges, thermal damage
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Hidden-joint issues&lt;/strong&gt; (BGA/QFN) → problems you can’t see without X-ray
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Parts issues&lt;/strong&gt; → wrong alternates, mixed lots, MSL mishandling
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Documentation gaps&lt;/strong&gt; → questions, delays, or build assumptions you didn’t intend
&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;That’s why supplier evaluation should focus less on “we do SMT” and more on &lt;strong&gt;process control + inspection + traceability&lt;/strong&gt;.&lt;/p&gt;




&lt;h2&gt;
  
  
  A practical supplier checklist (use this before you request a quote)
&lt;/h2&gt;

&lt;h3&gt;
  
  
  1) Can they handle your smallest parts and tightest pitch?
&lt;/h3&gt;

&lt;p&gt;Ask specifically:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;smallest passives you’ll use (0402 / 0201 / 01005)&lt;/li&gt;
&lt;li&gt;smallest pitch packages (QFN, BGA/CSP pitch)&lt;/li&gt;
&lt;li&gt;placement accuracy (published ranges are better than vague claims)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If your design has fine pitch, don’t accept “yes” without details.&lt;/p&gt;




&lt;h3&gt;
  
  
  2) Do they control solder paste printing (ideally with SPI)?
&lt;/h3&gt;

&lt;p&gt;Solder paste printing is the #1 driver of many defects.&lt;/p&gt;

&lt;p&gt;Good signs:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;3D SPI (Solder Paste Inspection)&lt;/strong&gt; used as a process gate&lt;/li&gt;
&lt;li&gt;clear paste volume targets/tolerances&lt;/li&gt;
&lt;li&gt;stencil guidance if you’re new (aperture reductions, step stencils, etc.)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If a supplier never mentions paste control, expect variability.&lt;/p&gt;




&lt;h3&gt;
  
  
  3) What inspection gates do they use (AOI, X-ray, etc.)?
&lt;/h3&gt;

&lt;p&gt;A strong inspection chain often looks like:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;SPI&lt;/strong&gt; (paste)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;AOI&lt;/strong&gt; (optical inspection)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;X-ray&lt;/strong&gt; (for hidden joints: BGA/QFN thermal pads)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Functional testing&lt;/strong&gt; (when applicable)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;You don’t always need everything, but you should know what’s included by default and what’s optional.&lt;/p&gt;




&lt;h3&gt;
  
  
  4) Do they track and control reflow profiles?
&lt;/h3&gt;

&lt;p&gt;Reflow isn’t “set it and forget it.” A stable process involves:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;defined profiles per board type&lt;/li&gt;
&lt;li&gt;monitoring/recording (especially for repeat production)&lt;/li&gt;
&lt;li&gt;attention to thermal mass differences (large ground planes, heavy copper, etc.)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re building anything temperature-sensitive, ask how profiles are set and verified.&lt;/p&gt;




&lt;h3&gt;
  
  
  5) Do they offer traceability?
&lt;/h3&gt;

&lt;p&gt;If something fails later, traceability is what turns “we can’t reproduce it” into an actionable root cause.&lt;/p&gt;

&lt;p&gt;Ask about:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;lot tracking (PCB lot, paste lot, component lots)&lt;/li&gt;
&lt;li&gt;serial tracking for assemblies&lt;/li&gt;
&lt;li&gt;inspection logs (AOI results, X-ray criteria, rework history)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Even for prototypes, basic traceability is a strong sign of maturity.&lt;/p&gt;




&lt;h3&gt;
  
  
  6) How do they handle component sourcing and substitutions?
&lt;/h3&gt;

&lt;p&gt;If you’re doing turnkey assembly (supplier sources parts), clarify:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;how alternates are approved&lt;/li&gt;
&lt;li&gt;whether they use authorized distribution channels&lt;/li&gt;
&lt;li&gt;how they treat broker parts (inspection/authentication)&lt;/li&gt;
&lt;li&gt;MSL storage and baking practices&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re doing consigned/kitted builds, clarify:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;acceptable packaging (tape/reel, cut tape rules)&lt;/li&gt;
&lt;li&gt;labeling expectations&lt;/li&gt;
&lt;li&gt;what happens if your kit is short or mislabeled&lt;/li&gt;
&lt;/ul&gt;




&lt;h3&gt;
  
  
  7) What tests do they support?
&lt;/h3&gt;

&lt;p&gt;Testing depends on your product, but ask what’s available:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;basic power-on checks&lt;/li&gt;
&lt;li&gt;boundary scan / JTAG (if relevant)&lt;/li&gt;
&lt;li&gt;programming/flashing&lt;/li&gt;
&lt;li&gt;functional test jig support&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you don’t define a test strategy, you’ll end up “testing in the field,” which is the expensive version.&lt;/p&gt;




&lt;h3&gt;
  
  
  8) Lead time: what’s realistic and what are the assumptions?
&lt;/h3&gt;

&lt;p&gt;“Fast SMT” can be real, but it depends on:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;BOM availability&lt;/li&gt;
&lt;li&gt;DFM/engineering questions resolved&lt;/li&gt;
&lt;li&gt;stencil readiness&lt;/li&gt;
&lt;li&gt;line scheduling&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Ask for a timeline that separates:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;engineering review time&lt;/li&gt;
&lt;li&gt;material procurement time&lt;/li&gt;
&lt;li&gt;build time&lt;/li&gt;
&lt;li&gt;test time (if any)&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  A simple pre-build package checklist (saves a lot of email)
&lt;/h2&gt;

&lt;p&gt;Before you send files to any assembler, make sure you have:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Gerbers / fabrication outputs (or ODB++)&lt;/li&gt;
&lt;li&gt;drill files&lt;/li&gt;
&lt;li&gt;BOM (with manufacturer part numbers)&lt;/li&gt;
&lt;li&gt;pick-and-place (XY) file&lt;/li&gt;
&lt;li&gt;assembly drawing (polarity, special notes)&lt;/li&gt;
&lt;li&gt;any programming/test requirements&lt;/li&gt;
&lt;li&gt;notes on substitutions (allowed/not allowed)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;This reduces “assumptions” and speeds up quoting.&lt;/p&gt;




&lt;h2&gt;
  
  
  Final takeaway
&lt;/h2&gt;

&lt;p&gt;For beginners, the best way to get consistent SMT results is to evaluate suppliers using &lt;strong&gt;process questions&lt;/strong&gt;, not marketing claims:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;paste control (SPI)&lt;/li&gt;
&lt;li&gt;inspection gates (AOI / X-ray)&lt;/li&gt;
&lt;li&gt;reflow control&lt;/li&gt;
&lt;li&gt;traceability&lt;/li&gt;
&lt;li&gt;sourcing discipline&lt;/li&gt;
&lt;li&gt;testing plan&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If a supplier can clearly answer those areas (and document them), you’ll usually have a smoother build.&lt;/p&gt;




&lt;h2&gt;
  
  
  Further reading (capability reference)
&lt;/h2&gt;

&lt;p&gt;If you want an example of a capability page that spells out process steps, inspection gates, and what’s typically included in an SMT service, this is a useful reference to compare against other suppliers:&lt;/p&gt;

&lt;p&gt;&lt;a href="https://hilpcb.com/en/products/smt-assembly/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/products/smt-assembly/&lt;/a&gt;&lt;/p&gt;

</description>
    </item>
    <item>
      <title>SMT Assembly (PCBA) for Beginners: A Practical Checklist Before You Choose a Supplier</title>
      <dc:creator>Fen Liu</dc:creator>
      <pubDate>Thu, 05 Mar 2026 09:38:43 +0000</pubDate>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2/smt-assembly-pcba-for-beginners-a-practical-checklist-before-you-choose-a-supplier-2ed3</link>
      <guid>https://dev.to/fen_liu_8f2abca96163db4e2/smt-assembly-pcba-for-beginners-a-practical-checklist-before-you-choose-a-supplier-2ed3</guid>
      <description>&lt;p&gt;If you’re new to hardware, “SMT assembly” can sound like a black box: you send a PCB + BOM somewhere, and magically you get a working board back. In reality, SMT assembly is a repeatable manufacturing process with a few critical steps—and most delays or defects come from a small set of avoidable issues.&lt;/p&gt;

&lt;p&gt;This post explains SMT assembly in plain English and gives you a checklist you can use to evaluate &lt;strong&gt;any&lt;/strong&gt; PCB assembly supplier (whether you’re building 5 prototypes or 5,000 units).&lt;/p&gt;




&lt;h2&gt;
  
  
  What is SMT assembly?
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;SMT (Surface Mount Technology) assembly&lt;/strong&gt; is the process of soldering surface-mount components onto a PCB.&lt;/p&gt;

&lt;p&gt;A typical SMT flow looks like this:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;
&lt;strong&gt;Solder paste printing&lt;/strong&gt; (stencil + paste onto pads)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Pick-and-place&lt;/strong&gt; (placing components)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Reflow soldering&lt;/strong&gt; (oven profile melts paste into joints)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Inspection&lt;/strong&gt; (and often testing)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Rework/repair&lt;/strong&gt; (if needed)
&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;For beginners, the important takeaway is: &lt;strong&gt;SMT quality isn’t luck&lt;/strong&gt;. It’s mostly driven by paste control, placement capability, reflow control, and inspection gates.&lt;/p&gt;




&lt;h2&gt;
  
  
  Why SMT assembly goes wrong (common beginner pain points)
&lt;/h2&gt;

&lt;p&gt;Most first-time PCBA projects run into one of these:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Paste issues&lt;/strong&gt; → tombstoning, opens, weak joints
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Placement issues&lt;/strong&gt; → skew, polarity errors, missing parts
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Reflow issues&lt;/strong&gt; → insufficient wetting, solder bridges, thermal damage
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Hidden-joint issues&lt;/strong&gt; (BGA/QFN) → problems you can’t see without X-ray
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Parts issues&lt;/strong&gt; → wrong alternates, mixed lots, MSL mishandling
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Documentation gaps&lt;/strong&gt; → questions, delays, or build assumptions you didn’t intend
&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;That’s why supplier evaluation should focus less on “we do SMT” and more on &lt;strong&gt;process control + inspection + traceability&lt;/strong&gt;.&lt;/p&gt;




&lt;h2&gt;
  
  
  A practical supplier checklist (use this before you request a quote)
&lt;/h2&gt;

&lt;h3&gt;
  
  
  1) Can they handle your smallest parts and tightest pitch?
&lt;/h3&gt;

&lt;p&gt;Ask specifically:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;smallest passives you’ll use (0402 / 0201 / 01005)&lt;/li&gt;
&lt;li&gt;smallest pitch packages (QFN, BGA/CSP pitch)&lt;/li&gt;
&lt;li&gt;placement accuracy (published ranges are better than vague claims)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If your design has fine pitch, don’t accept “yes” without details.&lt;/p&gt;




&lt;h3&gt;
  
  
  2) Do they control solder paste printing (ideally with SPI)?
&lt;/h3&gt;

&lt;p&gt;Solder paste printing is the #1 driver of many defects.&lt;/p&gt;

&lt;p&gt;Good signs:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;3D SPI (Solder Paste Inspection)&lt;/strong&gt; used as a process gate&lt;/li&gt;
&lt;li&gt;clear paste volume targets/tolerances&lt;/li&gt;
&lt;li&gt;stencil guidance if you’re new (aperture reductions, step stencils, etc.)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If a supplier never mentions paste control, expect variability.&lt;/p&gt;




&lt;h3&gt;
  
  
  3) What inspection gates do they use (AOI, X-ray, etc.)?
&lt;/h3&gt;

&lt;p&gt;A strong inspection chain often looks like:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;SPI&lt;/strong&gt; (paste)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;AOI&lt;/strong&gt; (optical inspection)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;X-ray&lt;/strong&gt; (for hidden joints: BGA/QFN thermal pads)
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Functional testing&lt;/strong&gt; (when applicable)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;You don’t always need everything, but you should know what’s included by default and what’s optional.&lt;/p&gt;




&lt;h3&gt;
  
  
  4) Do they track and control reflow profiles?
&lt;/h3&gt;

&lt;p&gt;Reflow isn’t “set it and forget it.” A stable process involves:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;defined profiles per board type&lt;/li&gt;
&lt;li&gt;monitoring/recording (especially for repeat production)&lt;/li&gt;
&lt;li&gt;attention to thermal mass differences (large ground planes, heavy copper, etc.)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re building anything temperature-sensitive, ask how profiles are set and verified.&lt;/p&gt;




&lt;h3&gt;
  
  
  5) Do they offer traceability?
&lt;/h3&gt;

&lt;p&gt;If something fails later, traceability is what turns “we can’t reproduce it” into an actionable root cause.&lt;/p&gt;

&lt;p&gt;Ask about:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;lot tracking (PCB lot, paste lot, component lots)&lt;/li&gt;
&lt;li&gt;serial tracking for assemblies&lt;/li&gt;
&lt;li&gt;inspection logs (AOI results, X-ray criteria, rework history)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Even for prototypes, basic traceability is a strong sign of maturity.&lt;/p&gt;




&lt;h3&gt;
  
  
  6) How do they handle component sourcing and substitutions?
&lt;/h3&gt;

&lt;p&gt;If you’re doing turnkey assembly (supplier sources parts), clarify:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;how alternates are approved&lt;/li&gt;
&lt;li&gt;whether they use authorized distribution channels&lt;/li&gt;
&lt;li&gt;how they treat broker parts (inspection/authentication)&lt;/li&gt;
&lt;li&gt;MSL storage and baking practices&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re doing consigned/kitted builds, clarify:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;acceptable packaging (tape/reel, cut tape rules)&lt;/li&gt;
&lt;li&gt;labeling expectations&lt;/li&gt;
&lt;li&gt;what happens if your kit is short or mislabeled&lt;/li&gt;
&lt;/ul&gt;




&lt;h3&gt;
  
  
  7) What tests do they support?
&lt;/h3&gt;

&lt;p&gt;Testing depends on your product, but ask what’s available:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;basic power-on checks&lt;/li&gt;
&lt;li&gt;boundary scan / JTAG (if relevant)&lt;/li&gt;
&lt;li&gt;programming/flashing&lt;/li&gt;
&lt;li&gt;functional test jig support&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you don’t define a test strategy, you’ll end up “testing in the field,” which is the expensive version.&lt;/p&gt;




&lt;h3&gt;
  
  
  8) Lead time: what’s realistic and what are the assumptions?
&lt;/h3&gt;

&lt;p&gt;“Fast SMT” can be real, but it depends on:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;BOM availability&lt;/li&gt;
&lt;li&gt;DFM/engineering questions resolved&lt;/li&gt;
&lt;li&gt;stencil readiness&lt;/li&gt;
&lt;li&gt;line scheduling&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Ask for a timeline that separates:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;engineering review time&lt;/li&gt;
&lt;li&gt;material procurement time&lt;/li&gt;
&lt;li&gt;build time&lt;/li&gt;
&lt;li&gt;test time (if any)&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  A simple pre-build package checklist (saves a lot of email)
&lt;/h2&gt;

&lt;p&gt;Before you send files to any assembler, make sure you have:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Gerbers / fabrication outputs (or ODB++)&lt;/li&gt;
&lt;li&gt;drill files&lt;/li&gt;
&lt;li&gt;BOM (with manufacturer part numbers)&lt;/li&gt;
&lt;li&gt;pick-and-place (XY) file&lt;/li&gt;
&lt;li&gt;assembly drawing (polarity, special notes)&lt;/li&gt;
&lt;li&gt;any programming/test requirements&lt;/li&gt;
&lt;li&gt;notes on substitutions (allowed/not allowed)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;This reduces “assumptions” and speeds up quoting.&lt;/p&gt;




&lt;h2&gt;
  
  
  Final takeaway
&lt;/h2&gt;

&lt;p&gt;For beginners, the best way to get consistent SMT results is to evaluate suppliers using &lt;strong&gt;process questions&lt;/strong&gt;, not marketing claims:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;paste control (SPI)&lt;/li&gt;
&lt;li&gt;inspection gates (AOI / X-ray)&lt;/li&gt;
&lt;li&gt;reflow control&lt;/li&gt;
&lt;li&gt;traceability&lt;/li&gt;
&lt;li&gt;sourcing discipline&lt;/li&gt;
&lt;li&gt;testing plan&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If a supplier can clearly answer those areas (and document them), you’ll usually have a smoother build.&lt;/p&gt;




&lt;h2&gt;
  
  
  Further reading (capability reference)
&lt;/h2&gt;

&lt;p&gt;If you want an example of a capability page that spells out process steps, inspection gates, and what’s typically included in an SMT service, this is a useful reference to compare against other suppliers:&lt;/p&gt;

&lt;p&gt;&lt;a href="https://hilpcb.com/en/products/smt-assembly/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/products/smt-assembly/&lt;/a&gt;&lt;/p&gt;

</description>
    </item>
    <item>
      <title>Keyboard PCB: The Engineering Layer Most Keyboard Discussions Miss</title>
      <dc:creator>Fen Liu</dc:creator>
      <pubDate>Fri, 26 Dec 2025 10:04:13 +0000</pubDate>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2/keyboard-pcb-the-engineering-layer-most-keyboard-discussions-miss-1oed</link>
      <guid>https://dev.to/fen_liu_8f2abca96163db4e2/keyboard-pcb-the-engineering-layer-most-keyboard-discussions-miss-1oed</guid>
      <description>&lt;p&gt;When mechanical keyboards come up in tech discussions, the spotlight usually falls on switches, keycaps, and sound profiles. From an engineering perspective, however, the most critical component often stays in the background: the &lt;strong&gt;Keyboard PCB&lt;/strong&gt;.&lt;/p&gt;

&lt;p&gt;The Keyboard PCB is where physical interaction becomes digital input. It is the layer that translates human intent into software-readable signals, and its design choices quietly shape performance, reliability, and extensibility.&lt;/p&gt;




&lt;h2&gt;
  
  
  What a Keyboard PCB Actually Does
&lt;/h2&gt;

&lt;p&gt;At a system level, a Keyboard PCB is responsible for three core tasks:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Electrically connecting all key switches in a structured matrix&lt;/li&gt;
&lt;li&gt;Allowing the controller to scan inputs accurately and efficiently&lt;/li&gt;
&lt;li&gt;Providing the hardware foundation for firmware and feature expansion&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Although this sounds simple, each of these tasks involves non-trivial engineering trade-offs.&lt;/p&gt;




&lt;h2&gt;
  
  
  Matrix Design: A Classic Engineering Compromise
&lt;/h2&gt;

&lt;p&gt;Most keyboards use a &lt;strong&gt;row–column scanning matrix&lt;/strong&gt; to reduce the number of GPIO pins required on the microcontroller. This approach introduces an immediate challenge: detecting multiple simultaneous key presses without errors.&lt;/p&gt;

&lt;p&gt;A properly designed Keyboard PCB solves this by:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Using diode isolation to prevent ghosting&lt;/li&gt;
&lt;li&gt;Ensuring predictable current paths&lt;/li&gt;
&lt;li&gt;Supporting full N-key rollover under load&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Poor matrix design doesn’t just affect gaming—it shows up as missed inputs, stuck keys, or inconsistent behavior during fast typing.&lt;/p&gt;




&lt;h2&gt;
  
  
  Signal Integrity Is Not Optional
&lt;/h2&gt;

&lt;p&gt;Keyboards may not operate at GHz speeds, but that doesn’t mean signal integrity can be ignored.&lt;/p&gt;

&lt;p&gt;Issues such as:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Poor trace routing&lt;/li&gt;
&lt;li&gt;Inconsistent copper thickness&lt;/li&gt;
&lt;li&gt;Weak grounding strategies&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;can introduce noise, timing inconsistencies, or instability—especially in keyboards that include RGB lighting, wireless modules, or high polling rates.&lt;/p&gt;

&lt;p&gt;This is one reason modern keyboards increasingly rely on &lt;strong&gt;multi-layer PCBs&lt;/strong&gt;. Additional layers allow for:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Dedicated ground planes&lt;/li&gt;
&lt;li&gt;Cleaner power distribution&lt;/li&gt;
&lt;li&gt;More predictable signal paths&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;In compact layouts, this extra routing flexibility becomes essential.&lt;/p&gt;




&lt;h2&gt;
  
  
  Hot-Swap vs Soldered PCBs: A Hardware Decision With UX Impact
&lt;/h2&gt;

&lt;p&gt;Hot-swappable keyboards are popular, but supporting them at the PCB level is not trivial.&lt;/p&gt;

&lt;p&gt;From a design standpoint, hot-swap Keyboard PCBs must handle:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Higher mechanical stress&lt;/li&gt;
&lt;li&gt;Tighter pad tolerances&lt;/li&gt;
&lt;li&gt;Increased component count&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Soldered PCBs, while less beginner-friendly, often offer better mechanical stability and more layout freedom. Neither approach is universally “better”—each represents a different optimization target.&lt;/p&gt;




&lt;h2&gt;
  
  
  Firmware Flexibility Starts With Hardware
&lt;/h2&gt;

&lt;p&gt;Firmware capabilities are often discussed as a software concern, but they are fundamentally constrained by PCB design.&lt;/p&gt;

&lt;p&gt;A Keyboard PCB that supports open firmware ecosystems enables:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Full key remapping&lt;/li&gt;
&lt;li&gt;Multiple layers and macros&lt;/li&gt;
&lt;li&gt;Advanced lighting control&lt;/li&gt;
&lt;li&gt;Custom input logic&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;These features depend on MCU selection, memory availability, and electrical design decisions made long before any firmware is written.&lt;/p&gt;

&lt;p&gt;A deeper explanation of how Keyboard PCB architecture influences mechanical keyboard behavior can be found here:&lt;br&gt;
&lt;a href="https://hilpcb.hashnode.dev/keyboard-pcb-the-core-technology-behind-mechanical-keyboards" rel="noopener noreferrer"&gt;https://hilpcb.hashnode.dev/keyboard-pcb-the-core-technology-behind-mechanical-keyboards&lt;/a&gt;&lt;/p&gt;




&lt;h2&gt;
  
  
  Manufacturing: Why Keyboard PCBs Are More Demanding Than They Look
&lt;/h2&gt;

&lt;p&gt;From a manufacturing perspective, keyboard PCBs sit at an interesting intersection of mechanical and electrical constraints.&lt;/p&gt;

&lt;p&gt;They require:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Precise hole alignment for switches&lt;/li&gt;
&lt;li&gt;Consistent surface finishes for soldering or hot-swap sockets&lt;/li&gt;
&lt;li&gt;Tight process control to ensure uniform key feel and reliability&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Even small deviations can result in misaligned switches or intermittent electrical contact. This is why keyboard PCBs are not as “simple” as they might appear.&lt;/p&gt;

&lt;p&gt;A detailed look at how mechanical keyboard PCBs are designed and manufactured in real-world production can be found here:&lt;br&gt;
&lt;a href="https://hilpcb.com/en/blog/mechanical-keyboard-pcbs/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/blog/mechanical-keyboard-pcbs/&lt;/a&gt;&lt;/p&gt;




&lt;h2&gt;
  
  
  Why Developers Should Care About Keyboard PCBs
&lt;/h2&gt;

&lt;p&gt;From a developer’s perspective, a keyboard is a real-time embedded system:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;High-frequency input scanning&lt;/li&gt;
&lt;li&gt;Strict latency expectations&lt;/li&gt;
&lt;li&gt;Continuous human interaction&lt;/li&gt;
&lt;li&gt;Zero tolerance for failure&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;The Keyboard PCB is the physical layer that makes this system reliable. Understanding it provides useful insight into hardware–software boundaries, embedded constraints, and human-device interaction design.&lt;/p&gt;




&lt;h2&gt;
  
  
  Final Thoughts
&lt;/h2&gt;

&lt;p&gt;The Keyboard PCB is not just a supporting component—it is the architectural core of the keyboard. It defines how inputs are detected, how features scale, and how reliable the system feels over years of use.&lt;/p&gt;

&lt;p&gt;For anyone interested in embedded systems, PCB design, or hardware-aware software development, keyboards are far more interesting once you stop ignoring the PCB.&lt;/p&gt;

</description>
      <category>architecture</category>
      <category>discuss</category>
      <category>learning</category>
    </item>
    <item>
      <title>Designing High-Frequency Circuit Boards That Work the First Time: An Engineer’s Field Guide</title>
      <dc:creator>Fen Liu</dc:creator>
      <pubDate>Wed, 24 Dec 2025 10:00:42 +0000</pubDate>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2/designing-high-frequency-circuit-boards-that-work-the-first-time-an-engineers-field-guide-3dhc</link>
      <guid>https://dev.to/fen_liu_8f2abca96163db4e2/designing-high-frequency-circuit-boards-that-work-the-first-time-an-engineers-field-guide-3dhc</guid>
      <description>&lt;p&gt;High-frequency circuit boards are where RF theory meets manufacturing reality. You can do everything “right” in a schematic and still lose weeks because a board behaves differently than expected: impedance drifts, return loss ripples, insertion loss rises, or channels fail to match phase.&lt;/p&gt;

&lt;p&gt;The fix isn’t a single trick. It’s a workflow: &lt;strong&gt;define the RF targets the way RF behaves (S-parameters), architect the stackup around those targets, design transitions as components, and specify manufacturing and verification clearly.&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;Two practical references (linked once each, per your request):&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;General fabrication process scope: &lt;a href="https://hilpcb.com/en/pcb-manufacturing/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/pcb-manufacturing/&lt;/a&gt;
&lt;/li&gt;
&lt;li&gt;High-frequency PCB capability and focus: &lt;a href="https://hilpcb.com/en/products/high-frequency-pcb/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/products/high-frequency-pcb/&lt;/a&gt;
&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;This guide is intentionally written as a &lt;em&gt;field manual&lt;/em&gt;, not a Q&amp;amp;A: you can skim the section headings while building a board, then dive deeper where you’re stuck.&lt;/p&gt;

&lt;h2&gt;
  
  
  &lt;img src="https://media2.dev.to/dynamic/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F1bjager60eb9lkil30h7.png" alt=" " width="800" height="397"&gt;
&lt;/h2&gt;

&lt;h2&gt;
  
  
  Start with RF requirements, not “50 Ω”
&lt;/h2&gt;

&lt;p&gt;If you write only “50 Ω controlled impedance” on your fab drawing, you’re leaving performance to chance. RF performance is better defined by &lt;strong&gt;measurable transfer behavior&lt;/strong&gt;:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Return loss&lt;/strong&gt; (e.g., S11 &amp;lt; −10 dB from f1 to f2)&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Insertion loss&lt;/strong&gt; (e.g., S21 &amp;lt; X dB for a defined path length)&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Ripple constraints&lt;/strong&gt; (limits on periodic mismatch ripple)&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Phase / group delay&lt;/strong&gt; (especially for arrays, coherent receivers, and timing-sensitive RF paths)&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Channel-to-channel match&lt;/strong&gt; (amplitude/phase tolerance across lanes)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Once you define targets in those terms, every design decision becomes easier to justify.&lt;/p&gt;




&lt;h2&gt;
  
  
  Where boards start behaving “high frequency”
&lt;/h2&gt;

&lt;p&gt;You don’t need mmWave to get burned. A board becomes “high frequency” when:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Trace routing behaves as &lt;strong&gt;transmission lines&lt;/strong&gt; (distributed fields, not lumped wires)&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Return currents&lt;/strong&gt; are constrained to nearby reference planes&lt;/li&gt;
&lt;li&gt;Small geometric changes (etch, dielectric thickness) materially change Z0 or phase&lt;/li&gt;
&lt;li&gt;Vias and connectors stop being “interconnect” and become &lt;strong&gt;discontinuities&lt;/strong&gt;
&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;A useful mental model: at RF, your PCB is a &lt;strong&gt;waveguide with manufacturing tolerances&lt;/strong&gt;.&lt;/p&gt;




&lt;h2&gt;
  
  
  Materials: what actually matters (and what doesn’t)
&lt;/h2&gt;

&lt;h3&gt;
  
  
  The three material properties that most often decide success
&lt;/h3&gt;

&lt;ol&gt;
&lt;li&gt;
&lt;strong&gt;Dielectric loss (Df)&lt;/strong&gt;
Your insertion loss budget cares. Long lines and high bands care a lot.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Dielectric constant stability (Dk vs frequency/temperature/lot)&lt;/strong&gt;
Your phase and impedance consistency care. Arrays and coherent systems care a lot.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Mechanical behavior during fabrication&lt;/strong&gt;
Some laminates drill, plate, and laminate differently. That changes yields and repeatability.&lt;/li&gt;
&lt;/ol&gt;

&lt;h3&gt;
  
  
  Stop treating datasheets as “the truth”
&lt;/h3&gt;

&lt;p&gt;Material Dk/Df can vary by:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Frequency and test method&lt;/li&gt;
&lt;li&gt;Temperature and humidity&lt;/li&gt;
&lt;li&gt;Production lot and resin content&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re designing near limits, ask for:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;The relevant measurement frequency range&lt;/li&gt;
&lt;li&gt;The expected tolerance (lot-to-lot) and recommended stackup practice&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Do you need PTFE?
&lt;/h3&gt;

&lt;p&gt;Not always. PTFE is one route to low loss, but your decision should be based on:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Allowed insertion loss for your &lt;strong&gt;actual line lengths&lt;/strong&gt;
&lt;/li&gt;
&lt;li&gt;Phase stability requirements&lt;/li&gt;
&lt;li&gt;Cost, availability, and manufacturing complexity&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;A hybrid approach (low-loss RF layers plus conventional layers elsewhere) often works well &lt;strong&gt;if transitions and references are designed intentionally&lt;/strong&gt;.&lt;/p&gt;




&lt;h2&gt;
  
  
  Stackup architecture: the “make or break” decision
&lt;/h2&gt;

&lt;p&gt;For high-frequency circuit boards, the stackup is not paperwork. It’s the RF structure.&lt;/p&gt;

&lt;h3&gt;
  
  
  Choose a routing topology first
&lt;/h3&gt;

&lt;p&gt;Ask:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Do RF paths need to be on the outer layer for connectors/antennas/probing?&lt;/li&gt;
&lt;li&gt;Do you need shielding and isolation (inner-layer stripline)?&lt;/li&gt;
&lt;li&gt;Will CPW help confine fields around launches?&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Then choose a line type per use case
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Microstrip&lt;/strong&gt;: great for launches and antennas; more sensitive to solder mask and environment.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Stripline&lt;/strong&gt;: stable and shielded; demands tight lamination control.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Grounded CPW&lt;/strong&gt;: strong field control and excellent launches; sensitive to gap/etch.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Stackup detail that &lt;em&gt;silently&lt;/em&gt; breaks designs
&lt;/h3&gt;

&lt;p&gt;The #1 reason your measured impedance isn’t your simulated impedance is usually:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;Post-lamination dielectric thickness differs from nominal&lt;/strong&gt;&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;So don’t treat thickness as a suggestion. Treat it as a controlled target with tolerances.&lt;/p&gt;




&lt;h2&gt;
  
  
  Controlled impedance: how it fails in production
&lt;/h2&gt;

&lt;p&gt;Impedance is an outcome of:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Dielectric thickness after press&lt;/li&gt;
&lt;li&gt;Finished trace width after etch&lt;/li&gt;
&lt;li&gt;Copper thickness including plating&lt;/li&gt;
&lt;li&gt;Solder mask presence/thickness (outer layers)&lt;/li&gt;
&lt;li&gt;Dk variation&lt;/li&gt;
&lt;li&gt;Geometry registration (especially CPW gaps)&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  A production-friendly way to specify impedance
&lt;/h3&gt;

&lt;p&gt;Instead of “50 Ω,” provide:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Structure type (microstrip/stripline/CPW)&lt;/li&gt;
&lt;li&gt;Layer and reference planes&lt;/li&gt;
&lt;li&gt;Z0 target and tolerance&lt;/li&gt;
&lt;li&gt;Solder mask condition (on/off) for that structure&lt;/li&gt;
&lt;li&gt;Coupon requirement + reporting expectation&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;This gives the fabricator the knobs needed to hit your target.&lt;/p&gt;




&lt;h2&gt;
  
  
  Loss budgeting: separate the three loss buckets
&lt;/h2&gt;

&lt;p&gt;When a path is “too lossy,” teams often blame the laminate immediately. That’s often wrong. Loss typically comes from three buckets:&lt;/p&gt;

&lt;h3&gt;
  
  
  1) Dielectric loss (Df-driven)
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Scales with frequency and length&lt;/li&gt;
&lt;li&gt;Dominant for long routes in moderate bands&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  2) Conductor loss (skin effect + copper roughness)
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Can dominate earlier than expected as frequency rises&lt;/li&gt;
&lt;li&gt;Rough copper increases effective resistance&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  3) Discontinuity / transition loss (mismatch)
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Vias, connector launches, layer changes, plane breaks&lt;/li&gt;
&lt;li&gt;Shows up as ripple and degraded return loss&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;&lt;strong&gt;Actionable takeaway:&lt;/strong&gt; You can buy a low-Df laminate and still fail the loss target if your launches and vias are poor.&lt;/p&gt;




&lt;h2&gt;
  
  
  Return paths: the fastest way to create a “mystery problem”
&lt;/h2&gt;

&lt;p&gt;At high frequency, the signal and its return are inseparable. Common failure patterns:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;RF trace crosses a reference split/void → return path detours → radiation + coupling&lt;/li&gt;
&lt;li&gt;Layer change without stitching → return current forced into a loop → ripple and EMI&lt;/li&gt;
&lt;li&gt;“Ground” treated as a net, not a plane system → unpredictable current paths&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  The discipline that prevents most RF board failures
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Keep reference planes continuous under RF routes&lt;/li&gt;
&lt;li&gt;When references change, add &lt;strong&gt;nearby stitching vias&lt;/strong&gt;
&lt;/li&gt;
&lt;li&gt;Avoid routing over openings, slots, or cutouts&lt;/li&gt;
&lt;li&gt;Treat ground around launches (CPW/via fences) as part of the transmission line&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  Vias and stubs: when “just connect it” becomes a resonator
&lt;/h2&gt;

&lt;p&gt;A via isn’t a wire at RF. It’s an inductive element with capacitive interactions and (often) an unwanted stub.&lt;/p&gt;

&lt;h3&gt;
  
  
  Stub problems you can recognize in measurement
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Sharp notches or periodic ripple in S11/S21 at certain bands&lt;/li&gt;
&lt;li&gt;Sensitivity to small layout changes near vias&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Mitigation options
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Minimize layer changes on critical RF paths&lt;/li&gt;
&lt;li&gt;Use via transitions designed with appropriate antipads and reference continuity&lt;/li&gt;
&lt;li&gt;Consider backdrilling when through-via stubs are electrically significant&lt;/li&gt;
&lt;li&gt;Validate critical via transitions with EM simulation at the highest band&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  Connector launches: treat the footprint as a component
&lt;/h2&gt;

&lt;p&gt;If your connector launch is poor, everything downstream looks bad—even if the line is perfect.&lt;/p&gt;

&lt;p&gt;What a good launch does:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Maintains reference continuity (return path stays close)&lt;/li&gt;
&lt;li&gt;Transitions field shape smoothly (pad/antipad/taper geometry matters)&lt;/li&gt;
&lt;li&gt;Uses appropriate ground stitching around the launch&lt;/li&gt;
&lt;li&gt;Avoids uncontrolled cavities and abrupt plane cutbacks&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;At higher bands, “vendor footprint” is a starting point—not a guarantee.&lt;/p&gt;




&lt;h2&gt;
  
  
  Solder mask and surface finish: the subtle performance levers
&lt;/h2&gt;

&lt;h3&gt;
  
  
  Solder mask
&lt;/h3&gt;

&lt;p&gt;On outer-layer RF lines, solder mask can:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Shift effective impedance&lt;/li&gt;
&lt;li&gt;Increase loss&lt;/li&gt;
&lt;li&gt;Add variability if thickness isn’t controlled&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you need stability, choose a policy:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Mask keepout over critical RF lines, &lt;strong&gt;or&lt;/strong&gt;
&lt;/li&gt;
&lt;li&gt;Model mask explicitly and hold thickness/coverage consistent&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Surface finish
&lt;/h3&gt;

&lt;p&gt;Finish selection is usually driven by assembly and reliability, but at high frequency it can influence surface conduction behavior. If you’re optimizing loss, include finish in the design discussion rather than treating it as procurement-only.&lt;/p&gt;




&lt;h2&gt;
  
  
  Manufacturing notes that prevent re-spins
&lt;/h2&gt;

&lt;p&gt;Here’s the content that most often reduces “it doesn’t match simulation” outcomes:&lt;/p&gt;

&lt;h3&gt;
  
  
  Stackup and structures
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Full stackup table with dielectric thickness targets (post-press)&lt;/li&gt;
&lt;li&gt;Copper thickness assumptions (base + plating expectation)&lt;/li&gt;
&lt;li&gt;Controlled impedance structure definitions and tolerance&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Verification artifacts
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Impedance coupons per panel (or defined sampling plan)&lt;/li&gt;
&lt;li&gt;Reporting format and acceptance criteria&lt;/li&gt;
&lt;li&gt;Traceability (panel/lot ID tied to results)&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Process-sensitive constraints
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Minimum line/space &lt;em&gt;with margin&lt;/em&gt; (don’t live on the limit)&lt;/li&gt;
&lt;li&gt;CPW gap control expectations&lt;/li&gt;
&lt;li&gt;Any special processes (backdrill, filled vias, via-in-pad)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you need a broad overview of manufacturing steps and typical capability categories, the manufacturing overview reference above can help: &lt;a href="https://hilpcb.com/en/pcb-manufacturing/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/pcb-manufacturing/&lt;/a&gt; . If you’re specifically aligning with RF/high-frequency production focus, the high-frequency PCB reference is here: &lt;a href="https://hilpcb.com/en/products/high-frequency-pcb/" rel="noopener noreferrer"&gt;https://hilpcb.com/en/products/high-frequency-pcb/&lt;/a&gt; .&lt;/p&gt;




&lt;h2&gt;
  
  
  A repeatable “first-pass success” workflow
&lt;/h2&gt;

&lt;p&gt;If you want fewer surprises, run this sequence:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;
&lt;strong&gt;Define RF metrics&lt;/strong&gt; (S-parameters, loss/phase targets) for the actual path length.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Pick a routing topology&lt;/strong&gt; (outer vs inner layers, measurement needs, shielding needs).&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Co-design the stackup&lt;/strong&gt; so dielectric thickness targets are manufacturable.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Freeze controlled-impedance structures&lt;/strong&gt; (including solder mask condition).&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Design transitions intentionally&lt;/strong&gt; (launches, vias, reference changes).&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Add verification&lt;/strong&gt; (coupons, reporting, traceability) and plan measurement early.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Prototype with margin&lt;/strong&gt; (tuning pads, optional matching, debug access).&lt;/li&gt;
&lt;/ol&gt;




&lt;h2&gt;
  
  
  Closing: the board is part of the RF circuit
&lt;/h2&gt;

&lt;p&gt;High-frequency circuit boards succeed when they’re treated as part of the RF design, not just the substrate that holds parts. The most reliable builds come from aligning &lt;strong&gt;requirements → stackup → transitions → manufacturing controls → verification&lt;/strong&gt; into a single chain with no guesswork.&lt;/p&gt;

&lt;p&gt;If you’re preparing a quote package, the fastest way to improve outcomes is to include a controlled-impedance structure list, a stackup target table, and clear test/report expectations—so the fabricator can hit your RF intent, not just “make a board that connects.”&lt;/p&gt;

</description>
      <category>design</category>
      <category>hardware</category>
      <category>productivity</category>
    </item>
    <item>
      <title>Solar PCBs for Engineers: A Practical Guide to Designing and Building Boards That Survive the Outdoors</title>
      <dc:creator>Fen Liu</dc:creator>
      <pubDate>Fri, 19 Dec 2025 07:17:17 +0000</pubDate>
      <link>https://dev.to/fen_liu_8f2abca96163db4e2/solar-pcbs-for-engineers-a-practical-guide-to-designing-and-building-boards-that-survive-the-ji3</link>
      <guid>https://dev.to/fen_liu_8f2abca96163db4e2/solar-pcbs-for-engineers-a-practical-guide-to-designing-and-building-boards-that-survive-the-ji3</guid>
      <description>&lt;p&gt;Solar electronics isn’t just “power electronics with a green label.” If your PCB ends up inside a microinverter, optimizer, combiner box, or storage controller, it’s going to live a tough life: heat, humidity, dust, transients, and years of continuous operation.&lt;/p&gt;

&lt;p&gt;This post is written for dev.to readers who like practical engineering notes—less marketing, more “what breaks and how to prevent it.”&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media2.dev.to/dynamic/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F0mynzmyk59urufn9z6ga.png" class="article-body-image-wrapper"&gt;&lt;img src="https://media2.dev.to/dynamic/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F0mynzmyk59urufn9z6ga.png" alt=" " width="800" height="800"&gt;&lt;/a&gt;&lt;/p&gt;




&lt;h2&gt;
  
  
  1) Solar PCBs: where they actually show up
&lt;/h2&gt;

&lt;p&gt;Even if the PV module is the star, the electronics around it do the heavy lifting:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Microinverters / string inverters&lt;/strong&gt;: DC→AC conversion, control loops, protection, communications&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Power optimizers (MLPE)&lt;/strong&gt;: per-panel regulation and monitoring&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Combiner boxes / junction boxes&lt;/strong&gt;: sensing + surge protection + monitoring&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Battery storage / BMS controllers&lt;/strong&gt;: balancing, safety logic, telemetry&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Data/IoT gateways&lt;/strong&gt;: RS485/CAN/LTE/Wi-Fi, sensor acquisition, remote management&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Most failures people blame on “the inverter” often trace back to a few PCB-level issues.&lt;/p&gt;




&lt;h2&gt;
  
  
  2) The real enemy: thermal cycling (not just high temperature)
&lt;/h2&gt;

&lt;p&gt;A board can survive a single hot day. The problem is what happens after &lt;strong&gt;thousands of hot/cold cycles&lt;/strong&gt;:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;solder joints slowly crack (especially on large packages, transformers, connectors)&lt;/li&gt;
&lt;li&gt;vias fatigue when hot spots expand/contract repeatedly&lt;/li&gt;
&lt;li&gt;components drift out of spec faster than expected&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;&lt;strong&gt;Design moves that help:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Put hot components where heat can actually escape (not boxed in by tall parts and plastics).&lt;/li&gt;
&lt;li&gt;Use large copper areas as heat spreaders.&lt;/li&gt;
&lt;li&gt;Stitch thermal vias under power devices (and actually connect them to meaningful copper).&lt;/li&gt;
&lt;li&gt;Think about the enclosure: metal contact points and airflow paths matter.&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  3) High current routing: “copper thickness” is not the whole story
&lt;/h2&gt;

&lt;p&gt;Solar power boards often carry real current—enough to make small layout mistakes expensive.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Common mistakes:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;narrow neck-downs on high-current traces&lt;/li&gt;
&lt;li&gt;connectors or terminal blocks underrated for continuous load&lt;/li&gt;
&lt;li&gt;insufficient via count when transitioning layers&lt;/li&gt;
&lt;li&gt;long loops that increase EMI and heat&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;&lt;strong&gt;Better approach:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Treat current paths as a “power plane” design problem, not just “make the trace wider.”&lt;/li&gt;
&lt;li&gt;Use multiple vias in parallel for layer transitions.&lt;/li&gt;
&lt;li&gt;Keep current loops short and returns intentional.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;&lt;a href="https://media2.dev.to/dynamic/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fc96rjkek4pwdizuy3vns.png" class="article-body-image-wrapper"&gt;&lt;img src="https://media2.dev.to/dynamic/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fc96rjkek4pwdizuy3vns.png" alt=" " width="631" height="570"&gt;&lt;/a&gt;&lt;/p&gt;




&lt;h2&gt;
  
  
  4) Moisture + contamination: the slowest, nastiest failure mode
&lt;/h2&gt;

&lt;p&gt;Outdoor electronics rarely fail instantly from moisture. They fail slowly from a combo of:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;humidity&lt;/li&gt;
&lt;li&gt;residues (flux, ionic contamination)&lt;/li&gt;
&lt;li&gt;dust/salt/pollution&lt;/li&gt;
&lt;li&gt;voltage stress → leakage paths&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Symptoms can look like “software bugs”:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;random resets&lt;/li&gt;
&lt;li&gt;comms dropouts&lt;/li&gt;
&lt;li&gt;strange ADC readings&lt;/li&gt;
&lt;li&gt;phantom alarms&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;&lt;strong&gt;How teams reduce risk:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;define cleanliness requirements (don’t leave it vague)&lt;/li&gt;
&lt;li&gt;decide early: conformal coating vs potting vs sealed enclosure&lt;/li&gt;
&lt;li&gt;keep high-voltage spacing and coating strategy aligned (coating is not a substitute for spacing)&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  5) Surges and lightning: layout determines whether protection works
&lt;/h2&gt;

&lt;p&gt;Protection parts (MOV/TVS/GDT) are only half the story. If the layout is wrong, the surge finds another path.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Layout rules that matter:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;place protection close to the entry point&lt;/li&gt;
&lt;li&gt;keep the protection path short and low inductance&lt;/li&gt;
&lt;li&gt;avoid routing sensitive signals near high-energy discharge paths&lt;/li&gt;
&lt;li&gt;design clear return paths for surge currents&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re debugging “mysterious failures after storms,” this is usually where you end up.&lt;/p&gt;




&lt;h2&gt;
  
  
  6) DFM/DFT for solar: plan for repeatability, not just prototypes
&lt;/h2&gt;

&lt;p&gt;Solar hardware lives in the world of &lt;strong&gt;production variability&lt;/strong&gt;. A single “golden prototype” means nothing if production shifts.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;If you want stable field performance, lock down:&lt;/strong&gt;&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;soldering profiles (especially for heavy copper / large thermal mass boards)&lt;/li&gt;
&lt;li&gt;inspection coverage (AOI isn’t enough for hidden joints; consider X-ray where needed)&lt;/li&gt;
&lt;li&gt;functional test strategy (power-up, load behavior, comms)&lt;/li&gt;
&lt;li&gt;optional burn-in for early failure screening&lt;/li&gt;
&lt;/ul&gt;




&lt;h2&gt;
  
  
  7) A short “handoff checklist” before you quote PCBs/PCBA
&lt;/h2&gt;

&lt;p&gt;When you send files to a manufacturer, include context—not just Gerbers:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;target environment (indoor/outdoor, coastal, high UV, high altitude)&lt;/li&gt;
&lt;li&gt;expected temperature hotspots&lt;/li&gt;
&lt;li&gt;max current on key nets&lt;/li&gt;
&lt;li&gt;high voltage zones &amp;amp; creepage/clearance requirements&lt;/li&gt;
&lt;li&gt;coating/potting expectations&lt;/li&gt;
&lt;li&gt;test requirements (AOI, X-ray, ICT, functional, burn-in)&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;It saves time, reduces misalignment, and prevents “surprises” late in the cycle.&lt;/p&gt;




&lt;h2&gt;
  
  
  8) Manufacturing note: why an engineering-friendly supplier matters
&lt;/h2&gt;

&lt;p&gt;For solar electronics, reliability is the product. That often means you want a partner who can handle both &lt;strong&gt;PCB fabrication and assembly&lt;/strong&gt; and is comfortable discussing the details above (thermal, coating, test, consistency).&lt;/p&gt;

&lt;p&gt;If you’re evaluating options, one manufacturer that supports PCB + PCBA for solar-related builds is &lt;strong&gt;HILPCB (hilpcb.com)&lt;/strong&gt;. For many projects, the value isn’t just “making boards”—it’s reducing handoff risk and keeping production consistent across batches.&lt;/p&gt;




&lt;h2&gt;
  
  
  Closing: Solar hardware should be boring (in the best way)
&lt;/h2&gt;

&lt;p&gt;The goal isn’t flashy features. The goal is:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;stable power conversion&lt;/li&gt;
&lt;li&gt;clean telemetry&lt;/li&gt;
&lt;li&gt;no field returns&lt;/li&gt;
&lt;li&gt;years of uptime in ugly weather&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If you’re working on a solar inverter/optimizer/BMS or monitoring device, what’s been the biggest reliability headache so far—heat, surges, moisture, or production variability?&lt;/p&gt;

</description>
      <category>design</category>
      <category>iot</category>
      <category>tutorial</category>
    </item>
  </channel>
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