DEV Community: Lucas Ding

What Actually Happens Between "Export Gerbers" and a Physical PCB Showing Up at Your Door

Lucas Ding — Mon, 27 Jul 2026 02:48:00 +0000

If you've ever designed a board in KiCad, EasyEDA, or Altium, clicked "Export Gerbers," uploaded a zip file to a fab house, and then a couple weeks later a small padded envelope showed up with actual copper-and-fiberglass boards inside — you've probably wondered, at least once, what happens in between. What does a design file actually turn into on a factory floor, and why does it take days instead of minutes?

I went down this rabbit hole recently while debugging why a batch of boards came back with a slightly different impedance than I'd simulated. Understanding the fabrication pipeline turned out to be useful for more than just satisfying curiosity — it changed how I write my design rule checks. Here's the short version, from a developer's point of view rather than a process engineer's.

Your Gerbers are a set of 2D stencils, not a 3D model

This is the part that took me longest to internalize: a PCB isn't fabricated the way you'd picture a 3D print. There's no printer that magically deposits copper in the right places layer by layer. Instead, each layer of your board starts as full-sheet copper, and the fab removes copper according to your Gerber file for that layer — closer to subtractive manufacturing than additive.

Roughly, the pipeline looks like:

Inner layers first. For a multilayer board, the internal copper layers get imaged and etched before anything is stacked. Whatever routing you buried on an inner layer is committed at this stage — no going back and rerouting after this point.
Lamination. The imaged inner layers get pressed together under heat with a bonding material (prepreg) sandwiched between them, along with the outer copper foils. This is where your stackup — the thing you probably just picked from a dropdown in your CAD tool — actually becomes physical.
Drilling. Every via and through-hole gets drilled through the stack. Small vias are usually laser-drilled; larger through-holes are mechanically drilled. This step is also why minimum via size and aspect ratio limits exist — a hole that's too deep relative to its diameter is genuinely hard to plate reliably.
Plating. Copper is deposited onto the drilled hole walls so that a via actually connects the layers it's supposed to connect, rather than just being an empty hole through fiberglass.
Outer layer imaging and etching. Same process as step 1, but for the top and bottom copper.
Solder mask, silkscreen, surface finish. The green (or whatever color) coating goes on, your reference designators get printed, and a finish like ENIG, HASL, or OSP is applied to the exposed copper pads so they don't oxidize before you can solder to them.
Electrical test. Every board gets tested for opens and shorts — usually with a flying probe tester for small batches, or a fixed test fixture for high volume — before it ships.

None of this is exotic if you already know it, but it explains a lot of the DRC rules your CAD tool nags you about: minimum trace/space isn't arbitrary, it's a function of what the etching process can actually resolve; minimum drill size and annular ring aren't arbitrary either, they're tied to what can reliably be laser- or mechanically-drilled and then plated.

Why aspect ratio and via size actually matter to you

This is the part that bit me. I'd routed a design with some tight vias to save space, satisfied my CAD tool's default DRC, and sent it off — only to have the fab flag a manufacturability issue on a couple of the smaller vias in a thicker section of the board. The default DRC rules in most CAD tools are conservative-but-generic; they don't necessarily match a specific fab's actual capability for your specific board thickness.

The practical fix, and the thing I do now on every board before ordering:

Run your Gerbers through an actual DFM (design-for-manufacturability) check, not just a viewer. A viewer shows you what the board looks like; a DFM tool checks things like clearance violations, drill-to-copper spacing, and acid trap geometry against a real process capability, not just your CAD tool's generic default rules.
If you're doing anything with buried or blind vias (common on denser HDI-style boards), ask explicitly about aspect ratio limits and whether laser drilling for microvias is done in-house — this varies a lot between fabs and directly affects whether your stackup is even manufacturable as drawn.
Double-check your surface finish choice against your components. ENIG is the safer default for fine-pitch parts; OSP is cheaper but has a shorter shelf life before you need to solder; HASL is fine for through-hole-heavy boards but can be uneven under very fine-pitch SMD pads.

Prototype vs. production is a different optimization, not just a quantity slider

One thing that surprised me: a fab that's great for 10-piece prototype turnarounds isn't automatically the right choice once you're ordering 5,000 units. Quick-turn prototyping is optimized for speed on a small batch — getting a handful of boards back in a day or two so you can validate a design. Volume production is optimized for consistency and cost per unit across much larger panel runs, with more incoming-material inspection and statistical process control layered in. Some shops do both well in-house; others quietly subcontract one side of it. If you expect to go from prototype to production with the same vendor, it's worth asking directly whether both stages actually happen on their own floor.

4 Cool Open-Source Hardware Projects to Spark Your Next Build

Lucas Ding — Thu, 09 Jul 2026 09:24:56 +0000

tags: hardware, iot, opensource, electronics

As software developers, many of us reach a point where writing code inside a virtual environment isn't quite enough—we want to manipulate the physical world. Whether it's blinking an LED via an ESP32, visualizing audio frequencies on a desk display, or building custom bench tools, hardware hacking is easily one of the most rewarding rabbit holes to fall down.

At NextPCB, we’ve spent the past few years supporting the open-source hardware community by sponsoring independent creators, makers, and embedded engineers to help turn their digital schematics into real, physical circuit boards.

If you’re looking for inspiration for your next weekend project, here are four curated roundups of real-world projects featuring open-source files, schematics, and design breakdowns.

1. Retro Tech & Nostalgic Geek Culture Builds 🎮

There’s something uniquely satisfying about recreating classic tech using modern hardware components. From custom hand-held arcade consoles to retro synth modules and glowing mechanical displays, retro builds combine aesthetic nostalgia with serious embedded engineering.

These projects aren't just for show—they showcase clever power management, compact multi-layer PCB routing, and custom display interfaces.

👉 Check out the project breakdowns & schematics:

8 Retro Geek Culture PCB Projects: Open-Source Gerbers & Schematics

2. Smart Audio & Interactive Visual Displays 🎵

Audio reactive electronics bridge the gap between digital signal processing (DSP) and hardware UI/UX. Think custom spectrum analyzers, RGB LED matrix drivers, and tactile smart knobs that update in real-time.

Building custom audio hardware requires paying extra attention to noise isolation, clean power delivery, and signal integrity—making these projects fantastic learning material for intermediate hardware devs.

👉 Explore the audio & display designs:

Smart Audio & Interactive Display PCBs: Open-Source Design Guide

3. DIY Power & Precision Lab Equipment ⚡

Every maker's workbench needs reliable gear. But why buy off-the-shelf test equipment when you can build customized version optimized for your specific projects?

From variable benchtop power supplies to micro-current measurement nodes and electronic loads, building your own lab tools is one of the best ways to master fundamental electronics, analog circuitry, and thermal design.

👉 Dive into the lab tool designs:

DIY Power & Precision Tool PCBs: Open-Source Lab Equipment Designs

4. Real-World IoT & Environmental Monitoring Nodes 🌐

IoT projects often get stuck in the prototype phase on breadboards with dangling jumper wires. Moving from a messy prototype to a dedicated custom PCB is what turns a quick experiment into a reliable, low-power sensor node that can run outdoors for months.

This collection focuses on practical telemetry: environmental sensing, wireless mesh nodes, and low-power ESP32/LoRa architectures with real-world deployment considerations.

👉 Inspect the IoT monitoring projects:

Real-World IoT Monitoring PCB Projects: Sensor Node Schematics & Gerbers

Giving Back to the Maker Community

The hardware community thrives when schematics, Gerber files, and Bill of Materials (BOM) are shared freely. By sponsoring these projects, NextPCB aims to make hardware manufacturing accessible to developers who want to bring their ideas to life without needing a massive production budget.

💬 Over to You

Have you ever turned one of your software side-projects into a physical PCB build? Which of these four categories are you most tempted to build first?

Drop your thoughts or share your current hardware setups in the comments below!

Why MLCC Lead Times Are Blowing Up in 2026 (And How to Design Around It)

Lucas Ding — Wed, 01 Jul 2026 09:48:26 +0000

If you've submitted a BOM for quoting recently and gotten a lead time that made you do a double take, you're not imagining things. Passive component sourcing in 2026 is tighter than it's been in a few years — and MLCCs are the epicenter.

I want to break down why this is happening, which component categories are actually at risk, and — more importantly — what you can do at the design stage to make your board less vulnerable to it. This isn't a "just wait it out" post; there are concrete layout and BOM decisions that meaningfully change your exposure.

Why now?

Three demand sources are converging on the same MLCC/inductor capacity that used to be dominated by consumer electronics:

AI server infrastructure — GPU power delivery networks alone can chew through hundreds of decoupling capacitors per board, and hyperscaler order volumes dwarf typical consumer runs.
EVs — automotive-grade passives (AEC-Q200, X8R/X7R) come from a narrower qualified supplier base, so even modest EV growth disproportionately tightens that segment.
Renewables/grid infrastructure — pulling on high-voltage inductors and power resistors.

On the supply side, new MLCC/ferrite production lines take 12–24 months to come online from the capital decision. Semiconductor fabs can reallocate capacity relatively fast; passive component fabs can't. That structural lag is the real reason lead times stretch out faster than they recover.

Which parts are actually at risk

Not everything is equally exposed:

Category	Normal LT	2026 Tight-Market LT	Exposure
Commercial MLCC (X7R, 0402/0603)	4–8 wks	8–16 wks	Moderate–High
High-density MLCC (0201, high µF)	6–10 wks	16–26 wks	High
Automotive MLCC (AEC-Q200, X8R)	10–14 wks	20–30+ wks	Very High
C0G/NP0 (precision/timing)	4–8 wks	6–12 wks	Low–Moderate
Power inductors (shielded, low DCR)	6–10 wks	12–20 wks	Moderate–High
Chip resistors	2–6 wks	4–8 wks	Low

Chip resistors are the least affected — manufacturing capacity is less concentrated and swapping vendors doesn't trigger a lot of requalification. High-density small-case MLCCs and automotive-grade parts are the ones to watch.

Design-stage mitigations that actually help

The cheapest fix is always the one that happens before layout is frozen:

Specify parameter ranges, not exact part numbers. If the circuit tolerates it, give sourcing a capacitance/voltage/tolerance window instead of locking a single manufacturer's SKU.
Don't over-spec. Using C0G where X7R would do, or ±1% where ±5% is fine, needlessly shrinks your supplier pool. Save tight specs for nets that actually need them (timing, precision sense).
Prefer standard case sizes. A 0402 X7R in a common value has dramatically more second sources than a 0201 high-µF part pushed to the edge of the dielectric's spec.
Dual-footprint critical passives where board area allows (e.g. pads that accept both 0402 and 0603) so a substitution doesn't require a respin.
Flag single-source parts at design review, not after the BOM freezes — especially automotive-qualified or RF-specific components.

On the sourcing side

Submitting a complete BOM early lets a manufacturing partner flag long-lead items before they become a kitting-stage surprise. For low-volume/prototype runs, a small inventory buffer on known long-lead passives is cheap insurance against a handful of missing caps halting a whole build.

I wrote a longer version of this with a full lead-time reference table, a supply-resilient design checklist, and a section on how manufacturing partners can mitigate shortage exposure on their end (local component warehousing, incoming inspection for parts sourced under time pressure, etc.) — if you want the full breakdown: Passive Component Shortage 2026: MLCC Lead Times, Supply Chain Risk and Design Mitigation

Curious how others are handling this — are you dual-sourcing at design time, or mostly reacting once distributor stock runs out?