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      <title>Half and Full adder. Half and Full subtractor</title>
      <dc:creator>MENUA</dc:creator>
      <pubDate>Sun, 22 Sep 2024 22:25:10 +0000</pubDate>
      <link>https://dev.to/menua_sim/half-and-full-adder-half-and-full-subtractor-3igl</link>
      <guid>https://dev.to/menua_sim/half-and-full-adder-half-and-full-subtractor-3igl</guid>
      <description>&lt;h2&gt;
  
  
  &lt;strong&gt;What are Half and Full Adders?&lt;/strong&gt;
&lt;/h2&gt;

&lt;p&gt;Full and half adders are the basic elements of digital logic used to perform addition operations in a binary system.&lt;/p&gt;

&lt;h2&gt;
  
  
  &lt;strong&gt;What is Half Adder?&lt;/strong&gt;
&lt;/h2&gt;

&lt;p&gt;Half Adder is a combinational logic circuit that is designed by connecting one XOR gate and one AND gate. The half-adder circuit has two inputs: A and B, which add two input digits and generate a carry and a sum.&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F4dbopuy08eko0uah17cw.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F4dbopuy08eko0uah17cw.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;Now, let's build a truth table for half adder.&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Ftmzboxmhfs8zpar2usne.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Ftmzboxmhfs8zpar2usne.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;h2&gt;
  
  
  &lt;strong&gt;What is Full Adder&lt;/strong&gt;?
&lt;/h2&gt;

&lt;p&gt;A Full Adder is an extension of the half adder that adds two single-bit binary numbers along with an additional Carry-in (Cin) from a previous stage. It produces:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Sum (S): The sum of the inputs and the carry-in.&lt;/li&gt;
&lt;li&gt;Carry-out (Cout): The carry-out from the addition.&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fqe7gdw4zp0mgopot8qo1.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fqe7gdw4zp0mgopot8qo1.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;In simple terms, the Full Adder consists with 2 Half Adders and one logic gate OR. &lt;/p&gt;

&lt;p&gt;Now, let's build the truth table for Full Adder values.&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fnvp73lya1uxgsim06cnv.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fnvp73lya1uxgsim06cnv.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;Conclusion:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Half Adder adds two bits.&lt;/li&gt;
&lt;li&gt;Full Adder adds two bits and a carry-in, handling the carry distribution between bits in multi-bit addition.&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;Now, let's move on to Half and Full subtractor.&lt;/p&gt;

&lt;h2&gt;
  
  
  &lt;strong&gt;What is Half Subtractor?&lt;/strong&gt;
&lt;/h2&gt;

&lt;p&gt;A Half Subtractor is a digital circuit used to subtract two single-bit binary numbers. Like a half adder, it operates on two inputs, but instead of adding, it subtracts. The two outputs are:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Difference (D): Represents the difference between the two bits.&lt;/li&gt;
&lt;li&gt;Borrow (B): Represents whether a "borrow" is required for the subtraction.&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fnob529hpzwlco6t8o69d.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fnob529hpzwlco6t8o69d.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;And again, build the truth table.&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fjw1whbq0lnmc0brbj4lc.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fjw1whbq0lnmc0brbj4lc.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;A half subtractor cannot handle the borrow from a previous stage, making it unsuitable for multi-bit subtraction.&lt;/p&gt;

&lt;h2&gt;
  
  
  &lt;strong&gt;What is Full Subtractor?&lt;/strong&gt;
&lt;/h2&gt;

&lt;p&gt;A Full Subtractor is an extension of the half subtractor. It subtracts two single-bit binary numbers along with an additional Borrow-in (Bin) from a previous stage. It produces:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Difference (D): The difference between the inputs and the borrow-in.&lt;/li&gt;
&lt;li&gt;Borrow-out (Bout): The borrow generated if needed for further subtraction.
The circuit diagram for a full subtractor usually consists of two half-subtractors and an additional OR gate to calculate the borrow-out bit.&lt;/li&gt;
&lt;/ol&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F0lt9zyvciu3bob81avlf.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2F0lt9zyvciu3bob81avlf.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;And the truth table&lt;/p&gt;

&lt;p&gt;&lt;a href="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fn7kbd9relqcsfureip3q.PNG" class="article-body-image-wrapper"&gt;&lt;img src="https://media.dev.to/cdn-cgi/image/width=800%2Cheight=%2Cfit=scale-down%2Cgravity=auto%2Cformat=auto/https%3A%2F%2Fdev-to-uploads.s3.amazonaws.com%2Fuploads%2Farticles%2Fn7kbd9relqcsfureip3q.PNG" alt="Image description" width="" height=""&gt;&lt;/a&gt;&lt;/p&gt;

&lt;p&gt;Conclusion:&lt;/p&gt;

&lt;ol&gt;
&lt;li&gt;Half Subtractor: Subtracts two bits, gives the difference and a borrow.&lt;/li&gt;
&lt;li&gt;Full Subtractor: Subtracts two bits with a borrow-in, handling multi-bit subtraction by distributing the borrow across stages.&lt;/li&gt;
&lt;/ol&gt;

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