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    <title>DEV Community: Francisco Prado</title>
    <description>The latest articles on DEV Community by Francisco Prado (@panchove).</description>
    <link>https://dev.to/panchove</link>
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      <title>DEV Community: Francisco Prado</title>
      <link>https://dev.to/panchove</link>
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    <item>
      <title>Why Core-Aware Logging Matters: The Architecture Behind LHOS_LOGx</title>
      <dc:creator>Francisco Prado</dc:creator>
      <pubDate>Mon, 12 Jan 2026 15:25:20 +0000</pubDate>
      <link>https://dev.to/panchove/why-core-aware-logging-matters-the-architecture-behind-lhoslogx-26kg</link>
      <guid>https://dev.to/panchove/why-core-aware-logging-matters-the-architecture-behind-lhoslogx-26kg</guid>
      <description>&lt;p&gt;In the world of mission-critical embedded systems, especially when developing for the &lt;strong&gt;ESP32-S3&lt;/strong&gt;, debugging is no longer about finding "where" the code failed, but "on which core" and "under what concurrency state."&lt;/p&gt;

&lt;p&gt;As we move toward &lt;strong&gt;ISO 12207&lt;/strong&gt; compliance for &lt;strong&gt;lhOS&lt;/strong&gt;, we have redefined our logging strategy. We didn't just wrap the standard &lt;code&gt;ESP_LOG&lt;/code&gt; functions; we evolved them into a diagnostic tool for &lt;strong&gt;Symmetric Multiprocessing (SMP)&lt;/strong&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  The Macro Definition
&lt;/h3&gt;



&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight c"&gt;&lt;code&gt;&lt;span class="cp"&gt;#define LHOS_LOGI(tag, fmt, ...) ESP_LOGI(tag, "(core %d) &amp;gt;&amp;gt;&amp;gt; " fmt, xPortGetCoreID(), ##__VA_ARGS__)
#define LHOS_LOGE(tag, fmt, ...) ESP_LOGE(tag, "(core %d) &amp;gt;&amp;gt;&amp;gt; " fmt, xPortGetCoreID(), ##__VA_ARGS__)
&lt;/span&gt;&lt;span class="c1"&gt;// ... applied to all log levels (W, D, V, F)&lt;/span&gt;

&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;h2&gt;
  
  
  The Silent Challenge of Dual-Core Systems
&lt;/h2&gt;

&lt;p&gt;The ESP32-S3 features a dual-core &lt;strong&gt;Xtensa LX7&lt;/strong&gt; architecture. In a standard FreeRTOS environment, tasks can migrate between Core 0 and Core 1. A race condition might trigger a memory corruption that is only reproducible when a specific interrupt fires on Core 1 while a background task is writing on Core 0.&lt;/p&gt;

&lt;p&gt;Standard logs often mask this complexity. By the time you see an error message, you’ve lost the execution context. &lt;strong&gt;lhOS&lt;/strong&gt; solves this by making the CPU ID a first-class citizen in every log entry.&lt;/p&gt;

&lt;h2&gt;
  
  
  Technical Advantages of the &lt;code&gt;LHOS_LOG&lt;/code&gt; System
&lt;/h2&gt;

&lt;h3&gt;
  
  
  1. Instant Core Affinity Visualization
&lt;/h3&gt;

&lt;p&gt;By automatically injecting &lt;code&gt;xPortGetCoreID()&lt;/code&gt;, the developer gets an immediate visual map of the system's workload distribution.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Architecture Validation:&lt;/strong&gt; If a high-priority task assigned to Core 0 suddenly logs from Core 1, the system has detected a task-pinning failure or a scheduler misconfiguration before it becomes a production crash.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  2. Streamlining Automated Log Analysis
&lt;/h3&gt;

&lt;p&gt;The use of the unique delimiter &lt;code&gt;"&amp;gt;&amp;gt;&amp;gt;"&lt;/code&gt; is a strategic choice for &lt;strong&gt;DevOps and CI/CD&lt;/strong&gt;.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;PowerShell Integration:&lt;/strong&gt; Our Windows-based testing scripts use these tokens to parse serial output, calculate delta-time between cores, and generate performance heatmaps. It separates the "noise" of the underlying IDF from the "signals" of the lhOS kernel.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  3. Debugging Race Conditions and Deadlocks
&lt;/h3&gt;

&lt;p&gt;In a multi-core environment, two tasks might attempt to lock the same Mutex simultaneously. With &lt;code&gt;LHOS_LOGx&lt;/code&gt;, your console output becomes a chronological timeline of core contention:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;&lt;code&gt;(core 0) &amp;gt;&amp;gt;&amp;gt; Attempting to take SEM_WIFI&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;
&lt;code&gt;(core 1) &amp;gt;&amp;gt;&amp;gt; SEM_WIFI already held by Task_BLE&lt;/code&gt;
This level of transparency reduces the "Mean Time to Repair" (MTTR) by providing a clear trace of execution overlap.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Performance Considerations (Overhead vs. Value)
&lt;/h2&gt;

&lt;p&gt;A common concern for Senior Engineers is the overhead of calling &lt;code&gt;xPortGetCoreID()&lt;/code&gt; inside a log. In the Xtensa LX7, retrieving the Core ID is an extremely cheap operation—it involves reading a specialized processor register.&lt;/p&gt;

&lt;p&gt;Compared to the overhead of the UART transmission or the string formatting itself, the cost is negligible. However, the value provided during the &lt;strong&gt;FMEA (Failure Mode and Effects Analysis)&lt;/strong&gt; phase is immeasurable. For production builds, lhOS allows these tags to be stripped via pre-processor flags to reclaim every microsecond of performance.&lt;/p&gt;

&lt;h2&gt;
  
  
  Conclusion: Observability as a Pillar of Safety
&lt;/h2&gt;

&lt;p&gt;In &lt;strong&gt;lhOS&lt;/strong&gt;, we believe that "if you can't see it, you can't secure it." These macros are more than just text formatting; they are a commitment to &lt;strong&gt;observability&lt;/strong&gt;. By forcing the system to declare its physical execution context, we transform a simple debug port into a powerful window into the silicon's behavior.&lt;/p&gt;

</description>
      <category>esp32</category>
      <category>embeddedsystems</category>
      <category>multicoreprogramming</category>
      <category>observability</category>
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