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    <title>DEV Community: Raghu Bharadwaj</title>
    <description>The latest articles on DEV Community by Raghu Bharadwaj (@raghu_bharadwaj_404e60eb0c).</description>
    <link>https://dev.to/raghu_bharadwaj_404e60eb0c</link>
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      <title>DEV Community: Raghu Bharadwaj</title>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c</link>
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    <item>
      <title>Kernel &amp; Embedded News: Android Binder Goes Rust-Only in Linux 7.4</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Tue, 22 Sep 2026 05:47:27 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-android-binder-goes-rust-only-in-linux-74-33h2</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-android-binder-goes-rust-only-in-linux-74-33h2</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Android's Binder driver is set to lose its C implementation in Linux 7.4, leaving the Rust implementation as the only one — the first time Rust replaces a deployed C driver in the mainline kernel instead of being added beside one. Two large RFCs from Google engineers question old assumptions: io_uring workers that exchange thread identities to avoid worker-thread overhead, and virtual machines that keep executing while the host kernel reboots. Amlogic announced the first Cortex-A320 SoCs for low-power edge AI, and Ubuntu 26.10 completes its move to Rust coreutils.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;This edition is about replacement. Two items replace long-lived C code with Rust, one at the kernel level and one in userland; two more propose replacing settled assumptions about what a thread is and what a host reboot means. The fifth brings Armv9 down into a class of silicon that has run Armv8 little cores for a decade.&lt;/p&gt;

&lt;h2&gt;
  
  
  In this edition
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Android Binder drops its C implementation in 7.4.&lt;/strong&gt; The Rust driver, upstream since 6.18, becomes the only Binder — and Rust becomes a hard build requirement for Android kernels. &lt;em&gt;— planning signal&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;io_uring may swap thread identities to avoid blocking costs.&lt;/strong&gt; A 15-patch RFC lets a worker thread take over the submitting thread's identity only when an operation actually blocks. &lt;em&gt;— long-term watch&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;"Orphaned VMs": guests keep running while the host kernel is offline.&lt;/strong&gt; A 46-patch RFC extends the Live Update Orchestrator so vCPUs keep executing across a host kexec reboot. &lt;em&gt;— architecture watch&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Amlogic announces the first Cortex-A320 SoCs.&lt;/strong&gt; The A123X and C305X2 pair Arm's smallest Armv9 core with an 8 TOPS Transformer-capable NPU for cameras and battery devices. &lt;em&gt;— hardware watch&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Ubuntu 26.10 completes the Rust coreutils transition.&lt;/strong&gt; cp, mv and rm switch to the Rust implementations, the final three commands to move. &lt;em&gt;— test now&lt;/em&gt;
&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Android Binder drops its C implementation
&lt;/h2&gt;

&lt;p&gt;Carlos Llamas of Google has posted the patch that removes the C implementation of Binder, Android's central inter-process communication driver, from the kernel: 11,470 lines deleted across twenty files. The standard Binder configuration option is rewired to require Rust support, and the module name that vendor build systems reference now points at the Rust driver. Greg Kroah-Hartman has picked the patch up for the char-misc tree, aimed at the 7.4 merge window that opens after 7.3 releases in the second half of October.&lt;/p&gt;

&lt;p&gt;The replacement was prepared over several years. The Rust Binder driver began as a demonstration by Wedson Almeida Filho and has since been maintained by Alice Ryhl; it was upstreamed in Linux 6.18, reached full feature parity rather than a convenient subset, and measures equal to or better than the C driver in performance. It has been running on shipping Android hardware for some time. Llamas' stated reason for the removal is that fifteen years of accumulated complexity made the C driver painful to maintain, with new features hard to land without introducing vulnerabilities — a fair description of a driver that is performance-critical, reference-counted, and reachable from untrusted application code.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;For the first time, a Rust implementation is replacing a widely deployed C driver in the mainline kernel instead of being added beside one.&lt;/strong&gt; Every Rust milestone before this was additive: a new driver, an abstraction layer, an optional alternative. Deleting the C path makes Rust a hard build dependency for any kernel that needs Binder — in practice, every Android vendor kernel, and any distribution kernel that supports Android container stacks.&lt;/p&gt;

&lt;p&gt;The patch is queued, not merged, and the 7.4 window has not opened; there has been no visible opposition on the list. Binder also had a motivated corporate owner funding its rewrite to parity for years — most subsystems have no equivalent sponsor, so this is a milestone, not yet a pattern.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for Android and embedded teams
&lt;/h3&gt;

&lt;p&gt;Teams building Android on vendor kernels at 6.6 or 6.12 are not affected until their BSP rebases to 7.4 or later, but the direction is now set: a working Rust toolchain in the kernel build becomes as basic as a working C compiler for Android work. Check today whether your kernel CI can build with Rust enabled, and treat the ability to read Rust kernel code as a near-term skill requirement for anyone who debugs IPC on Android systems.&lt;/p&gt;

&lt;h2&gt;
  
  
  io_uring proposes exchanging thread identities
&lt;/h2&gt;

&lt;p&gt;Jens Axboe, the io_uring maintainer, posted a 15-patch RFC on 11 September with an unusual answer to an old problem. io_uring promises not to block the submitting thread, but several operations — fdatasync, statx, some openat paths — run through kernel code that was never written to be asynchronous. Today, any such operation is handed to a worker thread up front, paying a wakeup and a context switch even when the operation would have completed without blocking at all.&lt;/p&gt;

&lt;p&gt;The RFC issues these operations inline instead, and reacts only when blocking actually happens. A new task flag tells the scheduler to notify io_uring when the submitting thread is about to sleep. At that moment an idle worker takes over the submitting thread's identity — thread ID, signal state, credentials, rseq and robust lists, scheduling attributes, register state — and returns to userspace in its place. The original thread, now carrying the worker's identity, sleeps, finishes the operation, and joins the worker pool. The cover letter's benchmarks show why it is tempting: an fsync test on tmpfs improved by roughly 700 percent, because the handoff cost is now paid only when blocking is real.&lt;/p&gt;

&lt;p&gt;The risk sits in the identity exchange itself. Nothing else in the kernel may hold a reference to either thread's task structure at the moment of the swap, so the series carries a long list of disqualifying conditions: threads under ptrace, threads using perf events, kernel-tracked futex ownership, realtime scheduling policy, core-scheduling cookies, an in-progress vfork, and more. Peter Zijlstra noted that shadow stacks — enabled on most current x86 deployments — currently disqualify the handoff too, though Axboe believes the shadow stack can move with the identity. Reception on the list is best summarised by Gabriel Krisman Bertazi's verdict: "really cool and seems like very dangerous thing".&lt;/p&gt;

&lt;h3&gt;
  
  
  How to read this if you build on io_uring
&lt;/h3&gt;

&lt;p&gt;There is nothing to adopt yet; Axboe himself frames the series as a viability question, not a merge candidate. Two details deserve attention from embedded readers. Realtime scheduling excludes the handoff by design, so PREEMPT_RT systems would keep the current worker-thread behaviour and see none of the gains. And the regressions in the RFC's own numbers appear at high queue depths on operations that always block, so the win is workload-specific.&lt;/p&gt;

&lt;h2&gt;
  
  
  Orphaned VMs: guests that outlive the host kernel
&lt;/h2&gt;

&lt;p&gt;Pasha Tatashin of Google posted a 46-patch RFC on 20 September that pushes the Live Update Orchestrator one step further. LUO, upstream since 6.19 and built on the Kexec Handover infrastructure, preserves selected state across a kexec reboot so a host kernel can be replaced under running workloads; that base is still being completed upstream. The new proposal keeps virtual machines actually executing instructions while the host kernel is down.&lt;/p&gt;

&lt;p&gt;The mechanism is called an orphaned VM: guest vCPUs continue on physical CPUs that are shielded from the reboot, while a small privileged interpose layer named the Caretaker traps VM exits and resolves what it can locally — with no host kernel and no VMM present. The series preserves vCPU file-descriptor state across the reboot gap, protects the reserved CPUs from boot-time reset signals, and deals with timekeeping drift, stray interrupts, and guest-to-guest IPI routing during the window. It has been tried on Intel, AMD and Arm server processors; the author calls it early-stage work seeking feedback, ahead of discussion at the Linux Plumbers Conference in Prague next month.&lt;/p&gt;

&lt;p&gt;The pattern matters more than the patches. Cloud providers are systematically removing the reboot as a source of downtime, and the building blocks they are upstreaming — Kexec Handover, LUO, now the Caretaker concept — are generic kernel infrastructure, not cloud-only code.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for fleet and hypervisor designs
&lt;/h3&gt;

&lt;p&gt;Industrial and telecom edge systems have the same problem in a smaller form: a gateway running a hypervisor cannot take the guests down every time the host kernel needs a security update. Nothing here is deployable yet, and the vCPU-preservation work targets large servers first. The realistic action is to study LUO and Kexec Handover now — both are documented in the kernel tree — because kexec-based live update is becoming the upstream answer to host maintenance. Product architectures that assume a full-stack reboot for every kernel fix should be re-examined against it.&lt;/p&gt;

&lt;h2&gt;
  
  
  Amlogic announces the first Cortex-A320 SoCs
&lt;/h2&gt;

&lt;p&gt;Amlogic has announced the A123X and C305X2, the first announced SoCs built on Arm's Cortex-A320 — the smallest Armv9 core, introduced by Arm in February 2025 with SVE2 vector extensions. The A123X carries four A320 cores for industrial machine vision: dashcams, robots, access control, video conferencing. The C305X2 carries two, aimed at battery devices such as solar doorbells and battery IP cameras, with always-on video and pre-roll low-power modes. Both are fabricated on a 6 nm process and pair the CPUs with Amlogic's 8 TOPS ADLA3 NPU, which accelerates Transformer operators in hardware; both also carry an ADLA2 NPU — rated at 4 TOPS on the A123X for CNN workloads, and serving the AI-ISP on the C305X2 — plus a neural audio-event engine and a low-light AI-ISP.&lt;/p&gt;

&lt;p&gt;The vendor's headline numbers: 34 percent higher SPECint2006 than the Cortex-A35 this class of chip typically used, and roughly ten times the ML throughput from SVE2. The software story is thin so far — Linux compatibility, reference designs and NN SDKs are promised, with no public datasheets or block diagrams yet. Chips are sampling now, with mass production scheduled for the fourth quarter of 2026. All details are preliminary and come from the vendor's own announcement.&lt;/p&gt;

&lt;p&gt;The significance is the class of device. Camera and doorbell SoCs have run Armv8 little cores for a decade; Armv9 in this segment brings SVE2, and with it a vector baseline that inference libraries can target instead of hand-written NEON paths. On-device Transformer support in an 8 TOPS NPU also signals where vendors expect small-model workloads to run.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to evaluate the first Cortex-A320 parts
&lt;/h3&gt;

&lt;p&gt;Treat these as roadmap information, not design-in candidates, until an SDK and datasheets exist. The questions that decide usability will be familiar: which kernel version the BSP ships, whether the NPU stack is usable outside the vendor's pipeline, and what the upstreaming position is — none of which the announcement answers. Teams selecting camera silicon for 2027 products should add A320-based parts to the comparison table now and press vendors on the software questions early.&lt;/p&gt;

&lt;h2&gt;
  
  
  Ubuntu 26.10 finishes the move to Rust coreutils
&lt;/h2&gt;

&lt;p&gt;Canonical has completed a transition that began with Ubuntu 25.10: as of the 26.10 development release, cp, mv and rm come from the Rust coreutils project rather than GNU coreutils. Those three commands had stayed on the GNU implementations through 25.10 and 26.04 LTS because of compatibility issues that upstream uutils has since resolved. The 26.10 draft release notes now record the transition as complete, with the beta due this month and the stable release planned for 15 October, targeting Linux 7.3 as its kernel.&lt;/p&gt;

&lt;p&gt;Taken with the Binder item, the pattern is clear: in the same month, the reference C implementation of a core Android kernel driver and the last GNU file utilities in a major distribution are both replaced by Rust implementations. Both moves rest on the same argument — memory-safe reimplementations have reached practical parity.&lt;/p&gt;

&lt;p&gt;For embedded teams the relevant surface is scripts. Two decades of shell scripts encode GNU-specific behaviour in rarely used options, exact error messages, and edge-case handling.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to check your images and scripts
&lt;/h3&gt;

&lt;p&gt;If your build or device images derive from Ubuntu, run your provisioning and CI scripts against a 26.10 beta image before the October release reaches your base-image pipeline. Pay attention to scripts that parse cp, mv or rm output or rely on obscure options, and to anything that assumes GNU-specific error text. Debian-based and Yocto-based images are untouched by this change, but the wider ecosystem trend is worth noting in platform decisions.&lt;/p&gt;

&lt;h2&gt;
  
  
  References
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://www.phoronix.com/news/Google-Binder-C-Goodbye" rel="noopener noreferrer"&gt;Google's Binder C driver removal&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://hwbusters.com/news/linux-7-4-deletes-11470-lines-of-android-binder-c-code-and-the-rust-binder-driver-takes-over/" rel="noopener noreferrer"&gt;Linux 7.4 deletes 11,470 lines of Binder C code&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lwn.net/Articles/1094303/" rel="noopener noreferrer"&gt;Thread-identity switcheroo for io_uring&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/all/20260911154148.644489-1-axboe@kernel.dk/" rel="noopener noreferrer"&gt;io_uring thread identity handoff RFC (lore)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/all/20260920193650.3373435-1-pasha.tatashin@soleen.com/" rel="noopener noreferrer"&gt;Orphaned VMs RFC (lore)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.phoronix.com/news/Orphaned-VMs-Linux-Patches" rel="noopener noreferrer"&gt;Orphaned VMs coverage&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://docs.kernel.org/core-api/liveupdate.html" rel="noopener noreferrer"&gt;Live Update Orchestrator kernel documentation&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.cnx-software.com/2026/09/11/amlogic-a123x-and-c305x2-arm-cortex-a320-socs-target-industrial-and-low-power-aiot-applications/" rel="noopener noreferrer"&gt;Amlogic A123X and C305X2 Cortex-A320 SoCs&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.desmoinesregister.com/press-release/story/122619/amlogic-launches-a123x-c305x2-next-gen-6nm-socs-built-to-power-the-edge-ai-ecosystem/" rel="noopener noreferrer"&gt;Amlogic A123X &amp;amp; C305X2 press release&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.phoronix.com/news/Ubuntu-Completes-Rust-Coreutils" rel="noopener noreferrer"&gt;Ubuntu 26.10 completes Rust coreutils transition&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://documentation.ubuntu.com/release-notes/26.10/" rel="noopener noreferrer"&gt;Ubuntu 26.10 release notes&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

&lt;p&gt;&lt;em&gt;If you want to go deeper than the news, TECH VEDA runs live, instructor-led training on Linux kernel internals and embedded Linux — see &lt;a href="https://www.techveda.live/linux-kernel-infrastructure/" rel="noopener noreferrer"&gt;Linux Kernel Infrastructure&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>linux</category>
      <category>kernel</category>
      <category>embedded</category>
      <category>rust</category>
    </item>
    <item>
      <title>Boot Confirmation: Who Decides an Update Worked?</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Sat, 19 Sep 2026 16:37:41 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/boot-confirmation-who-decides-an-update-worked-2edo</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/boot-confirmation-who-decides-an-update-worked-2edo</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;A successful install is not a successful update. For boot confirmation, use a bootloader boot counter to catch the failures where the system never reaches userspace, and one userspace health check that confirms the slot only after the device has shown it works and can still be updated. Run a hardware watchdog under both, so a hang produces a reset that the counter records. A boot counter alone is enough only when someone can physically reach a failed device.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;An update framework reports that the installation succeeded. That means only that the image reached the inactive slot and its checksum matched — nothing about whether the device will boot it, or whether the software works. &lt;strong&gt;Boot confirmation&lt;/strong&gt; answers those two questions: the booted system reports back to the bootloader, which then stops treating the new slot as unproven. The decision is who may make that report, and on what evidence. It goes one level deeper than my post on &lt;a href="https://www.techveda.live/2026/08/08/ab-update-layout-scenarios/" rel="noopener noreferrer"&gt;choosing an A/B update layout&lt;/a&gt;, which covered where the slots go.&lt;/p&gt;

&lt;h2&gt;
  
  
  The context
&lt;/h2&gt;

&lt;p&gt;The SWUpdate documentation defines a successful update as four steps: the update agent runs, the device reboots, the bootloader starts the new software, and that software runs, checks itself, and declares the transaction complete. Three of the four happen after the update agent has exited. Boot confirmation has to catch two classes of failure there, and no single component sees both.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;The first class never reaches userspace.&lt;/strong&gt; A device tree that does not match the board, a panic in early init, an unresolvable root filesystem UUID, a hang while probing a bus. No userspace runs, so none of it can report anything. Only the bootloader can notice, and only if it counts.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;The second class boots cleanly and is still a dead product.&lt;/strong&gt; The system reaches a login prompt, but the radio never associates, a migration fails, or the main service restarts in a loop. The bootloader cannot see this; as RAUC's documentation notes, such problems appear only at runtime, sometimes only after days and many reboots.&lt;/p&gt;

&lt;h2&gt;
  
  
  The boot confirmation options
&lt;/h2&gt;

&lt;h3&gt;
  
  
  Option A — a bootloader boot counter
&lt;/h3&gt;

&lt;p&gt;U-Boot implements this as Boot Count Limit (&lt;code&gt;CONFIG_BOOTCOUNT_LIMIT&lt;/code&gt;). After a power-on reset &lt;code&gt;bootcount&lt;/code&gt; is initialised to 1, and while &lt;code&gt;upgrade_available&lt;/code&gt; is non-zero each reboot increments it by one. When &lt;code&gt;bootcount&lt;/code&gt; exceeds &lt;code&gt;bootlimit&lt;/code&gt;, U-Boot executes &lt;code&gt;altbootcmd&lt;/code&gt; instead of &lt;code&gt;bootcmd&lt;/code&gt;. Two details matter on a headless device: if &lt;code&gt;bootlimit&lt;/code&gt; is undefined the feature is disabled entirely, and if &lt;code&gt;altbootcmd&lt;/code&gt; is undefined U-Boot drops into interactive mode and stays there. Linux must then reset &lt;code&gt;bootcount&lt;/code&gt; to 0 to allow further boot cycles.&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;fw_printenv bootcount bootlimit upgrade_available
&lt;span class="go"&gt;bootcount=1
bootlimit=3
upgrade_available=1
&lt;/span&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;sudo &lt;/span&gt;fw_setenv upgrade_available 0
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;sudo &lt;/span&gt;fw_setenv bootcount 0
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;RAUC's U-Boot backend layers its own variables on this, &lt;code&gt;BOOT_ORDER&lt;/code&gt; and &lt;code&gt;BOOT_&amp;lt;bootname&amp;gt;_LEFT&lt;/code&gt;, driven by a boot script. Barebox instead provides a maintained framework, &lt;em&gt;bootchooser&lt;/em&gt;, keeping &lt;code&gt;remaining_attempts&lt;/code&gt; and &lt;code&gt;priority&lt;/code&gt; per target in an atomic, redundant backend — which is why RAUC's documentation recommends it.&lt;/p&gt;

&lt;p&gt;A counter is small, runs before your code, and does not depend on the application. But it counts boots, not correctness: a device that boots with a dead application passes. The state must also be written atomically — on U-Boot, a redundant environment (&lt;code&gt;CONFIG_SYS_REDUNDAND_ENVIRONMENT&lt;/code&gt;, spelled that way upstream) outside the bootloader partition — or a power cut mid-write leaves the device unable to decide anything.&lt;/p&gt;

&lt;h3&gt;
  
  
  Option B — a userspace health check
&lt;/h3&gt;

&lt;p&gt;Here the running system decides. RAUC provides &lt;code&gt;rauc status mark-good&lt;/code&gt; and &lt;code&gt;mark-bad&lt;/code&gt;, which reach the bootloader through its bootloader interface. The documentation suggests running mark-good from a systemd unit ordered after the services that actually matter, not at the end of boot.&lt;/p&gt;

&lt;p&gt;SWUpdate expresses the same idea through a persistent variable, &lt;code&gt;ustate&lt;/code&gt;. It is set to 1 (INSTALLED) after an update, meaning the new software is under test; the bootloader initiates a fallback and sets it to 3 (FAILED) if that software is not running; userspace resets it to 0 once confirmed. The documentation is explicit that resetting it is project specific, and can be the last action after the application has checked itself.&lt;/p&gt;

&lt;p&gt;This is the only mechanism that can judge whether the &lt;em&gt;product&lt;/em&gt; works, and you choose the evidence. But it reports nothing if it never runs, so alone it leaves the first failure class uncovered. Too permissive, it confirms broken builds; too strict, it rolls back a healthy device. The SWUpdate best-practice guide warns of a deeper risk: tying the check to your application makes the application a dependency of updatability.&lt;/p&gt;

&lt;h3&gt;
  
  
  Option C — both, over a hardware watchdog
&lt;/h3&gt;

&lt;p&gt;A counter only increments if the device reboots, and a system that hangs does not reboot. A hardware watchdog converts a hang into a reset. RAUC states this directly: the system should use a hardware watchdog during boot, and the bootloader should treat watchdog resets as failed boots.&lt;/p&gt;

&lt;p&gt;On Linux the watchdog starts when &lt;code&gt;/dev/watchdog&lt;/code&gt; is opened, then must be pinged by a write or by &lt;code&gt;WDIOC_KEEPALIVE&lt;/code&gt;. If a process closes the device without first writing the magic character &lt;code&gt;V&lt;/code&gt;, a Magic Close driver keeps it running; &lt;code&gt;CONFIG_WATCHDOG_NOWAYOUT&lt;/code&gt; removes the ability to stop it at all. Under systemd, &lt;code&gt;RuntimeWatchdogSec=&lt;/code&gt; programs it and systemd contacts it at least once every half of that interval — but it defaults to 0, meaning off. For coverage before Linux starts, U-Boot has &lt;code&gt;CONFIG_WATCHDOG_AUTOSTART&lt;/code&gt; (on by default, except ARCH_SUNXI, ARCH_STM32MP and ARCH_SNAPDRAGON), and barebox uses &lt;code&gt;boot.watchdog_timeout&lt;/code&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  The decision
&lt;/h2&gt;

&lt;p&gt;For a connected product you cannot physically reach, use all three layers with different jobs. The watchdog detects that progress stopped and forces a reset. The boot counter detects repeated failed attempts and switches slots. One health check decides the new software genuinely works, and confirms.&lt;/p&gt;

&lt;p&gt;Three rules make that practical. Define the health check as the smallest set of conditions meaning the device performs its function &lt;em&gt;and&lt;/em&gt; can be updated again, including the update agent's reachability. Keep the confirmation path independent of the application. And set &lt;code&gt;bootlimit&lt;/code&gt; to at least 3, so one transient failure does not cause a rollback.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;The boot counter alone is the right choice&lt;/strong&gt; in two situations. If a technician can reach and reflash a failed device, a dead application and a dead boot are the same service call. And if the application team cannot commit to a stable health signal, a check whose meaning changes every release produces rollbacks nobody can explain.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;A userspace check alone is the right choice&lt;/strong&gt; when the vendor boot chain is locked and you cannot add counting logic. Put the fallback decision in an initramfs or an early service that runs before the application.&lt;/p&gt;

&lt;h2&gt;
  
  
  Consequences
&lt;/h2&gt;

&lt;p&gt;The health check becomes release-critical code. It ships inside the image it validates, so version it with that image, and test the rollback path each release with a bundle known to fail.&lt;/p&gt;

&lt;p&gt;You acquire a timing budget. The watchdog timeout must exceed the worst-case boot, including a filesystem check and any first-boot migration; otherwise a slow but healthy boot is indistinguishable from a broken one. U-Boot's &lt;code&gt;CONFIG_WATCHDOG_TIMEOUT_MSECS&lt;/code&gt; defaults to 60000 with per-architecture overrides — measure it on your hardware.&lt;/p&gt;

&lt;p&gt;Rollback is not free at the data layer either. Returning to older software leaves newer data on the writable partition, so a schema written by the new version must still load on the old one — a constraint belonging to the application, not the update framework. You also need to explain a rollback afterwards, so record the watchdog boot status (&lt;code&gt;WDIOC_GETBOOTSTATUS&lt;/code&gt;, &lt;code&gt;WDIOF_CARDRESET&lt;/code&gt;) and &lt;code&gt;ustate&lt;/code&gt; or &lt;code&gt;BOOT_&amp;lt;bootname&amp;gt;_LEFT&lt;/code&gt;.&lt;/p&gt;

&lt;p&gt;Finally, one boot confirmation failure mode is easy to miss. If no device in your fleet has ever rolled back, the likely explanation is not that every release was perfect; it is that the health check tests nothing. Keep a rescue system regardless, because a double-copy setup still has failure modes affecting both copies.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;A successful installation is not a successful update; boot confirmation decides whether the new slot is kept.&lt;/li&gt;
&lt;li&gt;A boot counter catches failures that never reach userspace; a health check catches a device that boots but does not work. Neither covers the other.&lt;/li&gt;
&lt;li&gt;A hardware watchdog turns a hang into a reset the counter can observe; under systemd it is off by default. Keep the health check small, and always include the ability to receive another update.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;What is boot confirmation?&lt;/strong&gt;&lt;br&gt;
It is the step where a newly booted system reports back to the bootloader that it is working, so the bootloader stops treating the new slot as unproven. Until then, returning to the previous slot stays possible.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Is a bootloader boot counter enough on its own?&lt;/strong&gt;&lt;br&gt;
Only when someone can physically reach a failed device, or when the application cannot provide a stable health signal. A counter measures boots, not correctness, so a device that boots with a dead application passes it.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;What should the userspace health check actually test?&lt;/strong&gt;&lt;br&gt;
The smallest set of conditions meaning the device performs its function and can still receive another update. Include the update agent's reachability, so a bad release stays replaceable.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Why is a hardware watchdog needed if the bootloader already counts boots?&lt;/strong&gt;&lt;br&gt;
A counter only increments when the device reboots. A system that hangs does not reboot, so the failure is never counted. The watchdog forces the reset that makes it visible.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://docs.u-boot.org/en/latest/api/bootcount.html" rel="noopener noreferrer"&gt;U-Boot — Boot Count Limit&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://rauc.readthedocs.io/en/latest/basic.html" rel="noopener noreferrer"&gt;RAUC Basics — Boot Confirmation and Fallback&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://rauc.readthedocs.io/en/latest/integration.html" rel="noopener noreferrer"&gt;RAUC Integration — bootloader backends and watchdog setup&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://sbabic.github.io/swupdate/swupdate-best-practise.html" rel="noopener noreferrer"&gt;SWUpdate Best Practice — update concept, ustate and fallback&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.kernel.org/doc/html/latest/watchdog/watchdog-api.html" rel="noopener noreferrer"&gt;The Linux Watchdog driver API — magic close and nowayout&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.freedesktop.org/software/systemd/man/latest/systemd-system.conf.html" rel="noopener noreferrer"&gt;systemd-system.conf(5) — RuntimeWatchdogSec&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;Originally published at &lt;a href="https://www.techveda.live/2026/09/19/boot-confirmation-update-rollback/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;. I teach Linux kernel and embedded Linux courses at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;TECH VEDA&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

</description>
      <category>embedded</category>
      <category>linux</category>
      <category>iot</category>
      <category>architecture</category>
    </item>
    <item>
      <title>Containers vs Packages: Delivering Apps on an Embedded Device</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Wed, 16 Sep 2026 04:54:22 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/containers-vs-packages-delivering-apps-on-an-embedded-device-58cg</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/containers-vs-packages-delivering-apps-on-an-embedded-device-58cg</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Keep the application inside the base image until the platform team and the application team release on different schedules. At that point deliver it as a separate signed artifact, replaced as a whole, not as packages installed on the running device. In the containers vs packages comparison, containers suit several independently released applications; a runtime package manager is the option to avoid in production, because it lets every unit in the field reach a different state.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Assume the platform decision is settled: the device boots from an A/B root filesystem built by Yocto or Buildroot, and the update client installs a signed bundle and rolls back after a failed boot. One question is usually still open, and is decided by default rather than by design: where does the application live, and how does a new version reach it? The containers vs packages framing covers the two answers teams argue about most, but four are worth weighing.&lt;/p&gt;

&lt;h2&gt;
  
  
  The context
&lt;/h2&gt;

&lt;p&gt;The decision arises the first time two groups ship on different calendars. The platform group updates the kernel, the BSP and the base userspace every few months; the application group wants to ship a fix on a Thursday. With only a full base image to carry it, that fix needs a full platform release.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Release cadence.&lt;/strong&gt; One image means one cadence for everything inside it.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Flash budget.&lt;/strong&gt; In a symmetric A/B layout the root filesystem is stored twice: a 400 MB model file costs 800 MB.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Integrity.&lt;/strong&gt; A read-only root verified with dm-verity cannot be written to after the build.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Rollback.&lt;/strong&gt; A base rollback restores the base, not an application from another channel.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Test surface.&lt;/strong&gt; Every independent channel multiplies the version combinations in the field.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;If the A/B layout is not settled, decide that first; we covered it in &lt;a href="https://www.techveda.live/2026/08/08/ab-update-layout-scenarios/" rel="noopener noreferrer"&gt;Choosing an A/B Update Layout for Your Product&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  Containers vs packages: the four options
&lt;/h2&gt;

&lt;h3&gt;
  
  
  Option 1: the application lives in the base image
&lt;/h3&gt;

&lt;p&gt;The application is a recipe in your build system, lands in the root filesystem, and is updated by shipping a new base image. One artifact, one version number, one test matrix. Buildroot's manual states the position directly: binary packages allow partial upgrades, creating a large number of version combinations that would have to be tested, whereas replacing the whole image guarantees the system in the field is the one that was tested.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;For: simplest integrity story, works with a read-only verified root, one version to support.&lt;/li&gt;
&lt;li&gt;Against: one cadence for all software, a full download for a one-line fix, a reboot for every application change, duplicated flash.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Option 2: a runtime package manager on the target
&lt;/h3&gt;

&lt;p&gt;Yocto can produce this. Adding &lt;code&gt;package-management&lt;/code&gt; to &lt;code&gt;IMAGE_FEATURES&lt;/code&gt; ships the package databases and the target-side package tools in the image, so the device can install and upgrade from a feed at runtime. &lt;code&gt;PACKAGE_CLASSES&lt;/code&gt; selects the backend: &lt;code&gt;package_rpm&lt;/code&gt;, &lt;code&gt;package_deb&lt;/code&gt; or &lt;code&gt;package_ipk&lt;/code&gt;. Buildroot does not offer this at all, because it does not track which package installed which file.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;For: small incremental updates, and useful on development images where you want &lt;code&gt;strace&lt;/code&gt; or &lt;code&gt;gdb&lt;/code&gt; without a rebuild.&lt;/li&gt;
&lt;li&gt;Against: incompatible with a read-only or dm-verity-protected root; dependency resolution runs on the device, so units drift apart; a compromised feed or signing key lets the device install arbitrary software.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Option 3: OCI containers
&lt;/h3&gt;

&lt;p&gt;The application ships as a container image and a runtime such as Podman or Docker starts it. On Yocto this comes from the meta-virtualization layer, which carries the runtime recipes and expects &lt;code&gt;virtualization&lt;/code&gt; in &lt;code&gt;DISTRO_FEATURES&lt;/code&gt;. The base image stays read-only; the container store lives on the writable data partition.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;For: the application and its dependencies travel together, so it does not depend on the libraries the base image carries; applications from different teams are versioned separately; namespaces and resource limits give isolation.&lt;/li&gt;
&lt;li&gt;Against: the runtime, its storage layers and its network configuration are more software to harden and track for CVEs; the image store needs a writable filesystem; and the container layer gives no rollback of the base.&lt;/li&gt;
&lt;/ul&gt;

&lt;h3&gt;
  
  
  Option 4: a separate artifact, without a container runtime
&lt;/h3&gt;

&lt;p&gt;Independent versioning does not require containers. Three mechanisms are worth knowing.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;RAUC artifact repositories.&lt;/strong&gt; RAUC installs artifacts into named repositories rather than into slots; these were added in RAUC 1.13. The cases its manual lists are container and VM images, large data files such as maps or machine learning models, firmware for other microcontrollers, and optional add-on services. An artifact is replaced under the same name, independently of the base and usually without a reboot.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;systemd system extension images (sysext).&lt;/strong&gt; A read-only image that extends &lt;code&gt;/usr/&lt;/code&gt; and &lt;code&gt;/opt/&lt;/code&gt; at runtime by overmounting them with an overlayfs. Images go in &lt;code&gt;/var/lib/extensions/&lt;/code&gt;, and each carries an &lt;code&gt;extension-release&lt;/code&gt; file whose &lt;code&gt;ID=&lt;/code&gt; and &lt;code&gt;SYSEXT_LEVEL=&lt;/code&gt; or &lt;code&gt;VERSION_ID=&lt;/code&gt; must match the host, so compatibility is checked at merge time, before &lt;code&gt;basic.target&lt;/code&gt;. In systemd since version 248, with no dependency resolution.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;OSTree.&lt;/strong&gt; A content-addressed store of complete filesystem trees. Deployments are hardlinks into &lt;code&gt;/ostree/repo&lt;/code&gt;, so an upgrade costs space proportional to the new files plus a constant overhead.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Across all three:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;For: independent versioning, single storage rather than one copy per slot, no container runtime.&lt;/li&gt;
&lt;li&gt;Against: less common in most teams; no isolation; sysext binaries link against host libraries unless statically linked.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  The decision
&lt;/h2&gt;

&lt;p&gt;For the common case — one application, one team owning it, the same cadence as the platform — keep the application in the base image. A second delivery channel that nobody needs is cost without benefit, and it weakens the guarantee that the software in the field is the software you tested.&lt;/p&gt;

&lt;p&gt;Once cadences separate, deliver the application as a separate signed artifact. Which mechanism depends on your needs.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Choose containers&lt;/strong&gt; when you have more than one independently released application, when they come from different teams, or when you need isolation between them.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Choose a RAUC artifact repository or a sysext image&lt;/strong&gt; when you have one or two applications, no isolation requirement, a tight flash budget, and a team that maintains the build.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Choose a runtime package manager&lt;/strong&gt; only on development and bench images, or on an edge server whose operations team accepts fleet divergence.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Whichever you choose, write the compatibility contract down before the first field release: which application versions run on which platform versions, and what the device does outside that range. A sysext image enforces this through the extension-release match; otherwise you enforce it. Installing a system extension is:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight shell"&gt;&lt;code&gt;raghu@techveda.org:~&lt;span class="nv"&gt;$ &lt;/span&gt;&lt;span class="nb"&gt;sudo cp &lt;/span&gt;app-2.4.raw /var/lib/extensions/
raghu@techveda.org:~&lt;span class="nv"&gt;$ &lt;/span&gt;&lt;span class="nb"&gt;sudo &lt;/span&gt;systemd-sysext refresh
raghu@techveda.org:~&lt;span class="nv"&gt;$ &lt;/span&gt;systemd-sysext list
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;We cover these decisions on real hardware in our &lt;a href="https://www.techveda.live/embedded-linux-yocto/" rel="noopener noreferrer"&gt;Embedded Linux and Yocto training&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  Consequences
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;You are testing a matrix, not a build.&lt;/strong&gt; With two channels, the platform-and-application combinations grow with every release on either side. Decide which combinations you support and test those.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Rollback stops being one operation.&lt;/strong&gt; The A/B mechanism rolls the base back after a failed boot, but not an application from another channel, because it is not in the slot being switched. A bad application version needs its own recovery path.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Storage moves rather than disappears.&lt;/strong&gt; Taking a large payload out of the A/B root filesystem removes the duplicate copy, which is the reason RAUC gives for artifact repositories. But the store needs a writable partition, formatted for your flash.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Attack surface follows the choice.&lt;/strong&gt; A container runtime is a large body of code you now track and patch. A package manager is smaller, but has a larger consequence if its key or feed is compromised. Baking the application in adds neither.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Read-only roots and package managers do not combine.&lt;/strong&gt; If you have committed to dm-verity, option 2 is closed. Decide delivery together with the integrity design.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;Application delivery is driven by release cadence, not technology preference.&lt;/li&gt;
&lt;li&gt;In the containers vs packages comparison, containers give independent versioning and isolation at the cost of a runtime you maintain; a package manager gives small updates at the cost of fleet divergence.&lt;/li&gt;
&lt;li&gt;RAUC artifact repositories, systemd-sysext and OSTree give independent versioning without a container runtime.&lt;/li&gt;
&lt;li&gt;Any separate channel needs an explicit compatibility contract and its own rollback path.&lt;/li&gt;
&lt;li&gt;dm-verity and an on-device package manager cannot coexist, so decide delivery and integrity together.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;Can I put a package manager on a read-only root filesystem?&lt;/strong&gt;&lt;br&gt;
No. A package manager writes into the root filesystem, and a read-only root has no writable location for it. If that root is protected with dm-verity, any modification breaks hash verification. Use a container image, a RAUC artifact or a sysext image instead.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Does a container update replace the need for A/B base updates?&lt;/strong&gt;&lt;br&gt;
No. A container image update changes the application only. The kernel, bootloader, drivers and base userspace are still delivered by the base image mechanism, which is the only thing that can roll them back after a failed boot.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;How does a separate artifact save flash compared with baking it in?&lt;/strong&gt;&lt;br&gt;
In a symmetric A/B layout the root filesystem exists in both slots, so a large payload is stored twice. RAUC gives this as the reason for artifact repositories: container images, map files and machine learning models go into a repository rather than a slot, so they are stored once, on a writable partition you then manage.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;When does a sysext image fit better than a container?&lt;/strong&gt;&lt;br&gt;
When you have one or two applications, a read-only base image and no isolation requirement, a system extension gives independent versioning without a container runtime. It fits poorly when you need several mutually isolated applications, because system extensions have no dependency mechanism.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://rauc.readthedocs.io/en/latest/basic.html" rel="noopener noreferrer"&gt;RAUC Basics — slots and artifact repositories&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://man7.org/linux/man-pages/man8/systemd-sysext.8.html" rel="noopener noreferrer"&gt;systemd-sysext(8) manual page&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://ostreedev.github.io/ostree/introduction/" rel="noopener noreferrer"&gt;OSTree Overview — libostree documentation&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://docs.yoctoproject.org/dev-manual/packages.html" rel="noopener noreferrer"&gt;Yocto Project — Working with Packages&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://buildroot.org/downloads/manual/manual.html" rel="noopener noreferrer"&gt;The Buildroot user manual&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://web.git.yoctoproject.org/meta-virtualization/about/" rel="noopener noreferrer"&gt;meta-virtualization layer&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;Originally published at &lt;a href="https://www.techveda.live/2026/09/16/containers-vs-packages-embedded/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;. Written by Raghu Bharadwaj.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>embedded</category>
      <category>linux</category>
      <category>yocto</category>
      <category>docker</category>
    </item>
    <item>
      <title>Kernel &amp; Embedded News: Silent Data-Loss Bug Fixed; CRA Reporting Live</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Tue, 15 Sep 2026 11:07:16 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-silent-data-loss-bug-fixed-cra-reporting-live-2oo7</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-silent-data-loss-bug-fixed-cra-reporting-live-2oo7</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;A one-line kernel fix has closed a silent data-loss bug present on x86 since Linux 6.6, triggered when transparent hugepages, MADV_FREE and memory pressure combine. The EU Cyber Resilience Act's vulnerability-reporting obligations became mandatory on 11 September 2026, with a 24-hour first-report deadline for actively exploited vulnerabilities. This edition also covers a record wave of more than 9,000 stable-kernel patches in a single day, Yocto 6.1 reaching feature freeze with OpenSSL 4 and the 7.2 kernel, U-Boot's move to new project infrastructure ahead of its 5 October release, and a patch series that makes full kernel builds roughly a third faster.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Two items this week call for direct attention: a data-corruption fix that affects every x86 kernel since 6.6, and a European reporting obligation that is now in force. The other four are planning signals — stable-kernel patch volume has reached a record, Yocto has frozen the feature list for its next release, U-Boot has moved to new project infrastructure, and kernel build times are set to drop.&lt;/p&gt;

&lt;h2&gt;
  
  
  In this edition
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Silent data loss fixed after three years&lt;/strong&gt; — on x86, writes made after an MADV_FREE call to huge pages could vanish under memory pressure; the one-line fix is headed to every stable series. &lt;em&gt;— patch when your branch picks it up&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;CRA vulnerability reporting is now mandatory&lt;/strong&gt; — since 11 September, manufacturers selling into the EU must report actively exploited vulnerabilities within 24 hours. &lt;em&gt;— act now&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;A record stable wave: more than 9,000 patches in one day&lt;/strong&gt; — seven point releases at once, with maintainers describing heavy AI-generated patch volume. &lt;em&gt;— process signal for LTS consumers&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Yocto 6.1 reaches feature freeze&lt;/strong&gt; — the release building now carries OpenSSL 4, rpm 6, clang 23.1.0 and the 7.2 kernel. &lt;em&gt;— planning signal&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;U-Boot moves its infrastructure ahead of v2026.10&lt;/strong&gt; — rc4 is out, the old lists server is shut down and source.denx.de redirects to git.u-boot-project.org; the final release is due on 5 October. &lt;em&gt;— check your pinned URLs&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Kernel builds set to get a third faster&lt;/strong&gt; — a 23-patch series removes single-threaded bottlenecks in the build process, aimed at Linux 7.4. &lt;em&gt;— worth testing&lt;/em&gt;
&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  A silent data-loss bug, present since Linux 6.6, is fixed with one line
&lt;/h2&gt;

&lt;p&gt;On 2 September, Orson Peters, a developer of the Polars data-analytics library, posted a short C reproducer to the kernel's memory-management list: fill a buffer, call &lt;code&gt;madvise(MADV_FREE)&lt;/code&gt;, write the buffer again, and under cgroup memory pressure the second write can disappear. Later reads return zero-filled pages, with no error reported anywhere. Polars users had already lost production data this way.&lt;/p&gt;

&lt;p&gt;Vernon Yang identified the cause within a day. Since the x86 shadow-stack preparation work that shipped in Linux 6.6, &lt;code&gt;pmd_modify()&lt;/code&gt; has stripped the hardware dirty bit from PMD-mapped transparent hugepages. Memory reclaim then finds a lazy-freed folio with no dirty bit set anywhere and discards it, even though the application rewrote the data after the MADV_FREE call. NUMA balancing can trigger the same loss on its own, and PMD-mapped file THPs can silently miss writeback.&lt;/p&gt;

&lt;p&gt;The fix restores &lt;code&gt;_PAGE_DIRTY&lt;/code&gt; to the preserved mask — one changed line in &lt;code&gt;arch/x86/include/asm/pgtable.h&lt;/code&gt;. Rick Edgecombe, author of the original shadow-stack series, reviewed it and confirmed the stripping was an unintended leftover, and a SUSE engineer reported an independent customer case that the patch resolved. It was merged into mainline after 7.3-rc3 and is tagged for the stable trees. &lt;strong&gt;Every x86 kernel from 6.6 to the current 7.3 release candidates carries this bug; arm64 devices are not affected.&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;The trigger conditions read narrow — huge pages, MADV_FREE, reclaim pressure — but they describe ordinary modern deployments. Memory allocators issue MADV_FREE on their own, and cgroup memory limits are standard under systemd and in containers. x86 industrial PCs, edge gateways and build servers are all in scope.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to check your device
&lt;/h3&gt;

&lt;p&gt;You are exposed if the machine is x86, runs kernel 6.6 or newer, has transparent hugepages enabled, and runs any software that calls MADV_FREE — memory allocators are the usual source. Two commands answer the first three questions:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;uname&lt;/span&gt; &lt;span class="nt"&gt;-rm&lt;/span&gt;
&lt;span class="go"&gt;6.12.110 x86_64
&lt;/span&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;cat&lt;/span&gt; /sys/kernel/mm/transparent_hugepage/enabled
&lt;span class="go"&gt;always [madvise] never
&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;If the bracket sits on &lt;code&gt;always&lt;/code&gt; or &lt;code&gt;madvise&lt;/code&gt;, plan the update. The fix is tagged for stable, so expect it in the next rounds of 6.6.y, 6.12.y, 6.18.y and 7.x.y point releases — take the whole point release rather than the single patch. Until it lands, booting with &lt;code&gt;transparent_hugepage=never&lt;/code&gt; removes the trigger, at a measurable performance cost. arm64 fleets need no action on this one.&lt;/p&gt;

&lt;h2&gt;
  
  
  CRA reporting is no longer a future obligation
&lt;/h2&gt;

&lt;p&gt;Article 14 of the Cyber Resilience Act, Regulation (EU) 2024/2847, began to apply on 11 September 2026. From that date, a manufacturer of a product with digital elements sold in the EU must report an actively exploited vulnerability in the product, or a severe incident affecting the product's security, through ENISA's Single Reporting Platform — which went live the same day. One submission reaches both the coordinating national CSIRT and ENISA.&lt;/p&gt;

&lt;p&gt;The deadlines are short. An early warning is due within 24 hours of becoming aware, a fuller notification within 72 hours, and a final report within 14 days for an actively exploited vulnerability once a corrective measure is available, or within one month for a severe incident. The bulk of the CRA — the essential cybersecurity requirements and CE marking — applies from December 2027, but the reporting duty is in force now, with penalties of up to €15 million or 2.5% of global turnover.&lt;/p&gt;

&lt;p&gt;A legal deadline presupposes detection. A team cannot file an early warning within 24 hours for a vulnerability it learns about weeks late, so monitoring the kernel CVE feed for the exact version a product ships, tracking vendor BSP advisories, and keeping an accurate SBOM stop being internal good practice and become inputs to a statutory deadline. Our &lt;a href="https://www.techveda.live/2026/09/14/linux-kernel-cves-12-sep-2026/" rel="noopener noreferrer"&gt;weekly kernel CVE roundups&lt;/a&gt; and the &lt;a href="https://www.techveda.live/2026/09/09/embedded-linux-support-lifecycle/" rel="noopener noreferrer"&gt;support-clock analysis&lt;/a&gt; describe the monitoring side of exactly this problem.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for manufacturers
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Confirm scope first: the obligation attaches to the manufacturer of a product with digital elements placed on the EU market, wherever the manufacturer is based. An India-based device maker exporting to the EU is covered.&lt;/li&gt;
&lt;li&gt;Route vulnerability intelligence — the kernel CVE feed filtered to your shipped versions, plus vendor advisories — into a channel someone is responsible for watching, not into an individual inbox.&lt;/li&gt;
&lt;li&gt;Assign the 24-hour reporting duty to a role with backup coverage, and register on the Single Reporting Platform before the first incident, not during it.&lt;/li&gt;
&lt;li&gt;Run one internal dry run of a report so the first real submission is not a first attempt.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Seven stable kernels, more than 9,000 patches, one Monday
&lt;/h2&gt;

&lt;p&gt;On 14 September Greg Kroah-Hartman released seven stable kernels at once — 7.2.6, 6.18.52, 6.12.110, 6.6.157, 6.1.188, 5.15.221 and 5.10.270 — carrying more than 9,000 patches between them. He noted the batch may set a record for patch count; 7.2.6 alone contains more than 1,800 patches.&lt;/p&gt;

&lt;p&gt;The volume has a context. In the 7.3 networking pull, Jakub Kicinski, who maintains the networking trees with Paolo Abeni, counted 632 net and 648 net-next patches for the cycle and estimated that a third to half of the net-next patches appeared to be AI-driven low-priority fixes, clean-ups and clarifications. He described the maintainers as "completely overwhelmed", noted that Meta funded enough LLM access to run each incoming patch past several frontier models as a review aid, and said the next step is pointing the tools at process work — managing patchwork, editing commit messages, applying patches already reviewed by trusted people.&lt;/p&gt;

&lt;p&gt;Machine-assisted bug finding is filling the stable queues faster than human review capacity grows. Patch count is not risk count — most of these changes are small, machine-found and low severity — but the practical consequence for anyone consuming LTS kernels is that point releases are getting larger while the weekly cadence stays the same. Skipping releases now builds a bigger, riskier delta than it did a year ago, and vendor kernels that cherry-pick individual fixes fall behind the stable tip faster.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for teams consuming LTS kernels
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Take whole point releases on a fixed schedule instead of accumulating a backlog; the cost of catching up is growing quarter by quarter.&lt;/li&gt;
&lt;li&gt;Put the effort into automated boot and workload regression tests. Reading 1,800 patches per release is not a realistic review strategy for a product team.&lt;/li&gt;
&lt;li&gt;When evaluating a vendor BSP, ask how it consumes stable updates — full point releases or selected backports — and how far behind the stable tip it currently is.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Yocto 6.1 freezes: OpenSSL 4, rpm 6, kernel 7.2
&lt;/h2&gt;

&lt;p&gt;The Yocto Project's weekly status reports place YP 6.1 at Milestone 3 feature freeze, with the M3 build due for release in the week of 14 September and the 6.1.0 release scheduled for the week of 2 November. The stated merge intent for M3 is rpm 6, OpenSSL 4, clang 23.1.0 and the 7.2 Linux kernel. On the stable side, 6.0.3 for the Wrynose LTS has been released, 5.0.20 is in QA, and 6.0.4 is planned for mid-October.&lt;/p&gt;

&lt;p&gt;The OpenSSL jump is the item to plan around. OpenSSL 4.0, released on 14 April 2026, removes ENGINE support along with other legacy interfaces. Anything in a layer stack that still loads an OpenSSL engine — &lt;code&gt;afalg&lt;/code&gt; or &lt;code&gt;devcrypto&lt;/code&gt; for kernel crypto offload, a vendor's hardware crypto engine, an older PKCS#11 engine build — stops working; the provider API is the replacement. Yocto 6.1 is where much of the embedded ecosystem meets that removal for the first time.&lt;/p&gt;

&lt;p&gt;The status reports also record that changes to GitHub's bot and AI protection disrupted the project's CI, and that AI scrapers continue to consume significant sysadmin time and money — the same pressure &lt;a href="https://www.techveda.live/2026/09/08/arm64-big-endian-removal/" rel="noopener noreferrer"&gt;the kernel's own infrastructure reported two weeks ago&lt;/a&gt;. Defending infrastructure from automated crawlers is now permanent work for community build systems.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for Yocto-based products
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Most product teams will stay on 6.0 Wrynose LTS, and &lt;a href="https://www.techveda.live/2026/09/04/yocto-lts-kernel-maintenance/" rel="noopener noreferrer"&gt;what that LTS does and does not maintain&lt;/a&gt; still applies — but 6.1's package set is the version baseline the ecosystem targets next. Treat it as the preview of your next migration.&lt;/li&gt;
&lt;li&gt;Search your layers now for OpenSSL engine usage: &lt;code&gt;ENGINE_&lt;/code&gt; API calls, &lt;code&gt;openssl engine&lt;/code&gt; invocations, and afalg/devcrypto/pkcs11 engine configuration. Every hit is migration work toward providers.&lt;/li&gt;
&lt;li&gt;If you consume package feeds, note the rpm 6 move; if you track linux-yocto, the 6.1 baseline is kernel 7.2.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  U-Boot: one release candidate left, and new project infrastructure
&lt;/h2&gt;

&lt;p&gt;Tom Rini released U-Boot v2026.10-rc4 on 7 September, carrying platform updates for Marvell, NXP Layerscape/QorIQ, i.MX, AMD/Xilinx, Renesas R-Car, Rockchip and STM32, plus fixes in the EFI loader, FPGA, DFU and networking code. One more release candidate is expected in two weeks, and the final v2026.10 release is scheduled for 5 October.&lt;/p&gt;

&lt;p&gt;The announcement also records the next stage of the project's infrastructure migration. The old lists.denx.de server has been shut down, and source.denx.de/u-boot now redirects to git.u-boot-project.org/u-boot, where the git tags and release archives are published. Account registration on the new server will move from open to closed, and the project states it is not planning a web pull-request model — patches stay on the mailing list.&lt;/p&gt;

&lt;p&gt;The redirect keeps existing fetches working today, but the project has not said how long it will remain in place. U-Boot is pinned by URL in a large number of places that outlive any one server: Yocto &lt;code&gt;SRC_URI&lt;/code&gt; entries, Buildroot custom-repository settings, repo manifests, and CI mirror configurations.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to check your build
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Search your layers, manifests and CI configuration for the old hostnames and update the pins to &lt;code&gt;git.u-boot-project.org&lt;/code&gt; at the next planned change:
&lt;/li&gt;
&lt;/ul&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;grep&lt;/span&gt; &lt;span class="nt"&gt;-rn&lt;/span&gt; &lt;span class="s2"&gt;"denx.de"&lt;/span&gt; layers/ manifests/ .gitlab-ci.yml
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;ul&gt;
&lt;li&gt;If a rebase to v2026.10 is on your roadmap, begin board testing on rc4 now — only one release candidate remains before the 5 October release.&lt;/li&gt;
&lt;li&gt;Bookmark the release archive location under git.u-boot-project.org; scripts that scrape the old paths will eventually stop working.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Kernel builds are set to get a third faster
&lt;/h2&gt;

&lt;p&gt;Lorenzo Stoakes of Arm posted a 23-patch series on 8 September that removes single-threaded bottlenecks across the kernel's build plumbing — kallsyms, modpost, objtool, mksysmap and the Rust build — followed by a second revision on 14 September. The measured results: full &lt;code&gt;allmodconfig&lt;/code&gt; builds around 36% faster, incremental builds up to 70% faster, and no-op rebuilds around 90% faster. Two of the patches are already merged, and the rest are aimed at Linux 7.4.&lt;/p&gt;

&lt;p&gt;The method deserves attention alongside the numbers. An LLM was used to locate the bottlenecks and generate first-draft code — Stoakes wrote that it produced "a lot of code, much of it hideous" — after which he audited and rewrote it, verified correctness and performance manually, and marked every commit with an Assisted-by tag. In the same week that networking maintainers described being overloaded by machine-generated submissions, this series shows the same tools producing reviewable, wanted work. The difference is the position of the human: an expert applied the tool to a problem he owns and audited every line, instead of passing unreviewed output to someone else.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to use it
&lt;/h3&gt;

&lt;ul&gt;
&lt;li&gt;Product kernels need no action; if review holds, the improvement arrives with the 7.4 build system, and faster CI follows from upgrading.&lt;/li&gt;
&lt;li&gt;Developers doing iterative kernel work can apply the v2 series to a test tree today and measure their own incremental build times — that is the case the 70% figure describes.&lt;/li&gt;
&lt;li&gt;The tagging convention is worth copying: an explicit Assisted-by record on machine-assisted commits keeps the review honest and the history auditable.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  References
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/all/CAJxLxMUGu1-L+O_nAONOwOXnS=cNbNApCWqdthRjd76LThtSPg@mail.gmail.com/" rel="noopener noreferrer"&gt;MADV_FREE data-loss bug report and reproducer (linux-mm)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/linux-mm/20260903031608.1194238-1-vernon2gm@gmail.com/" rel="noopener noreferrer"&gt;Fix: x86/mm: Fix pmd_modify() dropping the dirty bit&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://eur-lex.europa.eu/eli/reg/2024/2847/oj" rel="noopener noreferrer"&gt;Regulation (EU) 2024/2847 (Cyber Resilience Act), EUR-Lex&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.crowell.com/en/insights/client-alerts/its-live-the-cyber-resilience-act-reporting-is-mandatory-as-of-today-11-september-2026" rel="noopener noreferrer"&gt;CRA reporting in force, 11 September 2026&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lwn.net/Articles/1093985/" rel="noopener noreferrer"&gt;Seven stable kernels, more than 9,000 patches&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://ratatoskr.run/lkml/2026/08/17431143/t" rel="noopener noreferrer"&gt;Networking pull request for 7.3 (Kicinski)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://ratatoskr.run/openembedded-core/2026/09/17492359" rel="noopener noreferrer"&gt;Yocto Project status, 1 September 2026 (WW36)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://ratatoskr.run/yocto/2026/09/17531790" rel="noopener noreferrer"&gt;Yocto Project status, 8 September 2026 (WW37)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://openssl-library.org/post/2026-04-14-openssl-40-final-release/" rel="noopener noreferrer"&gt;OpenSSL 4.0 final release announcement&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://ratatoskr.run/u-boot/2026/09/17527198" rel="noopener noreferrer"&gt;U-Boot v2026.10-rc4 announcement&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://docs.u-boot.org/en/latest/develop/release_cycle.html" rel="noopener noreferrer"&gt;U-Boot release cycle and schedule&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/all/20260914-build-speedup-v2-0-39817ec5db23@kernel.org/" rel="noopener noreferrer"&gt;kbuild speedup series v2 (Lorenzo Stoakes)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.phoronix.com/news/Faster-Kernel-Builds-AI-v2" rel="noopener noreferrer"&gt;Build-speedup numbers for v2&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;TECH VEDA runs live, instructor-led training on the Linux kernel, device drivers and embedded Linux — programs and schedules at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

</description>
      <category>linux</category>
      <category>kernel</category>
      <category>embedded</category>
      <category>security</category>
    </item>
    <item>
      <title>A Certified Hypervisor Does Not Cover the Linux Guest</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Sat, 12 Sep 2026 07:50:09 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/a-certified-hypervisor-does-not-cover-the-linux-guest-2j79</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/a-certified-hypervisor-does-not-cover-the-linux-guest-2j79</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;TÜV Rheinland's public certificate register lists QNX Hypervisor for Safety under number 968/FSP 1976.08/26, assessed against ISO 26262-2:2018, ISO 26262-6:2018 and ISO 26262-8:2018 and usable as a Safety Element out of Context to realise safety goals up to ASIL D. The type designation on that entry is the hypervisor. It is not the guests the hypervisor hosts, and the standards list does not include ISO 26262-9:2018, which is the part covering criteria for coexistence of elements and analysis of dependent failures. A Linux guest placed beside a certified hypervisor inherits a partitioning mechanism, not a safety argument.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Engineers consolidating an instrument cluster, an infotainment surface and a body-control function onto one system-on-chip are usually told the same thing by the platform team: the hypervisor is certified, so the Linux side is isolated and stays outside the safety argument. The first half of that sentence can be checked in a public register in about two minutes. The second half is not written anywhere in the certificate. This post reads the actual register entry for a certified hypervisor, states what its scope covers, and works through what a Linux guest sitting next to it still owes the person who has to build the item.&lt;/p&gt;

&lt;h2&gt;
  
  
  What the public register actually records
&lt;/h2&gt;

&lt;p&gt;TÜV Rheinland publishes its functional-safety product certificates in a searchable database at fs-products.tuvasi.com. Read on 12 September 2026, that database showed 7,042 records with a dateline of 09-2026. Two entries in it matter to anyone relying on a certified hypervisor, and QNX links to both from its own certifications page.&lt;/p&gt;

&lt;p&gt;The first is certificate 968/FSP 1976.08/26. The certificate holder and manufacturer is BlackBerry Limited. The product category is Software with the sub-category Others, the subject is recorded as "Hypervisor", and the type designation is "QNX Hypervisor for Safety (QHS)", with released and approved versions deferred to a separate revision list. The codes and standards are given as six documents: IEC 61508-1:2010, IEC 61508-3:2010, ISO 26262-2:2018, ISO 26262-6:2018, ISO 26262-8:2018, and IEC 62304:2006 with Amendment 1:2015, the last one explicitly excluding clauses 4.2 and 4.4. The scope states that the product complies with the requirements of those standards at ASIL D according to ISO 26262, SC 3 according to IEC 61508 and Class C according to IEC 62304, and that it can be used as a Safety Element out of Context in items in order to realise safety goals up to ASIL D.&lt;/p&gt;

&lt;p&gt;The second is certificate 968/FSP 2999.02/26, for QNX OS for Safety, categorised as Software and subject "Real Time Operating System (RTOS)". It names the same six standards and reaches the same integrity levels. It also does something more interesting, which is to scope the product internally. The register entry states that the provided tool chain, classified as TCL3 and T3, complies with the applicable requirements for supporting tools according to ISO 26262-8 and off-line support tools according to IEC 61508-3. It then splits the C++ library in two: the runtime components can be used to realise safety goals up to ASIL D, while &lt;strong&gt;the C++ library headers and templates can be used only up to ASIL B according to ISO 26262 and SIL 1 according to IEC 61508&lt;/strong&gt;.&lt;/p&gt;

&lt;p&gt;That split deserves attention, because it is the clearest available demonstration that a certificate is a statement about parts of a product rather than about a product. Two pieces of the same shipped library, from the same vendor, under one certificate number, carry different integrity ceilings. An application that instantiates a template from that library inside an ASIL D function cannot lean on the certificate for that instantiation. The register does not record the assessor's reasoning, so this post does not offer one. What it does record is the boundary, and with a certified hypervisor as with a certified library, the boundary is the thing an integrator has to design around.&lt;/p&gt;

&lt;p&gt;Both entries carry the same two administrative facts. Under "Valid Until" each says "no expiry date". Under "Specific Provisions" each says that the operating conditions and functional characteristics specified in the Safety Manual and accompanying documents must be observed, and that the current versions of software are specified in the currently valid revision list, released by the manufacturer in cooperation with the certification body. The hypervisor entry's revision list is dated 12 March 2026; the OS entry's is dated 13 March 2026.&lt;/p&gt;

&lt;h2&gt;
  
  
  The strongest case for putting the critical function on the microkernel
&lt;/h2&gt;

&lt;p&gt;Before any Linux-side response, it is worth stating plainly why a functional-safety engineer picks a certified microkernel, and a certified hypervisor above it, for the domain whose failure can injure a person, because the reasons are good ones and they are not commercial.&lt;/p&gt;

&lt;p&gt;The first is that the evidence already exists and has a reference number. An integrator can put "968/FSP 1976.08/26" into a safety plan and an assessor can look it up. That is a different situation from having to construct a qualification argument for a component from scratch, and the difference shows up in schedule and in cost.&lt;/p&gt;

&lt;p&gt;The second is that Safety Element out of Context is a real division of labour, not a label. The supplier has performed development activities against ISO 26262-2:2018 and ISO 26262-6:2018 and hands over a Safety Manual containing the assumptions it made about the context it would be used in. The integrator's remaining job is to check those assumptions hold in the actual item and to document where they do not. That is bounded work that can be planned and staffed. Building the equivalent evidence for an uncertified component is not bounded in the same way.&lt;/p&gt;

&lt;p&gt;The third is the tool chain. ISO 26262-8:2018 lists confidence in the use of software tools among its subjects, and qualifying a compiler is a substantial exercise on its own. The QNX OS for Safety register entry places the supplied tool chain inside the assessed scope at TCL3 and T3. Anyone who has priced a compiler qualification separately will understand what that is worth.&lt;/p&gt;

&lt;p&gt;The fourth is architectural. A microkernel moves device drivers, file systems and protocol stacks out of the privileged kernel and runs them as ordinary user-space processes. The code executing at the highest privilege level is therefore much smaller than in a monolithic kernel, and a fault in a driver is a fault in a restartable process rather than a fault inside the trusted computing base. The QNX Hypervisor for Safety 8.0 solution brief describes exactly this arrangement, with the QNX scheduler managing guest execution and separate process and memory managers enforcing isolation and controlled shared memory.&lt;/p&gt;

&lt;p&gt;The fifth is timing. The same brief states that the hypervisor supports Virtualization Host Extensions on ARMv8 AArch64 processors, which lets it run at Exception Level 2, the privilege level the hardware provides for virtualisation, and that this reduces the cost of switching between guests and the hypervisor. It also states that both Symmetrical Multiprocessing and Bound Multiprocessing are supported, so virtual CPUs can be pinned to specific physical cores. Pinning is not a performance optimisation in this context; it is how an integrator removes a scheduling variable from the timing argument.&lt;/p&gt;

&lt;p&gt;The sixth is accountability. One company's name sits on the certified hypervisor's register entry, and the revision list is released by that company in cooperation with the certification body. When a defect is found there is one party responsible for the corrective action and one register entry that gains a new revision. An OEM's supplier-quality process is built around exactly that shape.&lt;/p&gt;

&lt;p&gt;An engineer who chooses this arrangement for a function with a high integrity target is not dressing up a commercial preference as an engineering one. In choosing a certified hypervisor they are choosing the option where the evidence already exists, where the residual work is bounded, and where somebody else is contractually answerable for the part they did not write.&lt;/p&gt;

&lt;h2&gt;
  
  
  Where a certified hypervisor stops
&lt;/h2&gt;

&lt;p&gt;The register entry is precise about its subject, and reading it closely tells you where the certified hypervisor's scope ends.&lt;/p&gt;

&lt;p&gt;The type designation is "QNX Hypervisor for Safety (QHS)". A guest operating system is not part of that designation. The product's own solution brief states that it enables multiple guest operating systems including Android, Linux and QNX to run on a single system-on-chip. Running a guest is what a certified hypervisor does; certifying that guest is not.&lt;/p&gt;

&lt;p&gt;The Specific Provisions field makes the Safety Manual binding. Any claim an integrator makes on the strength of a certified hypervisor is conditional on the operating conditions and functional characteristics that manual states. If the manual assumes a particular configuration and the item ships a different one, the certificate has not been invalidated so much as never applied.&lt;/p&gt;

&lt;p&gt;The absence of an expiry date is easy to misread. It does not mean the certificate covers whatever version is current. It means the version coverage lives in the revision list instead, and that list carries a date — 12 March 2026 for the hypervisor entry when this post was written. Moving to a hypervisor build that is not on the current list is a change-impact question, not a free upgrade.&lt;/p&gt;

&lt;p&gt;The most consequential omission is in the codes and standards list, and it is an omission by structure rather than by oversight. The list names parts 2, 6 and 8 of ISO 26262:2018. It does not name part 9. ISO 26262-9:2018, "Automotive safety integrity level (ASIL)-oriented and safety-oriented analyses", is Edition 2, published on 17 December 2018, 29 pages, and its ISO catalogue abstract lists its subject matter as requirements decomposition with respect to ASIL tailoring, criteria for coexistence of elements, analysis of dependent failures, and safety analyses. Those are the analyses that decide whether elements of different integrity levels may sit together and whether a single cause can take out more than one of them. They are performed on the item. A product certificate for a hypervisor cannot contain them, because the elements that have to coexist are not known until an integrator picks them. The coexistence question is therefore not answered by buying a certified hypervisor; it is opened by it.&lt;/p&gt;

&lt;p&gt;One further scope limit is recorded by the vendor rather than the assessor. The QNX Hypervisor for Safety 8.0 solution brief carries a certification-scope table which marks ISO/SAE 21434, the road-vehicle cybersecurity engineering standard, as complete for QNX OS for Safety and "In Progress" for QNX Hypervisor for Safety. Functional safety and cybersecurity are separate assessments with separate scopes, and a product can hold one without the other.&lt;/p&gt;

&lt;h2&gt;
  
  
  Three ways a device reaches a guest, and what each costs the argument
&lt;/h2&gt;

&lt;p&gt;The partitioning a certified hypervisor performs becomes concrete at the device boundary. The QNX Hypervisor for Safety 8.0 solution brief states that each virtual machine is configured like a physical board, with memory and devices explicitly assigned to either the guest or the hypervisor, and that a device can be configured in one of three ways.&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Configuration&lt;/th&gt;
&lt;th&gt;What it means&lt;/th&gt;
&lt;th&gt;What it costs the interference argument&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;Emulated&lt;/td&gt;
&lt;td&gt;The hypervisor fully emulates the device, so the guest needs no driver change.&lt;/td&gt;
&lt;td&gt;Every device access traps into the host, which costs throughput and adds latency. The emulation code itself sits inside the host's scope and has to be treated accordingly.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Para-virtualised, VirtIO compliant&lt;/td&gt;
&lt;td&gt;The guest runs a virtual driver that talks to the host through a standardised interface.&lt;/td&gt;
&lt;td&gt;Far fewer traps, and the guest driver is portable because VirtIO is standardised and already in the Linux kernel. The cost is a shared-memory channel between domains, which is a coupling path the analysis has to account for.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Physical pass-through&lt;/td&gt;
&lt;td&gt;The guest accesses the physical device directly, at native performance.&lt;/td&gt;
&lt;td&gt;The device becomes a bus master under the guest's control. Stage-2 address translation constrains what the guest's CPUs can reach; it does not constrain what a device they program can reach.&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;That last row is where most of the real engineering sits, and it is the reason the solution brief singles out one component by name. QNX Hypervisor for Safety includes an SMMU manager service, smmuman, which works with the hardware System Memory Management Units to confine Direct Memory Access devices so that DMA-initiated transfers cannot reach memory beyond approved regions. Without a correctly configured SMMU behind a passed-through device, a buggy or compromised Linux guest can program that device to write anywhere in physical memory, including into the safety domain, and no amount of CPU-side partitioning will stop it. The SMMU configuration is therefore not a performance detail. It is load-bearing in the freedom-from-interference argument, and it is configuration the integrator sets and must verify rather than something a certified hypervisor supplies ready-made.&lt;/p&gt;

&lt;h2&gt;
  
  
  Interference the partition does not remove
&lt;/h2&gt;

&lt;p&gt;Address-space isolation answers one question: which memory can this software name. It does not answer the other one: which resources do these domains share whether they name them or not. On a consolidated system-on-chip, the shared resources are substantial and they all sit below the certified hypervisor.&lt;/p&gt;

&lt;p&gt;Both domains draw from the same memory controllers. A Linux guest running a display compositor, a camera pipeline or a container build can lengthen the safety domain's memory access times through queueing at the controller without ever issuing an address the partition would refuse. The same applies to the last-level cache, where pressure from one domain changes the execution-time distribution of the other, and to the on-chip interconnect, where arbitration is shared. Thermal behaviour couples them too: sustained load in one domain raises die temperature and can trigger frequency reduction that both domains experience. Where a GPU or a video engine is shared between a cluster surface and an infotainment surface, the coupling is direct.&lt;/p&gt;

&lt;p&gt;Two consequences follow for anyone building the timing evidence. The first is that latency measurements taken with the Linux guest idle are not evidence about the shipped system; the measurement has to be made with the guest under its worst realistic load, and that load has to be described in the evidence. The second is that these coupling paths are properties of the silicon and the workload rather than of the hypervisor, which is precisely why the analysis of dependent failures named in the ISO 26262-9:2018 abstract is item-level work that no supplier can have done in advance.&lt;/p&gt;

&lt;p&gt;None of this is a criticism of the QNX product. It applies identically when both domains run QNX. A certified hypervisor decides what software is permitted to name; the silicon decides what the domains physically share. Those are different problems and only the first one has a certificate.&lt;/p&gt;

&lt;h2&gt;
  
  
  What changed between December 2019 and March 2026
&lt;/h2&gt;

&lt;p&gt;On 9 December 2019, BlackBerry announced that QNX Hypervisor 2.0 for Safety had been recognised as ISO 26262 ASIL D compliant by TÜV Rheinland, describing it as the world's first ASIL D safety-certified commercial hypervisor. The announcement named two standards: ISO 26262 at ASIL D and IEC 61508 at SIL 3. Thomas Steffens of TÜV Rheinland Industrie Service GmbH was quoted in it.&lt;/p&gt;

&lt;p&gt;The register entry that exists today is a considerably more detailed object. Certificate 968/FSP 1976.08/26 carries a revision index of .08 and a 2026 registration year. It names six standard documents with their edition years rather than two standard families. It states which IEC 62304 clauses are outside the assessed scope, and separately excludes from the certification the risk-management process that IEC 62304 requires. It attaches a dated revision list for covered software versions. And the product it describes is QNX Hypervisor for Safety 8.0, built on QNX OS for Safety and on QNX Software Development Platform 8.0, according to the product page published on 10 March 2026.&lt;/p&gt;

&lt;p&gt;The useful reading of that change is not that the product got better, which the register does not say. It is that a certificate is a maintained object rather than an award. The revision index advances, the covered-version list is reissued with a new date, and exclusions are stated explicitly. An integrator citing a certified hypervisor on the strength of the 2019 headline would be carrying a claim that is now seven years old, would have no idea which software versions are actually covered, and would miss the excluded clauses entirely. The lesson is not specific to this vendor. Before relying on any certified hypervisor, read the register entry rather than the announcement.&lt;/p&gt;

&lt;h2&gt;
  
  
  What the Linux guest is actually for
&lt;/h2&gt;

&lt;p&gt;The honest answer for the domain with the highest integrity target is that Linux is not the right tool for it today, and the register is the reason. There is no equivalent entry for a Linux kernel at ASIL D. The assessed Linux platform that does exist sits two integrity levels lower: Red Hat announced on 20 May 2025 that Red Hat In-Vehicle Operating System had achieved functional safety certification as a Safety Element out of Context against ISO 26262 Edition 2, 2018, at Level ASIL-B, with exida as the assessor, and stated that customers receive a Safety Guidance document including Assumptions of Use. That is the same shape of deliverable as the QNX Safety Manual, at a different level, from a different assessor. If you want the detail of what a Linux certificate does and does not bound, we covered that separately in &lt;a href="https://www.techveda.live/2026/09/04/linux-safety-certification/" rel="noopener noreferrer"&gt;what a Linux safety certification actually covers&lt;/a&gt;.&lt;/p&gt;

&lt;p&gt;What the Linux guest is for is the part of the vehicle that changes. Graphics and display stacks, connectivity, media, camera and sensor pipelines through V4L2, container runtimes, the application layer and the update path. The reason to put that next to a safety domain on one chip is not that it has become safe. It is that the bill of materials no longer supports a separate electronic control unit for it, and that the two halves have incompatible release rhythms. The infotainment surface wants a new build every few weeks. The certified domain wants to move as rarely as possible, because every move reopens a change-impact question against a dated revision list.&lt;/p&gt;

&lt;p&gt;That lifecycle separation is the actual commercial driver behind consolidation, and it is what a partition with a documented interference argument buys. It is not isolation for its own sake. What a certified hypervisor is bought for is the ability to ship the fast-moving half without reassessing the slow-moving one.&lt;/p&gt;

&lt;p&gt;The open-source side of the industry is converging on the same shape independently. Automotive Grade Linux announced its SoDeV reference platform on 5 December 2025, combining the AGL Unified Code Base with Linux containers, the Unified HMI framework contributed by Panasonic Automotive Systems, VirtIO, the Xen type 1 hypervisor, the Yocto Project and the Zephyr RTOS, with AGL stating that it is collaborating with the ELISA Project to support future ASIL functional-safety applications within SoDeV. The initiative is led by Panasonic Automotive Systems, Honda and the AGL SDV Expert Group, with contributions from Toyota, Mazda, AISIN and Renesas, and availability was planned for early 2026. General-purpose Linux beside a small RTOS under a type 1 hypervisor is the same architectural answer, reached with an open hypervisor that carries no product certificate at that layer. Whether a certified hypervisor or an open one is the right choice depends entirely on what the integrator has to prove and to whom.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;TÜV Rheinland certificate 968/FSP 1976.08/26 covers QNX Hypervisor for Safety as a Safety Element out of Context up to ASIL D, against ISO 26262-2, -6 and -8:2018. The type designation is the hypervisor; guest operating systems are not in it.&lt;/li&gt;
&lt;li&gt;ISO 26262-9:2018, whose abstract names criteria for coexistence of elements and analysis of dependent failures, is absent from that standards list. Those analyses are item-level work that no component supplier can complete in advance.&lt;/li&gt;
&lt;li&gt;A certificate with no expiry date still limits its coverage, through a dated revision list of software versions — 12 March 2026 for the hypervisor entry, 13 March 2026 for the QNX OS for Safety entry.&lt;/li&gt;
&lt;li&gt;Certificate 968/FSP 2999.02/26 scopes one library in two pieces: C++ runtime components up to ASIL D, headers and templates up to ASIL B. Certificates describe parts of products, not products.&lt;/li&gt;
&lt;li&gt;Stage-2 translation controls what software can name. Memory bandwidth, last-level cache, interconnect arbitration, thermal behaviour and shared accelerators are not controlled by it, and timing evidence measured with the Linux guest idle is not evidence about the shipped system.&lt;/li&gt;
&lt;li&gt;For a passed-through device, the SMMU configuration is part of the freedom-from-interference argument, not a performance setting. It is configuration the integrator owns, not something a certified hypervisor settles.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;Does a certified hypervisor make the Linux guest safety-certified?&lt;/strong&gt;&lt;br&gt;
No. The type designation on certificate 968/FSP 1976.08/26 is QNX Hypervisor for Safety. Guest operating systems are not part of the certified product, and the certificate makes no statement about them.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Why does it matter that ISO 26262-9:2018 is not in the certificate's standards list?&lt;/strong&gt;&lt;br&gt;
Part 9 covers criteria for coexistence of elements and analysis of dependent failures, according to its ISO catalogue abstract. Those analyses depend on which elements are actually combined in the item, so they can only be performed by the integrator, not by the component supplier in advance.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;The certificate says "no expiry date". Does that mean any version is covered?&lt;/strong&gt;&lt;br&gt;
No. The covered software versions are listed in a separate revision list that the manufacturer releases in cooperation with the certification body. The hypervisor entry's list is dated 12 March 2026, so moving to a build outside it is a change-impact question.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;If a certified hypervisor partitions memory, why does the Linux guest's workload still affect timing in the safety domain?&lt;/strong&gt;&lt;br&gt;
Because the partition controls address spaces, not shared hardware. Both domains use the same memory controllers, caches, interconnect and thermal budget, so load in one can lengthen execution times in the other without any address-space violation occurring.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Is there a Linux equivalent of the ASIL D certificate held by QNX OS for Safety?&lt;/strong&gt;&lt;br&gt;
Not at that level in the public record checked for this post. The assessed Linux platform that exists is Red Hat In-Vehicle Operating System, certified as a Safety Element out of Context against ISO 26262 Edition 2, 2018 at Level ASIL-B, with exida as the assessor.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;a href="https://fs-products.tuvasi.com/certificates?cert_id=13917" rel="noopener noreferrer"&gt;TÜV Rheinland FS-Products certificate register, entry 968/FSP 1976.08/26 — QNX Hypervisor for Safety&lt;/a&gt; (primary; read 12 September 2026)&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://fs-products.tuvasi.com/certificates?cert_id=13916" rel="noopener noreferrer"&gt;TÜV Rheinland FS-Products certificate register, entry 968/FSP 2999.02/26 — QNX OS for Safety&lt;/a&gt; (primary; read 12 September 2026)&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://qnx.software/content/dam/qnx-xwalk/pdf/product-briefs/qnx-hypervisor-for-safety-8-product-brief.pdf" rel="noopener noreferrer"&gt;QNX Hypervisor for Safety 8.0 solution brief&lt;/a&gt; (primary vendor document, BlackBerry Limited, 2026)&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://qnx.software/en/developers/developer-roadmap/certifications-and-compliance" rel="noopener noreferrer"&gt;QNX Safety Certifications, Compliance and Conformance&lt;/a&gt; (vendor certifications index linking the register entries)&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.iso.org/standard/68391.html" rel="noopener noreferrer"&gt;ISO 26262-9:2018 catalogue entry — ASIL-oriented and safety-oriented analyses&lt;/a&gt; (primary)&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.iso.org/standard/68388.html" rel="noopener noreferrer"&gt;ISO 26262-6:2018 catalogue entry — Product development at the software level&lt;/a&gt; (primary)&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.prnewswire.com/news-releases/blackberry-qnx-hypervisor-awarded-worlds-first-automotive-safety-integrity-level-asil-d-certification-300969956.html" rel="noopener noreferrer"&gt;BlackBerry announcement, 9 December 2019 — QNX Hypervisor 2.0 for Safety ASIL D&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.redhat.com/en/about/press-releases/red-hat-prepares-new-future-software-defined-vehicles-upcoming-general-availability-red-hat-vehicle-operating-system" rel="noopener noreferrer"&gt;Red Hat press release, 20 May 2025 — In-Vehicle Operating System SEooC certification at ASIL-B&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.automotivelinux.org/announcements/sodev/" rel="noopener noreferrer"&gt;Automotive Grade Linux, 5 December 2025 — SoDeV reference platform announcement&lt;/a&gt; (primary)&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;Originally published on &lt;a href="https://www.techveda.live/2026/09/12/certified-hypervisor-linux-guest/" rel="noopener noreferrer"&gt;TECH VEDA&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

&lt;p&gt;At TECH VEDA we train engineers on the Linux kernel, device drivers and embedded Linux — including the parts of a vehicle stack that sit on the Linux side of a partition like the one described above. If your team is working through BSP, real-time or platform-architecture questions, get in touch at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;.&lt;/p&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

</description>
      <category>linux</category>
      <category>automotive</category>
      <category>embedded</category>
      <category>safety</category>
    </item>
    <item>
      <title>Secure Boot Key Custody: Who Holds the Signing Key?</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Thu, 10 Sep 2026 05:28:53 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/secure-boot-key-custody-who-holds-the-signing-key-1dc8</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/secure-boot-key-custody-who-holds-the-signing-key-1dc8</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Keep the production signing key off the build machine and reach it through a PKCS#11 token or an HSM, and run a separate development key that is never fused into a production part. The cost is that your continuous integration system can no longer produce a shippable image on its own. The gain is that a compromised build server does not become a compromised product line.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Secure boot key custody is the decision about where the private key that signs your firmware lives, and who can make it sign something. It is rarely decided deliberately, and usually settled when someone follows the vendor application note, runs the code signing tool against a directory of sample keys, and commits that directory so the next engineer can build. Months later the product ships, and the key that authorises every update sits in a shared repository.&lt;/p&gt;

&lt;h2&gt;
  
  
  The context
&lt;/h2&gt;

&lt;p&gt;The hardware side is irreversible. On i.MX parts using HABv4 the public Super Root Keys form an SRK table, that table is hashed, and the hash is programmed into fuses. The Foundries.io i.MX reference states the consequence plainly: once programmed, those fuses cannot be modified. A further fuse, &lt;code&gt;SEC_CONFIG[1]&lt;/code&gt;, moves the part into the closed state, and a production device should also lock the SRK values. Other families use different names for the same arrangement, and none of them reopen a closed part.&lt;/p&gt;

&lt;p&gt;The key also has to outlive the people and machines around it. A product with a ten-year field life needs a valid signature for ten years, while build servers get rebuilt and the engineer who made the key leaves. &lt;strong&gt;A key that exists only as a file on a machine has a shorter expected life than the product it authorises.&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;The third property is easy to miss. Secure boot key custody is one question repeated at each verification boundary, and the boundaries use different tools:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;The boot ROM verifies the first-stage loader, using the vendor key tree and Code Signing Tool.&lt;/li&gt;
&lt;li&gt;U-Boot verifies the FIT image holding the kernel and device tree, using a key whose public half sits in its control device tree.&lt;/li&gt;
&lt;li&gt;The kernel verifies loadable modules, using the key named by &lt;code&gt;CONFIG_MODULE_SIG_KEY&lt;/code&gt;.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Teams often protect the first key carefully and leave the other two in the build tree, which leaves a supported path to running an attacker's kernel on a device that reports secure boot as on.&lt;/p&gt;

&lt;h2&gt;
  
  
  The options
&lt;/h2&gt;

&lt;h3&gt;
  
  
  Option 1: key files in the source tree
&lt;/h3&gt;

&lt;p&gt;The key pair is generated once and committed with the build metadata. In Yocto you point &lt;code&gt;UBOOT_SIGN_KEYDIR&lt;/code&gt; at a directory in a layer, or set &lt;code&gt;FIT_GENERATE_KEYS = "1"&lt;/code&gt; (the default is "0") so the build creates a pair when none exists.&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight conf"&gt;&lt;code&gt;&lt;span class="c"&gt;# local.conf — development chain
&lt;/span&gt;&lt;span class="n"&gt;UBOOT_SIGN_ENABLE&lt;/span&gt; = &lt;span class="s2"&gt;"1"&lt;/span&gt;
&lt;span class="n"&gt;UBOOT_SIGN_KEYDIR&lt;/span&gt; = &lt;span class="s2"&gt;"${TOPDIR}/../keys/dev"&lt;/span&gt;
&lt;span class="n"&gt;UBOOT_SIGN_KEYNAME&lt;/span&gt; = &lt;span class="s2"&gt;"dev"&lt;/span&gt;
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;Any engineer can build, bisect a boot regression and reproduce a customer's binary. Against that, the key is readable by anyone with repository access. Fused into shipping parts, it means the number of people who can sign your firmware equals the number who have ever had a checkout.&lt;/p&gt;

&lt;h3&gt;
  
  
  Option 2: key files on a restricted build server
&lt;/h3&gt;

&lt;p&gt;The key stays out of version control on one machine, readable only by the release account. This is a real improvement for little work and keeps release signing automatic. Against that, the key is still an extractable file that anyone who can run a job on that machine can copy without leaving evidence.&lt;/p&gt;

&lt;h3&gt;
  
  
  Option 3: a PKCS#11 token or HSM the build calls
&lt;/h3&gt;

&lt;p&gt;The private key is generated inside a smartcard, token or HSM and never leaves it: the build sends a hash and receives a signature. U-Boot's &lt;code&gt;mkimage&lt;/code&gt; supports this through an OpenSSL engine:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;export &lt;/span&gt;&lt;span class="nv"&gt;MKIMAGE_SIGN_PIN&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;&lt;span class="k"&gt;******&lt;/span&gt;
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;./tools/mkimage &lt;span class="nt"&gt;-F&lt;/span&gt; &lt;span class="nt"&gt;-N&lt;/span&gt; pkcs11 &lt;span class="nt"&gt;-r&lt;/span&gt; &lt;span class="se"&gt;\&lt;/span&gt;
&lt;span class="gp"&gt;    -k "pkcs11:serial=000xxxxxxxxx;&lt;/span&gt;&lt;span class="nv"&gt;object&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;Signature%20key&lt;span class="s2"&gt;" &lt;/span&gt;&lt;span class="se"&gt;\&lt;/span&gt;&lt;span class="s2"&gt;
&lt;/span&gt;&lt;span class="go"&gt;    -K u-boot.dtb fitImage
&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;&lt;code&gt;-N pkcs11&lt;/code&gt; selects the engine, &lt;code&gt;-k&lt;/code&gt; supplies the token URL, &lt;code&gt;-K&lt;/code&gt; writes the public key into U-Boot's control device tree, and &lt;code&gt;-r&lt;/code&gt; marks it required, so U-Boot refuses a configuration it cannot verify.&lt;/p&gt;

&lt;p&gt;The key is marked &lt;code&gt;CKA_SENSITIVE&lt;/code&gt; and &lt;code&gt;CKA_NEVER_EXTRACTABLE&lt;/code&gt;, so an attacker who compromises the build machine cannot leave with the ability to sign forever. They can still sign anything they like while access lasts, which is why this bounds the damage rather than preventing it. Against that, someone must own the token, its PIN and its backup, and a lost token with no spare key in the SRK table ends updates.&lt;/p&gt;

&lt;h3&gt;
  
  
  Option 4: a detached signing step after the build
&lt;/h3&gt;

&lt;p&gt;The build produces an unsigned artefact and a small separate process signs it, which U-Boot supports because &lt;code&gt;mkimage -F&lt;/code&gt; adds signatures to an existing FIT image. The component holding the key runs almost no code, and signing becomes an auditable event with a requester and an approver. Against that, it is the most work to set up.&lt;/p&gt;

&lt;h2&gt;
  
  
  The decision
&lt;/h2&gt;

&lt;p&gt;For a product that will be closed in production, settle secure boot key custody as two key chains from the first week, and put the production key in hardware. The development chain uses option 1: keys in the repository, parts left open. Name that key &lt;code&gt;dev&lt;/code&gt; and never fuse its hash into a part you sell. The production chain uses option 3 for the key material and option 4 for the process.&lt;/p&gt;

&lt;p&gt;Two details matter. First, decide the key inventory before the first fuse is burnt. On i.MX the SRK table holds up to four public keys, and the &lt;code&gt;SRK_REVOKE&lt;/code&gt; fuses cover only the first three, so a full table leaves one key that cannot be revoked as the fallback. A single-key table has no recovery path at all.&lt;/p&gt;

&lt;p&gt;Second, U-Boot can require more than one signature. The &lt;code&gt;required&lt;/code&gt; property on a key node accepts &lt;code&gt;image&lt;/code&gt; or &lt;code&gt;conf&lt;/code&gt;, and the &lt;code&gt;/signature&lt;/code&gt; node accepts &lt;code&gt;required-mode&lt;/code&gt; with the values &lt;code&gt;any&lt;/code&gt; or &lt;code&gt;all&lt;/code&gt;:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;fdtput &lt;span class="nt"&gt;-t&lt;/span&gt; s control.dtb /signature required-mode all
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;With &lt;code&gt;any&lt;/code&gt;, a configuration signed by either of two required keys boots, which makes staged rotation possible: ship a release trusting old and new keys, then retire the old one. With &lt;code&gt;all&lt;/code&gt;, both signatures are demanded, which supports two-person release control. That part of secure boot key custody is hard to change once devices ship.&lt;/p&gt;

&lt;p&gt;The simpler options are sometimes right. If parts are never closed, the signature is a build convention rather than a control, so option 1 is proportionate and option 3 is unnecessary expense. If the team is two people and the alternative to committing a key is not shipping, commit the key, but record which fuse burn would make that permanent.&lt;/p&gt;

&lt;p&gt;Custody protects the key; it says nothing about the correctness of the code that checks the signature. A verifier with a parsing flaw will accept an image the key never authorised.&lt;/p&gt;

&lt;h2&gt;
  
  
  The consequences of secure boot key custody
&lt;/h2&gt;

&lt;p&gt;Secure boot key custody is easier to plan than to discover during a release.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Builds stop being self-contained.&lt;/strong&gt; A signed release can no longer be reproduced from source alone, so the build documentation has to name who approves a signature. Development builds must stay reproducible or engineers cannot bisect.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;The module key needs its own answer.&lt;/strong&gt; The kernel build generates a key pair into &lt;code&gt;certs/signing_key.pem&lt;/code&gt; when none is present, and setting &lt;code&gt;CONFIG_MODULE_SIG_KEY&lt;/code&gt; to anything else disables that generation. It also accepts a PKCS#11 URI (RFC 7512). The kernel documentation is direct: the private key must be destroyed or moved to a secure location, not left in the source tree.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Verification is not one symbol.&lt;/strong&gt; FIT verification needs &lt;code&gt;CONFIG_FIT_SIGNATURE&lt;/code&gt; plus &lt;code&gt;CONFIG_RSA&lt;/code&gt; or &lt;code&gt;CONFIG_ECDSA&lt;/code&gt;, and U-Boot's documentation warns that &lt;code&gt;CONFIG_LEGACY_IMAGE_FORMAT&lt;/code&gt; must stay disabled, because it offers a path around the check.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;Secure boot key custody is decided in practice by whoever produces the first signed image. Decide it before any fuse is programmed.&lt;/li&gt;
&lt;li&gt;Run two chains: a development key in the repository for open parts, and a production key that is never a file.&lt;/li&gt;
&lt;li&gt;A token or HSM converts a stolen key into temporary signing access.&lt;/li&gt;
&lt;li&gt;Populate the whole SRK table before it is hashed into fuses, so revocation and rotation stay possible.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;Can we move the signing key into an HSM after the product has shipped?&lt;/strong&gt;&lt;br&gt;
You can move the key material only if it is still extractable. What you cannot change is which public key the parts in the field already trust, because that hash is in fuses. Settle secure boot key custody before the first production fuse burn.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Is a signed FIT image enough on its own?&lt;/strong&gt;&lt;br&gt;
No. U-Boot verifies the FIT image only if the public key is marked required in its control device tree, and only if U-Boot itself was verified by the stage before it. If the boot ROM does not authenticate the loader, an attacker replaces the loader and its trusted key together.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;What happens to the signing token when the engineer holding it leaves?&lt;/strong&gt;&lt;br&gt;
A token in one person's drawer is a single point of failure with no backup. Either use an HSM with a documented operator model, or populate the whole SRK table so a lost key can be revoked.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;a href="https://docs.u-boot.org/en/latest/usage/fit/signature.html" rel="noopener noreferrer"&gt;U-Boot FIT Signature Verification&lt;/a&gt; — control-FDT key storage, &lt;code&gt;required-mode&lt;/code&gt;, and PKCS#11 signing.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.kernel.org/admin-guide/module-signing.html" rel="noopener noreferrer"&gt;Kernel module signing facility&lt;/a&gt; — &lt;code&gt;CONFIG_MODULE_SIG_KEY&lt;/code&gt; and protecting the private key.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.yoctoproject.org/ref-manual/classes.html" rel="noopener noreferrer"&gt;Yocto Project Reference Manual: Classes&lt;/a&gt; — the signing and key-generation variables.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.foundries.io/86/reference-manual/security/secure-boot-imx-habv4.html" rel="noopener noreferrer"&gt;i.MX Secure Boot on HABv4 Supported Devices&lt;/a&gt; — SRK table hashing and the fuse-programming steps.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.nxp.com/webapp/Download?colCode=AN4581&amp;amp;location=null" rel="noopener noreferrer"&gt;NXP AN4581: Secure Boot Using HABv4&lt;/a&gt; — the PKI tree, SRK revocation and the Code Signing Tool.&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;We teach the U-Boot, Yocto and BSP side of this in &lt;a href="https://www.techveda.live/embedded-linux-yocto/" rel="noopener noreferrer"&gt;TECH VEDA's embedded Linux training&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>linux</category>
      <category>embedded</category>
      <category>kernel</category>
      <category>security</category>
    </item>
    <item>
      <title>Kernel &amp; Embedded News: Arm64 Drops Big-Endian, Boots CPUs in Parallel</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Tue, 08 Sep 2026 04:54:32 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-arm64-drops-big-endian-boots-cpus-in-parallel-4226</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/kernel-embedded-news-arm64-drops-big-endian-boots-cpus-in-parallel-4226</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Arm64 platform direction dominated this week: Will Deacon posted v2 of the series that removes big-endian kernel support, aimed at Linux 7.4, and a new 19-patch series that brings parallel secondary CPU onlining to arm64 through the PSCI v0.2 CPU_ON argument. Alongside those, Linux 7.3-rc2 arrived unusually large with scheduler fixes among the corrections, Buildroot 2026.08 shipped with GCC 16 and glibc 2.44 support, and kernel.org published measurements showing AI crawlers consume about a fifth of its git infrastructure capacity.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;The theme this week is direction-setting on arm64. Two of the five items come from the arm64 maintainer's own queue, posted on the same day, and both change what the platform will look like for the next decade: one removes a capability, the other modernises how arm64 machines with PSCI firmware boot. The remaining items cover the 7.3 stabilisation cycle, the embedded build-system cadence, and the infrastructure your git workflows depend on.&lt;/p&gt;

&lt;h2&gt;
  
  
  In this edition
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Arm64 big-endian removal queued for Linux 7.4.&lt;/strong&gt; Will Deacon's 14-patch v2 deletes the remaining big-endian kernel code; four maintainer acks are already in. &lt;em&gt;— planning signal&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Parallel CPU onlining through PSCI proposed for arm64.&lt;/strong&gt; A 19-patch series wires arm64 into the generic HOTPLUG_PARALLEL machinery, with measured bringup-time cuts of 41 to 65 percent on the predecessor series. &lt;em&gt;— long-term watch&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Linux 7.3-rc2 is unusually large.&lt;/strong&gt; The quiet week after the merge window did not happen; scheduler fixes for cache-aware load balancing on hybrid CPUs lead the pull. &lt;em&gt;— test now&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Buildroot 2026.08 released.&lt;/strong&gt; Close to 1,000 changes: Linux 7.1.x headers, GCC 16.2.0 available, glibc 2.44, M68K nommu and IBM Power 10/11 support. &lt;em&gt;— evaluate the upgrade&lt;/em&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;AI crawlers take a fifth of git.kernel.org capacity.&lt;/strong&gt; First-party numbers from the kernel.org administrator: roughly 6 million daily requests, and only about 2 percent of traffic is legitimate. &lt;em&gt;— workflow signal&lt;/em&gt;
&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Arm64 prepares to remove big-endian support
&lt;/h2&gt;

&lt;p&gt;Will Deacon posted version two of "arm64: Remove unused big-endian support" on 7 September: 14 patches deleting roughly 540 lines of big-endian handling from the arm64 tree. The BPF JIT, the crypto assembly, the optimised string routines, the compat vDSO build, and the KVM hypervisor object all lose their big-endian paths, and every use of &lt;code&gt;CONFIG_CPU_BIG_ENDIAN&lt;/code&gt; and &lt;code&gt;__AARCH64EB__&lt;/code&gt; under arch/arm64 goes away. The v2 series is rebased onto 7.3-rc1 and now forces little-endian explicitly during early boot.&lt;/p&gt;

&lt;p&gt;This is the end of a staged process, not a sudden decision. &lt;code&gt;CPU_BIG_ENDIAN&lt;/code&gt; was made to depend on &lt;code&gt;BROKEN&lt;/code&gt; in 6.18, which made the code unbuildable in practice, and pieces of dead big-endian support have been leaving the tree since. The removal is planned for the 7.4 merge window, and the series already carries acks from Catalin Marinas, Arnd Bergmann, Eric Biggers and Marc Zyngier.&lt;/p&gt;

&lt;p&gt;Two details matter for embedded teams. First, SETEND emulation for 32-bit user tasks stays, so mixed-endian 32-bit userspace continues to run. Second, in the review thread Arnd Bergmann confirmed the same process on 32-bit Arm: big-endian mode there is marked deprecated in 7.3, the ixp4xx platform has been repaired to run little-endian, and the arm32 removal is expected to wait one more long-term release.&lt;/p&gt;

&lt;p&gt;We covered the pattern this belongs to in our &lt;a href="https://www.techveda.live/2026/08/20/linux-32-bit-arm-deprecation-rsync-3-5/" rel="noopener noreferrer"&gt;32-bit Arm deprecations edition&lt;/a&gt;: the kernel is systematically shedding configurations that have no testers. Big-endian arm64 hardware exists mostly in networking and telecom appliances built on vendor kernels; mainline effectively never had a big-endian arm64 user base, and code nobody boots is code nobody notices breaking.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to check your device
&lt;/h3&gt;

&lt;p&gt;A product that needs a big-endian arm64 kernel now has a fixed upper bound: kernel 7.3 and its stable series, and nothing after that. Check what you are actually running before assuming this does not affect you, because the configuration hides inside some vendor BSPs for network processors:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;root@$&lt;/span&gt;&lt;span class="o"&gt;{&lt;/span&gt;MACHINE&lt;span class="o"&gt;}&lt;/span&gt;:~# zcat /proc/config.gz | &lt;span class="nb"&gt;grep &lt;/span&gt;CPU_BIG_ENDIAN
&lt;span class="gp"&gt;#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;CONFIG_CPU_BIG_ENDIAN is not &lt;span class="nb"&gt;set&lt;/span&gt;
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;If that symbol is set on any of your targets, start the migration conversation with your silicon vendor now. The realistic paths are a little-endian port of the byte-order-sensitive code, or staying on a frozen kernel with a defined support end. For everyone else, this is a simplification: less conditional assembly in hot paths and one less configuration axis in the architecture you almost certainly ship.&lt;/p&gt;

&lt;h2&gt;
  
  
  Parallel CPU onlining through PSCI
&lt;/h2&gt;

&lt;p&gt;The same day, Will Deacon posted "arm64: Implement parallel CPU onlining with PSCI v0.2+", a 19-patch series that lets arm64 bring its secondary CPUs into the kernel concurrently instead of strictly one after another. x86, MIPS and RISC-V already have parallel bringup; arm64 has been a holdout. The series supersedes the HOTPLUG_PARALLEL work posted by Jinjie Ruan of Huawei in June, and the cover letter credits his cooperation in reshaping it.&lt;/p&gt;

&lt;p&gt;The mechanism is worth understanding. PSCI v0.2 gave the CPU_ON call a context argument that the firmware hands to the incoming CPU. The series uses it to pass each secondary CPU its boot parameters directly through firmware, which removes the serialisation point where every CPU had to identify itself against shared global state. With that in place, arm64 can drop its own custom secondary-CPU synchronisation and adopt the generic &lt;code&gt;HOTPLUG_PARALLEL&lt;/code&gt;, &lt;code&gt;HOTPLUG_SPLIT_STARTUP&lt;/code&gt; and core-sync machinery that the other architectures already use. The final patch hardens bringup against broken PSCI firmware, which is a realistic concern on shipping boards.&lt;/p&gt;

&lt;p&gt;The performance claim comes from the predecessor series: Jinjie Ruan measured a 192-core HiSilicon server booting its CPUs in 8.6 seconds instead of 14.6, a 41 percent cut, with 62 to 65 percent cuts on 32-core and 64-core boards. There is a third benefit beyond code health and speed: inside a confidential guest, the new scheme protects against a malicious hypervisor that injects secondary CPUs into the guest after the onlining window has closed. Deacon presented the design at last year's KVM Forum, and the series is based on 7.3-rc2, so the earliest realistic merge target is 7.4.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for product teams
&lt;/h3&gt;

&lt;p&gt;CPU onlining is a visible slice of the boot budget on anything with many cores, and it lands entirely inside the window that fast-boot products care about: cold boot to service, and the reboot window during an A/B update. If your product has a boot-time requirement, put this series on the watch list and measure your current bringup phase — &lt;code&gt;dmesg&lt;/code&gt; timestamps around the secondary CPU boot messages give you the number directly. Expect the gain to scale with core count, and expect the new path to stress PSCI implementations in vendor firmware that were only ever exercised serially. If you maintain a TF-A port, testing this series against it before it merges is exactly the kind of early report the arm64 maintainers are asking for.&lt;/p&gt;

&lt;h2&gt;
  
  
  7.3-rc2: the quiet week that was not
&lt;/h2&gt;

&lt;p&gt;Linus Torvalds released 7.3-rc2 on 6 September and noted that rc2 is normally the calmest point of the cycle, whereas this one was, in his words, a "full fat" rc release. He added that nothing in it looks particularly odd, joking that everyone will blame AI for the volume either way. The fixes span filesystems, networking, BPF, a large DRM pull, and the EDAC updates that were forgotten during the merge window and pulled now. As covered in our &lt;a href="https://www.techveda.live/2026/09/01/linux-7-3-rc1-merge-window/" rel="noopener noreferrer"&gt;7.3-rc1 edition&lt;/a&gt;, this cycle merged the second-busiest merge window on record, so a large volume of fixes was predictable.&lt;/p&gt;

&lt;p&gt;The scheduler pull is the part worth reading. 7.3 merged the flattened-runqueue rework of the fair scheduler's pick path; cache-aware load balancing, which groups related tasks onto cores sharing a last-level cache, has been in the kernel since 7.2. rc2's scheduler pull carries corrections in this area, and the notable one is from Intel engineer Tim Chen: cache-aware balancing could pull a task toward its preferred cache domain on a hybrid CPU even when the destination cores were too small for it, converting a cache-locality gain into a capacity loss. The fix vetoes such migrations on asymmetric systems, through both &lt;code&gt;can_migrate_llc_task()&lt;/code&gt; and the active-balance path, and prioritises misfit migration over cache aggregation when the two conflict.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to use it
&lt;/h3&gt;

&lt;p&gt;The asymmetric-CPU corrections apply directly to big.LITTLE and DynamIQ embedded silicon, not only to desktop hybrid parts. If your workloads pin latency-sensitive threads on big cores and let the rest float, rc kernels are the right time to run your latency and throughput benchmarks and report regressions — after release, a scheduler behaviour change becomes your problem to bisect. Treat scheduler behaviour on 7.3 as unsettled until late in the rc series, and do not rely on scheduler benchmarks published against rc1 or rc2.&lt;/p&gt;

&lt;h2&gt;
  
  
  Buildroot 2026.08: the toolchain moves forward
&lt;/h2&gt;

&lt;p&gt;Peter Korsgaard released Buildroot 2026.08 on 4 September, with close to 1,000 changes from 100 contributors. The toolchain updates are the most significant part in practice: support for Linux 7.1.x kernel headers, Binutils 2.46.1, GCC 16.2.0 available with the default moving to GCC 15, glibc 2.44, and uClibc-ng 1.0.59. Architecture support widens with M68K nommu and IBM Power 10/11 variants, and the release adds infrastructure for packages written in the Hare language, a virtual package for libudev, and SDL3 packages. On the removals side, defconfigs for the Acmesystems Aria and Arietta G25, Avnet S6LX9 MicroBoard, and Technologic TS-4900 and TS-5500 boards are gone.&lt;/p&gt;

&lt;p&gt;The support arithmetic matters more than any single feature. 2026.08 receives fixes only until 2026.11.1 appears, which is roughly three months. Production products should either track every release deliberately or sit on the 2025.02.x LTS series, which is supported until March 2028. The compiler default moving to GCC 15, with GCC 16.2.0 selectable, is the kind of change to absorb in a controlled rebuild rather than during an unrelated bump — new compiler releases routinely surface latent warnings and subtle miscompilation reports in embedded code that has never seen them.&lt;/p&gt;

&lt;p&gt;If you are following our &lt;a href="https://www.techveda.live/2026/09/06/buildroot-br2-external-tree-part-2/" rel="noopener noreferrer"&gt;Buildroot series&lt;/a&gt;, this release is a good live exercise: a BR2_EXTERNAL tree isolates your packages and board configs, so rebasing from 2026.05 to 2026.08 becomes a contained, testable step instead of a fork migration.&lt;/p&gt;

&lt;h3&gt;
  
  
  How to evaluate the upgrade
&lt;/h3&gt;

&lt;p&gt;Rebuild your full image against 2026.08 in CI before committing to it. Read the CHANGES file specifically for your package set, confirm none of your boards depended on the removed defconfigs, and decide the GCC question explicitly — staying on the default GCC 15 or opting into 16.2.0 — rather than inheriting it. Teams on 2025.02.x LTS need no action beyond noting that the Buildroot Developers Meeting after ELCE in Prague is where the next LTS's direction gets discussed.&lt;/p&gt;

&lt;h2&gt;
  
  
  AI crawlers now cost git.kernel.org a fifth of its capacity
&lt;/h2&gt;

&lt;p&gt;Konstantin Ryabitsev, who runs kernel.org's infrastructure, published first-party measurements of what AI scrapers cost the project. git.kernel.org receives about 6 million requests per day asking for individual commits rendered as web pages. The Anubis proof-of-work challenge stops 66 percent of them, but a third now solve the challenge and get through. With generous assumptions, legitimate use is about 2 percent of total traffic. Across the five geo-distributed nodes, 14 to 16 of 90 CPU cores do nothing but render commits as HTML for scrapers — around 20 percent of capacity on average, arriving in waves rather than as a steady load.&lt;/p&gt;

&lt;p&gt;The detail that should annoy every engineer is the method. All of this data is available through a single &lt;code&gt;git clone&lt;/code&gt;, in a form built for exactly this purpose: linux.git holds about 1.48 million commits, and even the mailing-list archives are clonable git repositories. Instead, the crawlers walk the web interface commit by commit — across roughly 922 forks of linux.git that mostly contain identical objects — through millions of short-lived residential and mobile proxy connections that defeat IP-based blocking. The consequence reaches you directly: kernel.org is reducing crawlable URLs and will gate expensive operations, so anonymous web access loses functionality. The data itself stays available to anyone who clones.&lt;/p&gt;

&lt;h3&gt;
  
  
  What it means for your workflow
&lt;/h3&gt;

&lt;p&gt;Take this as the reason to make your own tooling both well-behaved and self-sufficient. Run an internal mirror for anything CI touches, and never point parallel CI jobs at kernel.org directly — the post singles out simultaneous shallow clones from many nodes as the load pattern that actually takes the service down. If any internal script fetches commits over the cgit web interface one URL at a time, convert it to operate on a local clone. Expect proof-of-work interstitials and reduced anonymous features on kernel.org web properties to become the norm, and budget a few seconds of challenge time into anything interactive.&lt;/p&gt;

&lt;h2&gt;
  
  
  References
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://patchew.org/linux/20260907163726.17104-1-will@kernel.org/" rel="noopener noreferrer"&gt;arm64: Remove unused big-endian support, v2 (7 September 2026)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://patchew.org/linux/20260811140132.22778-1-will@kernel.org/" rel="noopener noreferrer"&gt;arm64: Remove unused big-endian support, v1 and review thread (11 August 2026)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://lists.infradead.org/pipermail/linux-arm-kernel/2026-September/1169745.html" rel="noopener noreferrer"&gt;arm64: Implement parallel CPU onlining with PSCI v0.2+ (7 September 2026)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="http://lists.infradead.org/pipermail/linux-arm-kernel/2026-June/1141528.html" rel="noopener noreferrer"&gt;arm64: Add HOTPLUG_PARALLEL support for secondary CPUs, v3 (24 June 2026)&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.youtube.com/watch?v=Q6kOshnnQuE" rel="noopener noreferrer"&gt;KVM Forum talk on arm64 parallel CPU bringup&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lwn.net/Articles/1092757/" rel="noopener noreferrer"&gt;Kernel prepatch 7.3-rc2&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/lkml/ap1NEllrD8nMsFiB@gmail.com/" rel="noopener noreferrer"&gt;Scheduler fixes pull request for 7.3-rc2&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.phoronix.com/news/Linux-7.3-rc2-Scheduler-Fixes" rel="noopener noreferrer"&gt;Linux 7.3-rc2 scheduler fix for cache-aware scheduling misfits&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/buildroot/878q5hf0yd.fsf@dell.be.48ers.dk/" rel="noopener noreferrer"&gt;Buildroot 2026.08 release announcement&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;a href="https://people.kernel.org/monsieuricon/creepy-crawlies" rel="noopener noreferrer"&gt;Creepy crawlies — AI crawler measurements on git.kernel.org&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

&lt;p&gt;&lt;em&gt;If you work on the Linux kernel or embedded Linux products, TECH VEDA runs instructor-led training on kernel internals, device drivers and BSP engineering — details at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>linux</category>
      <category>kernel</category>
      <category>embedded</category>
      <category>arm</category>
    </item>
    <item>
      <title>Ten Years of Work Is Not Ten Years of Experience</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Sun, 06 Sep 2026 09:02:35 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/ten-years-of-work-is-not-ten-years-of-practice-1h68</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/ten-years-of-work-is-not-ten-years-of-practice-1h68</guid>
      <description>&lt;p&gt;Skill changes when you find out you were wrong. In engineering, whether you ever find out is decided by things you did not choose: how quickly the consequence appears, whether it reaches you at all, and whether anyone can still connect it to the decision that caused it. What a CV calls ten years of experience is a record of time spent present. It is not a record of how often the work corrected you, and those two numbers can be very far apart.&lt;/p&gt;

&lt;p&gt;There is probably an engineer in your organisation with four years of experience who is plainly better than someone there with twelve. Not more confident, and not better in interviews — better at the work itself: quicker to the real cause, harder to surprise, right about the design more often than anyone else in the discussion. Everyone can see it. Nobody can quite explain it, so it gets put down to talent and is not examined further.&lt;/p&gt;

&lt;p&gt;Talent is the least useful answer available, and it is usually not the correct one either.&lt;/p&gt;

&lt;p&gt;The word doing the damage here is experience. Counted on a CV it means time present: you were employed, in that role, for that many years. Everywhere else we use it to mean something earned — that a person has been through things and is different as a result. The two meanings are quietly assumed to be the same, and years are counted as though the second follows automatically from the first. It does not follow, and the gap between the two is what the rest of this is about.&lt;/p&gt;

&lt;h2&gt;
  
  
  What actually changes you
&lt;/h2&gt;

&lt;p&gt;Think about the last time your engineering judgement genuinely improved. It was almost certainly not the day somebody explained a concept to you. It was a day you were confident about something, acted on it, and discovered you had been wrong — and the discovery arrived close enough to the decision that you could still remember why you had made it.&lt;/p&gt;

&lt;p&gt;That is the whole mechanism. A belief you held gets contradicted while you can still see the reasoning behind it. Nothing else does the same work. Reading does not, because reading adds facts without testing any of yours. Being told does not, unless you had committed to a position first.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;Experience does not accumulate with time spent. It accumulates with contradictions received.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Which turns the question about experience into a question about arithmetic. Not how many years, but how many times in those years the work came back and told you that you were wrong.&lt;/p&gt;

&lt;h2&gt;
  
  
  The Tuesday
&lt;/h2&gt;

&lt;p&gt;Here is how those occasions get lost, and it is not dramatic.&lt;/p&gt;

&lt;p&gt;You decide, on a Tuesday, that a structure can be freed at the end of the callback. You think about it for under a minute, and everything you can see says you are right: the driver loads, the tests pass, the board runs for a week on the bench. The decision is wrong. Under a timing your bench does not produce, something is still holding a reference.&lt;/p&gt;

&lt;p&gt;Eighteen months later, at a site in another country, units begin rebooting every few weeks. A support engineer collects a crash log. It sits in a queue. Eventually somebody looks at it properly, works out that a structure is being touched after it was freed, finds the path that does it, and fixes it in an afternoon. That engineer learns something real that day, and they learn it because they are the person who found out.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;The loop did close. It closed for somebody else.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;It never closed for you. Nobody told you, because by then there was no reason to connect the fix to you and no way to do it. And in those eighteen months you made the same kind of decision perhaps forty more times, at the same speed, with the same confidence, on the same evidence: nothing had ever come back to suggest you were getting it wrong.&lt;/p&gt;

&lt;p&gt;Nothing about that story requires anyone to be careless. The bench was reasonable. The tests were reasonable. The support process worked exactly as designed. The decision still cost you the correction, and the correction went to a stranger. Eighteen months of experience were added to your CV. None were added to your judgement.&lt;/p&gt;

&lt;h2&gt;
  
  
  Why you cannot feel the difference
&lt;/h2&gt;

&lt;p&gt;You might expect a missing correction to feel like missing information. It does not. There is no gap where it would have been, no reminder, nothing in the tree to grep for.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;An unclosed loop does not feel like a gap in your learning. It feels like confirmation.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Worse, the effect is not evenly spread. It is worst exactly where you can least afford it. Small decisions are corrected constantly: a syntax error in seconds, a failed test in minutes, a review comment in a day. Large decisions are barely corrected at all, and the interface you chose or the layering you settled on may never report anything.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;The quality of your feedback is inversely related to the importance of the decision it concerns.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;So the confidence you carry about your own judgement has been assembled almost entirely out of the decisions that were easy to check. It feels like one continuous sense of competence, and it is not. It is reliable about syntax and largely untested about architecture.&lt;/p&gt;

&lt;p&gt;This is also the answer to the question we started with. The engineer with four years was somewhere the loops closed quickly — a small team shipping often, a maintainer who reviewed strictly, a product whose failures came back within weeks and reached the person who caused them. Twelve years of specifying, handing over and moving to the next project delivers very few contradictions, and the person who lived through it has no way of knowing that is what happened. Those years were not wasted; exposure teaches a good deal on its own. But exposure without a returning signal produces familiarity rather than judgement, and it is very hard to tell those two apart in yourself.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;Years accumulate on their own. Judgement only accumulates when the result reaches the decision that caused it.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;h2&gt;
  
  
  Going to look for it
&lt;/h2&gt;

&lt;p&gt;If the work will not reliably tell you when you were wrong, the remaining option is to go and find out on purpose. It is a disposition rather than a technique, and it shows up in three ordinary places.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Commit to a prediction before you look.&lt;/strong&gt; Before the print, before the trace, before running the test: write down the value you expect and why. It costs ten seconds and it is uncomfortable, which is the point. A prediction you kept in your head will always seem correct afterwards, because you quietly adjust it to match what you found. A written one cannot be adjusted.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Go and find the consequences that were routed away from you.&lt;/strong&gt; Read the support tickets for the products you have worked on, including the ones assigned to other people and the ones from two years ago. Almost nobody does this, because nothing requires it and it is not comfortable reading. It is the only way to see the results of decisions you have been repeating ever since you made them.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Notice how long it has been since you were proved wrong.&lt;/strong&gt; Not corrected on a detail — proved wrong about something you were confident in. If you cannot remember the last occasion, the likely explanation is not that you have stopped being wrong.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;It is also worth knowing what quietly lowers your rate. Moving into a role where you specify rather than build. Working on a product whose failures reach a support team instead of a developer. And, more recently, accepting generated output that works: you predicted nothing, so nothing was contradicted, and you end the day exactly as sure of yourself as you began it. This matters most where a wrong answer looks exactly like a right one until the timing changes.&lt;/p&gt;

&lt;p&gt;The opposite is what makes an experienced colleague worth so much, and it has little to do with what they know. Their value is timing: they tell you the approach is wrong while you still remember the reasoning that produced it, which is the only moment at which being told changes anything. Months of delay become seconds.&lt;/p&gt;

&lt;p&gt;So there is a question worth putting to yourself at the end of a year, and it is not whether you feel more capable than you did. Confidence will answer that one dishonestly. It is whether you can name three occasions when you found out you were wrong, and what you had to do to find out. If they come to mind easily, you gained a year of experience. If you have to search for them, you may only have gained a year, and silence is not the same thing as being right.&lt;/p&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;




&lt;p&gt;&lt;em&gt;I teach Linux kernel, device driver and embedded Linux courses at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;TECH VEDA&lt;/a&gt;. Sessions are live and mentor-led, built around working through problem scenarios — largely because that is the shortest feedback loop I know how to build.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>career</category>
      <category>embedded</category>
      <category>linux</category>
      <category>learning</category>
    </item>
    <item>
      <title>Linux Kernel CVEs: What to Patch by Device (30 Aug - 5 Sep 2026)</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Sat, 05 Sep 2026 16:57:14 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/linux-kernel-cves-what-to-patch-by-device-30-aug-5-sep-2026-5flk</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/linux-kernel-cves-what-to-patch-by-device-30-aug-5-sep-2026-5flk</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Originally published on TECH VEDA: &lt;a href="https://www.techveda.live/2026/09/05/linux-kernel-cves-05-sep-2026/" rel="noopener noreferrer"&gt;Linux Kernel CVEs: What to Patch by Device (30 Aug - 5 Sep 2026)&lt;/a&gt;. This is a weekly series. Every CVE below was read from the CVE Program record, and the branch targets were checked against kernel.org.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;The Linux kernel project published 188 Linux kernel CVEs in the week of 30 August to 5 September 2026. Every one of them is already fixed in a stable release. This week, no record marks a branch as affected without also naming a fixed version for it, so the branch update clears the whole set. None of the records notes known exploitation, and no public exploit code was found for any of them at the time of writing. The only action is to update to the fixed version for your branch. The minimum safe upstream release per branch is 5.10.269, 5.15.220, 6.1.187, 6.6.156, 6.12.108, 6.18.49, 7.1.13 or 7.2.3. One extra item this week: the 7.1 branch reached end of life with 7.1.13, so it will get no further fixes and needs a migration plan, not just an update.&lt;/p&gt;

&lt;p&gt;188 records is close to a normal weekly volume for this project. Last week was 227, and that was unusual: a full stable cycle landed on one day and the records were published together. This week the count comes from ordinary weekly stable releases. The IDs form one continuous block, CVE-2026-80726 to CVE-2026-80913.&lt;/p&gt;

&lt;p&gt;Most of these fixes are narrow. Which of these Linux kernel CVEs matter for you depends on what your product builds and how it is configured. A phone, an industrial gateway, a hypervisor host and a patient monitor build different code, so they are exposed to different parts of this list. The kernel CNA publishes no CVSS base score for most of these records, and NVD has not finished analysing the batch, so order your work by reachability and deployment context rather than by score. This advisory gives the version to install first, then explains which records matter for mobile and automotive, embedded and IoT, cloud and datacenter, and medical devices. Each record below has its own heading, so you can link straight to it.&lt;/p&gt;

&lt;h2&gt;
  
  
  The one action: update to the fixed version for your branch
&lt;/h2&gt;

&lt;p&gt;Find the kernel version each product is running, compare it with the target for its branch in the table below, and update if it is lower. A system on 6.12.104, for example, is below the 6.12 target of 6.12.108 and needs the update.&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Stable branch&lt;/th&gt;
&lt;th&gt;Update to at least&lt;/th&gt;
&lt;th&gt;Notes&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;5.10 LTS&lt;/td&gt;
&lt;td&gt;5.10.269&lt;/td&gt;
&lt;td&gt;Set by the three USB records that are fixed on every branch: &lt;code&gt;CVE-2026-80824&lt;/code&gt;, &lt;code&gt;CVE-2026-80827&lt;/code&gt; and &lt;code&gt;CVE-2026-80830&lt;/code&gt;.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;5.15 LTS&lt;/td&gt;
&lt;td&gt;5.15.220&lt;/td&gt;
&lt;td&gt;Set by the same three USB records.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.1 LTS&lt;/td&gt;
&lt;td&gt;6.1.187&lt;/td&gt;
&lt;td&gt;Set by the same three USB records. This is also the lowest branch that names a fix for &lt;code&gt;CVE-2026-80852&lt;/code&gt; (kTLS transmit offload).&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.6 LTS&lt;/td&gt;
&lt;td&gt;6.6.156&lt;/td&gt;
&lt;td&gt;Set by the same three USB records.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.12 LTS&lt;/td&gt;
&lt;td&gt;6.12.108&lt;/td&gt;
&lt;td&gt;Set by the same three USB records. This release also carries &lt;code&gt;CVE-2026-80850&lt;/code&gt; and &lt;code&gt;CVE-2026-80825&lt;/code&gt;.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.18 LTS&lt;/td&gt;
&lt;td&gt;6.18.49&lt;/td&gt;
&lt;td&gt;Set by the same three USB records. The futex and io_uring records are fixed earlier on this branch, in 6.18.47.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;7.1 (end of life)&lt;/td&gt;
&lt;td&gt;7.1.13&lt;/td&gt;
&lt;td&gt;Set by the same three USB records. 7.1.13 clears every record below, but kernel.org marks it as the final 7.1 release, so this branch gets no further fixes.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;7.2 stable&lt;/td&gt;
&lt;td&gt;7.2.3&lt;/td&gt;
&lt;td&gt;Set by the same three USB records. 7.2.3 is also the only release that fixes &lt;code&gt;CVE-2026-80853&lt;/code&gt;, the SEV record.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;mainline&lt;/td&gt;
&lt;td&gt;7.3-rc1&lt;/td&gt;
&lt;td&gt;The 7.3 merge window opened on 30 August 2026. 7.2, released 16 August 2026, is the current stable series.&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;Every target above is a release that already exists, so nothing here waits on a future stable release. Each of the eight stable targets is the newest release of its branch, so on an upstream kernel the check is simple: if you are not on the current release for your branch, you are behind. Three records set the target on all eight branches at once, and all three are in the USB stack: &lt;code&gt;CVE-2026-80824&lt;/code&gt; (use-after-free of the USB device structure when a usbfs file is closed), &lt;code&gt;CVE-2026-80827&lt;/code&gt; (out-of-bounds read in the USB serial option driver) and &lt;code&gt;CVE-2026-80830&lt;/code&gt; (a missing lock in the USB core wakeup notification path).&lt;/p&gt;

&lt;p&gt;Branches not in the table were not named as affected by any record this week, or their fix was released before this window. The 6.19 and 7.0 series are not active stable branches.&lt;/p&gt;

&lt;h3&gt;
  
  
  The 7.1 branch reached end of life this week
&lt;/h3&gt;

&lt;p&gt;This is the item to act on beyond the version bump. On 2 September 2026 the kernel project released 7.1.13 and marked the 7.1 branch as end of life. 7.1.13 contains the fixes for every record in this advisory, so installing it is still correct today. But no 7.1.14 will follow. From now on, every kernel CVE published against code that 7.1 contains will stay unfixed on 7.1.&lt;/p&gt;

&lt;p&gt;If you ship 7.1, the update is not the whole job. Decide now where the product moves next. The two upstream options are 7.2, which is the current stable series and receives fixes weekly, and 6.18, which is a longterm branch with a much longer support window. A stable series such as 7.2 is supported only until the next one arrives, so if you want to change kernel version rarely, a longterm branch is the safer target. Plan the move through your normal validation process rather than as an emergency change, because 7.1.13 is fully patched as of this week and there is no time pressure.&lt;/p&gt;

&lt;p&gt;Separately, mainline has moved on. The 7.3 merge window opened on 30 August 2026, so mainline now reports 7.3-rc1. That does not change anything you need to install; 7.2 is still the current stable series. It is listed here only so the mainline row in the table is not read as a release you should be running.&lt;/p&gt;

&lt;p&gt;Last week's targets were 5.10.268, 5.15.219, 6.1.186, 6.6.155, 6.12.107, 6.18.48, 7.1.12 and 7.2.2. Every branch has moved up exactly one point release since then. A system that was current after last week's advisory needs one more update.&lt;/p&gt;

&lt;p&gt;One thing improved this week. Last week four records marked a branch as affected and named no fixed version for it, so the branch update did not clear them. This week there are no such records: all 188 name a fix for every branch they mark as affected. The four open items from last week are unchanged, however. &lt;code&gt;CVE-2026-74752&lt;/code&gt; (SCTP), &lt;code&gt;CVE-2026-80551&lt;/code&gt; (s390 vfio-ccw), &lt;code&gt;CVE-2026-74743&lt;/code&gt; (macvlan) and &lt;code&gt;CVE-2026-80635&lt;/code&gt; (wcn36xx Wi-Fi), plus &lt;code&gt;CVE-2026-74582&lt;/code&gt; from the week before, are still unfixed on the older LTS branches. Nothing in this window changes that, so if you track those five, keep tracking them.&lt;/p&gt;

&lt;p&gt;If you run a vendor or BSP kernel, the version string will not compare cleanly with the table. A kernel that reports &lt;code&gt;6.6.60-imx&lt;/code&gt; is based on 6.6.60, and it will not become 6.6.156 by any upstream update you apply yourself. For those products the table tells you which fixes have to be present, not which release to install. Ask your silicon or BSP vendor to confirm, and treat a verified vendor backport as equivalent to the upstream target.&lt;/p&gt;

&lt;h2&gt;
  
  
  Mobile and automotive
&lt;/h2&gt;

&lt;p&gt;Four records this week sit in code paths that matter on a phone, a tablet or a vehicle: Wi-Fi, Bluetooth, the CAN bus and the HDMI display path.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80825: Wi-Fi mt7925 did not reserve transmit headroom for forwarded frames
&lt;/h3&gt;

&lt;p&gt;The MediaTek mt7925 driver pushes a transmit descriptor and a USB header onto every outgoing frame, and assumes the headroom for them is already reserved. That holds for traffic the device generates itself, because mac80211 reserves &lt;code&gt;hw-&amp;gt;extra_tx_headroom&lt;/code&gt;. It does not hold for forwarded frames, which go out through &lt;code&gt;ieee80211_8023_xmit()&lt;/code&gt; and do not get that reservation. The record shows the result directly: bridge a wired interface to an mt7925u access point, and the first short forwarded frame triggers &lt;code&gt;skb_under_panic&lt;/code&gt; and a kernel BUG.&lt;/p&gt;

&lt;p&gt;This matters wherever an mt7925 part is used as an access point or a bridge rather than as a plain client, which includes in-vehicle hotspots and tethering. The trigger is ordinary forwarded traffic, not a crafted frame. The fix reserves the headroom in the USB and SDIO transmit path. The affected file is &lt;code&gt;drivers/net/wireless/mediatek/mt76/mt7925/mac.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_MT7925U&lt;/code&gt; for the USB part and the SDIO build of the same driver. Fixed in 6.12.108, 6.18.49, 7.1.13 and 7.2.3. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80825" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80762: Bluetooth accept list use-after-free during suspend
&lt;/h3&gt;

&lt;p&gt;When the system suspends, &lt;code&gt;hci_update_event_filter_sync()&lt;/code&gt; walks the controller's accept list and sends a synchronous HCI command for each device allowed to wake the host. That walk holds &lt;code&gt;hdev-&amp;gt;req_lock&lt;/code&gt;, but accept-list updates are serialized by a different lock, &lt;code&gt;hdev-&amp;gt;lock&lt;/code&gt;. So while the code waits for the controller to answer, &lt;code&gt;remove_device()&lt;/code&gt; can take the other lock, unlink the current entry and free it. When the wait finishes, the walk reads the freed entry. KASAN reports a use-after-free.&lt;/p&gt;

&lt;p&gt;The window is the controller response time, which is long in kernel terms, so this is a race that can be hit in normal use on a device that suspends often. This is one of seven Bluetooth records this week; &lt;code&gt;CVE-2026-80764&lt;/code&gt; is a closely related use-after-free of the LE list on reset, and &lt;code&gt;CVE-2026-80819&lt;/code&gt; fixes missing locking in the RFCOMM deferred setup accept path. If you ship Bluetooth, take the branch update rather than picking single patches. The affected file is &lt;code&gt;net/bluetooth/hci_sync.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_BT&lt;/code&gt;. Fixed in 6.1.187, 6.6.156, 6.12.108, 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80762" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80889: CAN ISO-TP timer and wakeup ordering
&lt;/h3&gt;

&lt;p&gt;ISO-TP is the CAN transport protocol used for diagnostics and for any message longer than eight bytes, so it is present on most vehicle and heavy-equipment stacks. This record fixes four ordering problems in the socket code: a stale timer callback could re-arm another timer after a transfer was claimed, a sleeping &lt;code&gt;sendmsg()&lt;/code&gt; could be left waiting after the socket was shut down, the wait loops did not wake on shutdown, and the shutdown path could be corrupted by a concurrent transfer claim.&lt;/p&gt;

&lt;p&gt;Read the version data on this one carefully, because it is a follow-up. The record lists each branch as affected only from the point release two or three steps before the fix. On 5.10 the affected range is 5.10.265 to 5.10.267, on 6.1 it is 6.1.183 to 6.1.185, and so on. That means the bug was introduced by the previous CAN ISO-TP locking fix, not by old code. If you took that earlier CAN update, you need this one as well. If you are on an older release than that, this record does not apply to you, but the branch target still does. The affected file is &lt;code&gt;net/can/isotp.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_CAN_ISOTP&lt;/code&gt;. Fixed in 5.10.267, 5.15.218, 6.1.185, 6.6.151, 6.12.103, 6.18.44 and 7.1.8. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80889" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80749: out-of-bounds read copying an HDMI audio infoframe
&lt;/h3&gt;

&lt;p&gt;A helper copied an audio infoframe into the connector's stored copy using the size of the destination rather than the size of the source. The destination is a generic buffer sized to hold many different kinds of data block, so the copy read 60 bytes out of a 28-byte allocation. The fix uses the source size and adds a build-time check that the source is not larger than the destination.&lt;/p&gt;

&lt;p&gt;Keep this one in proportion. It is a read, not a write, so it cannot corrupt memory, and the record says a real-world failure is unlikely; it was found running KUnit tests under KASAN. It is listed here because it is in the display sink path, which matters for infotainment and instrument-cluster designs that drive external HDMI sinks. The affected file is &lt;code&gt;drivers/gpu/drm/display/drm_hdmi_state_helper.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER&lt;/code&gt;. Fixed in 6.12.105, 6.18.46 and 7.1.10. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80749" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  Embedded and IoT
&lt;/h2&gt;

&lt;p&gt;Gateways, routers, single-board computers and battery-powered sensors are affected through the cellular modem driver, the NFC stack, the HID core and the in-kernel OpenVPN data path.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80827: out-of-bounds read in the USB serial option driver
&lt;/h3&gt;

&lt;p&gt;This is the record most embedded products should read first, because the option driver is what binds to almost every USB cellular modem. The driver sizes its interrupt buffer from the endpoint's &lt;code&gt;wMaxPacketSize&lt;/code&gt;. If a device declares &lt;code&gt;wMaxPacketSize = 8&lt;/code&gt;, the buffer comes from the 8-byte slab cache. When that device then sends a short packet, the completion handler still reads &lt;code&gt;data[8]&lt;/code&gt;, which is one byte past the end of an 8-byte allocation. That is a slab out-of-bounds read. The fix adds the missing bounds check.&lt;/p&gt;

&lt;p&gt;The input is the attached modem, so the exposure depends on whether the modem is a fixed soldered part or a field-replaceable USB device. On a gateway with an accessible USB port, the attacker model is somebody plugging in a device. This record is also one of the three that set this week's target on every branch. The affected file is &lt;code&gt;drivers/usb/serial/option.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_USB_SERIAL_OPTION&lt;/code&gt;. Fixed in 5.10.269, 5.15.220, 6.1.187, 6.6.156, 6.12.108, 6.18.49, 7.1.13 and 7.2.3. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80827" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80795: out-of-bounds write in the NFC NCI target list
&lt;/h3&gt;

&lt;p&gt;The NCI layer keeps discovered NFC targets in a fixed-size array. &lt;code&gt;nci_target_auto_activated()&lt;/code&gt; appends a target and increments the counter without first checking whether the array is full. Its sibling function does check. The counter is only cleared by an explicit call, so an NFC controller that keeps re-running discovery and reporting an auto-activated target drives the counter past the array size. The append then writes a target structure past the end of the array. That is a slab out-of-bounds write, which is the more serious class of the two.&lt;/p&gt;

&lt;p&gt;The input comes from the NFC controller, and the controller is driven by whatever tag or reader is held near the antenna. So the range is short, but no pairing or authentication is involved. The affected file is &lt;code&gt;net/nfc/nci/ntf.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_NFC_NCI&lt;/code&gt;. Fixed in 5.10.267, 5.15.218, 6.1.185, 6.6.154, 6.12.106, 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80795" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80799: out-of-bounds read and offset wrap in the NFC LLCP parsers
&lt;/h3&gt;

&lt;p&gt;The LLCP TLV parsers contain three related bugs. The loop offset is declared as an 8-bit value while the total length is 16-bit, so once the walk passes 255 the offset wraps to zero and the loop either repeats data or does not terminate. The type and length bytes are read without checking that two more bytes are available. And the value bytes are read without checking that the declared length fits in the buffer, so a declared length of 255 on a short buffer reads up to 255 bytes past the end.&lt;/p&gt;

&lt;p&gt;This one is worth a note for anyone on an older LTS branch: the record lists the problem as reaching back to 5.10.188, 5.4.251 and 4.19.291, so it is long-standing code rather than a recent regression. Ten more NFC records land in the same week, the rest of the CVE-2026-80794 to CVE-2026-80803 block plus &lt;code&gt;CVE-2026-80823&lt;/code&gt;, and they are all input validation in the same area. If your product has an NFC radio, treat the group as one update. The affected file is &lt;code&gt;net/nfc/llcp_commands.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_NFC&lt;/code&gt;. Fixed in 5.10.267, 5.15.218, 6.1.185, 6.6.154, 6.12.106, 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80799" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80781: out-of-bounds read in the HID core
&lt;/h3&gt;

&lt;p&gt;&lt;code&gt;hid_set_field()&lt;/code&gt; passes &lt;code&gt;field-&amp;gt;usage + offset&lt;/code&gt; to the input dumping helper before the check that bounds &lt;code&gt;offset&lt;/code&gt;. The usage array is allocated inline with the field structure and holds a fixed number of entries, so an offset past the end reads into a neighbouring object. Moving the bounds check ahead of the call fixes it, because the check already confines the offset to the array.&lt;/p&gt;

&lt;p&gt;The reachability depends on one build option: the dumping helper only dereferences the pointer when &lt;code&gt;CONFIG_DEBUG_FS&lt;/code&gt; is enabled. Production embedded images often build without debugfs, and those images are not exposed through this path. The affected file is &lt;code&gt;drivers/hid/hid-core.c&lt;/code&gt;, so the gates are &lt;code&gt;CONFIG_HID&lt;/code&gt; together with &lt;code&gt;CONFIG_DEBUG_FS&lt;/code&gt;. This is one of 14 HID records this week, including &lt;code&gt;CVE-2026-80780&lt;/code&gt; (an out-of-bounds write when the device has no input) and &lt;code&gt;CVE-2026-80783&lt;/code&gt; (unbounded recursion parsing a Magic Mouse report). Fixed in 5.10.267, 5.15.218, 6.1.185, 6.6.154, 6.12.106, 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80781" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80735: ovpn dereferenced socket data it did not own
&lt;/h3&gt;

&lt;p&gt;The in-kernel OpenVPN data channel stores its own state in the socket's &lt;code&gt;sk_user_data&lt;/code&gt; field. Other subsystems use the same field for their own purposes. BPF SOCKMAP, for example, sets &lt;code&gt;sk_user_data&lt;/code&gt; without setting the encapsulation type that ovpn uses to recognise its own sockets. So ovpn could dereference a pointer belonging to another subsystem, which gives out-of-bounds reads. The fix checks the encapsulation type before the dereference.&lt;/p&gt;

&lt;p&gt;This is narrow but relevant on gateways that terminate VPN tunnels and also run BPF programs on sockets, which is a common combination on modern edge routers. The ovpn driver was merged in 6.16, so the older LTS branches do not contain this code at all. The affected file is &lt;code&gt;drivers/net/ovpn/socket.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_OVPN&lt;/code&gt;. Fixed in 6.18.45 and 7.1.9. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80735" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  Cloud and datacenter
&lt;/h2&gt;

&lt;p&gt;The highest priority here is the NVMe-over-TCP target, because the input arrives from the network before authentication. The guest-to-host records come next, then the local memory-corruption records that matter on shared hosts.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80789: NVMe-over-TCP target allocated buffers from an unbounded wire value
&lt;/h3&gt;

&lt;p&gt;The target reads the 32-bit SGL length sent by the initiator. For the in-capsule descriptor type it checks that length against the configured inline data size. For every other descriptor type, including the transport data-block descriptor that a real initiator uses for out-of-capsule writes, the check is skipped and the value goes straight into the scatterlist allocator. The value is host-controlled and unbounded up to 4 GiB, and no other layer inspects it. The fix bounds the length before the allocation.&lt;/p&gt;

&lt;p&gt;Treat this as the first item on any host that exports NVMe-over-TCP namespaces, because the trigger is a single command from anything that can open a TCP connection to the target port. The companion record &lt;code&gt;CVE-2026-80788&lt;/code&gt; covers the same code path from the other side: an oversized SGL made the page allocator hit a warning that a remote initiator could trigger at will, and that warning is now removed. The affected file is &lt;code&gt;drivers/nvme/target/tcp.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_NVME_TARGET_TCP&lt;/code&gt;. Fixed in 5.10.269, 5.15.220, 6.1.187, 6.6.156, 6.12.106, 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80789" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80891: KVM on s390 pinned guest pages without validating the interrupt vectors
&lt;/h3&gt;

&lt;p&gt;For PCI passthrough on s390, the host pins guest pages that hold the adapter interrupt bit vector and the summary bit indicator. The size of the bit vector is derived from values the guest supplies. Neither the size nor the alignment was validated, so a bit vector spanning more than one page, or a summary address that is not 8-byte aligned, could be accepted and pinned. The fix rejects both cases.&lt;/p&gt;

&lt;p&gt;This crosses the guest-to-host boundary, which is why it belongs at the top of the list on any s390 host that passes PCI functions through to guests. The affected file is &lt;code&gt;arch/s390/kvm/pci.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_KVM&lt;/code&gt; on s390 together with zPCI passthrough enabled. Fixed in 6.1.183, 6.6.151, 6.12.103, 6.18.44 and 7.1.8. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80891" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80853: KVM SEV used a partial page as a firmware command buffer
&lt;/h3&gt;

&lt;p&gt;When KVM encrypts or decrypts guest memory through a temporary buffer, the page holding that buffer is handed to SEV firmware for the duration of the command. On an SNP-enabled host, a page assigned to firmware must be wholly owned by KVM, because other kernel code sharing the same page could be allocated and accessed while the transfer of ownership is in effect. The buffer was smaller than a page, so the rest of the page was not KVM's. The fix allocates a full 4 KiB page.&lt;/p&gt;

&lt;p&gt;This is the one record in this advisory that affects a single branch. It is fixed in 7.2.3, and no other stable branch is named as affected. It matters for confidential-computing hosts that run SEV or SEV-ES guests on SNP-capable hardware. The affected file is &lt;code&gt;arch/x86/kvm/svm/sev.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_KVM_AMD_SEV&lt;/code&gt;. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80853" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80758: use-after-free in the futex private hash
&lt;/h3&gt;

&lt;p&gt;The futex code drops its reference to the private hash and then reads a field out of that same structure. Dropping the reference re-enables preemption. If that drop released the last reference and the task is then preempted, another task can switch to the replacement hash and free the old one after a grace period. When the first task resumes, it reads from freed memory. KASAN reports a use-after-free read in a freed 512-byte allocation. The fix loads the field while the reference is still held.&lt;/p&gt;

&lt;p&gt;Futex code is reachable by any unprivileged process, and it is built on every normal configuration; turning it off requires an expert-mode kernel config. That makes this the widest-reaching local record of the week, and it is the one to prioritise on multi-tenant hosts and container fleets. Four more futex records land in the same week: &lt;code&gt;CVE-2026-80775&lt;/code&gt; is a race on the initial private-hash allocation and &lt;code&gt;CVE-2026-80776&lt;/code&gt; is a race during the private-hash resize, and &lt;code&gt;CVE-2026-80777&lt;/code&gt; and &lt;code&gt;CVE-2026-80778&lt;/code&gt; fix ownership handling across &lt;code&gt;exec()&lt;/code&gt; and across address spaces. The affected file is &lt;code&gt;kernel/futex/core.c&lt;/code&gt;. Fixed in 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80758" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80810: io_uring computed a folio size with a 32-bit shift
&lt;/h3&gt;

&lt;p&gt;When filling the bio vector for a registered buffer, io_uring computed the folio size as &lt;code&gt;1 &amp;lt;&amp;lt; imu-&amp;gt;folio_shift&lt;/code&gt; using a plain &lt;code&gt;int&lt;/code&gt; for the 1. The shift count comes from the folio backing the buffer and can be 32 or more on a 64-bit kernel. Shifting a 32-bit value that far is undefined behaviour, and on x86 and arm64 the processor takes the count modulo 32, so a shift of 34 produces 4 instead of 16 GiB. The size estimate and the fill loop then disagree about how many segments are needed. The fix uses an unsigned long, as the rest of the file already does.&lt;/p&gt;

&lt;p&gt;The precondition is a registered buffer backed by a very large folio, which in practice means a host configured for 1 GiB pages or larger. That is a deliberate configuration, not a default, so most systems are not exposed. On hosts that do use huge folios with io_uring, an unprivileged process can reach it. A second io_uring record this week, &lt;code&gt;CVE-2026-80811&lt;/code&gt;, fixes an iovec leak in the io_uring command path. The affected file is &lt;code&gt;io_uring/rsrc.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_IO_URING&lt;/code&gt;. Fixed in 6.18.47, 7.1.11 and 7.2.1. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80810" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80850: use-after-free of TCP-AO state on connect
&lt;/h3&gt;

&lt;p&gt;TCP Authentication Option protects long-lived TCP sessions, and it is most often used on BGP peerings. On connect, the socket is added to the lookup hash before the AO key state is initialised. The connect path first checks that a key matches the peer and the bound device's VRF membership, then resolves the VRF again later and removes keys that do not match. The socket lock does not stop the device from being detached from its VRF in between. If that happens, the first check passes, the second observes a different VRF and removes the only key, and the no-key path then frees the AO state on a socket that is already visible in the hash. The fix keeps the two views consistent.&lt;/p&gt;

&lt;p&gt;The trigger requires a VRF change during connect, so this is a race rather than something a remote peer can drive on its own. It is listed here because the affected deployments are network devices and routing hosts that use both VRFs and TCP-AO. The affected file is &lt;code&gt;net/ipv4/tcp_ao.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_TCP_AO&lt;/code&gt;. Fixed in 6.12.108, 6.18.49, 7.1.13 and 7.2.3. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80850" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h3&gt;
  
  
  CVE-2026-80852: out-of-bounds write in the kTLS transmit offload path
&lt;/h3&gt;

&lt;p&gt;The kTLS device path checks whether an open record still has room for another fragment only at the bottom of its loop, and the &lt;code&gt;MSG_MORE&lt;/code&gt; early exit skips that check. The record then survives into the next system call with the fragment count it already had, and the append function does not check either. With transmit zero-copy enabled, repeated &lt;code&gt;splice()&lt;/code&gt; calls with &lt;code&gt;SPLICE_F_MORE&lt;/code&gt; each add a fragment that cannot be merged, and the fragment count grows past the end of the fixed-size fragment array in the record structure. That is an out-of-bounds write. The fix adds the missing checks.&lt;/p&gt;

&lt;p&gt;The precondition is real hardware TLS transmit offload. The record notes it was found with a network device simulator, because the code path is otherwise only reachable on a NIC that implements the offload. So this matters on datacenter hosts with kTLS offload enabled on the NIC, and nowhere else. The affected file is &lt;code&gt;net/tls/tls_device.c&lt;/code&gt;, so the gate is &lt;code&gt;CONFIG_TLS_DEVICE&lt;/code&gt;. Fixed in 6.1.187, 6.6.156, 6.12.108, 6.18.49, 7.1.13 and 7.2.3. See the &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80852" rel="noopener noreferrer"&gt;CVE record&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  Medical devices
&lt;/h2&gt;

&lt;p&gt;Several of this week's records are worth reviewing for connected clinical equipment, and they fall into three groups.&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;Wireless and short-range links. &lt;code&gt;CVE-2026-80762&lt;/code&gt; matters for wearables, patient monitors and any device that suspends and wakes on a Bluetooth link, and the other six Bluetooth records this week are in the same connection-lifetime area. &lt;code&gt;CVE-2026-80795&lt;/code&gt; and &lt;code&gt;CVE-2026-80799&lt;/code&gt; matter for equipment that reads NFC tags, which includes patient wristband readers and consumable authentication on infusion and dialysis equipment.&lt;/li&gt;
&lt;li&gt;Network protocols. Devices that carry DICOM, HL7 or FHIR over IP should review &lt;code&gt;CVE-2026-80850&lt;/code&gt; if they use TCP Authentication Option, and should note that &lt;code&gt;CVE-2026-74752&lt;/code&gt; in SCTP, carried over from last week, is still unfixed on every LTS branch below 7.1. Devices that reach the network through a USB cellular modem should review &lt;code&gt;CVE-2026-80827&lt;/code&gt;.&lt;/li&gt;
&lt;li&gt;Bedside peripherals. &lt;code&gt;CVE-2026-80781&lt;/code&gt; in the HID core, and the 13 other HID records this week, apply to any device with an attached keyboard, barcode scanner, pointing device or foot pedal. Check whether your image builds &lt;code&gt;CONFIG_DEBUG_FS&lt;/code&gt;, because that decides whether this particular record is reachable at all.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;Patching a medical device is not the same as patching a server. The update has to pass validation and regulatory revalidation, under the US FDA postmarket cybersecurity guidance, the EU Medical Device Regulation (MDR) and IEC 62304. So the action is to plan the stable kernel update through the manufacturer's change-control process, and not to apply it outside that process.&lt;/p&gt;

&lt;h2&gt;
  
  
  How to check which Linux kernel CVEs apply to you
&lt;/h2&gt;

&lt;p&gt;There are three questions.&lt;/p&gt;

&lt;p&gt;First, version. Compare the running kernel version with the table above. Because this week's targets are the newest release on every branch, the check is simple: if you are not on the current release for your branch, you are behind. Unlike last week, the branch target is the whole answer this time, because no record leaves a branch affected and unfixed.&lt;/p&gt;

&lt;p&gt;Second, configuration. Check your kernel config for the feature behind each record. If the vulnerable code is not built into the kernel and is not available as a loadable module, the record is generally not reachable through that feature. On a running system with config access enabled, one command covers the most widely built of them.&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight shell"&gt;&lt;code&gt;raghu@techveda.org:~&lt;span class="nv"&gt;$ &lt;/span&gt;zcat /proc/config.gz | &lt;span class="nb"&gt;grep&lt;/span&gt; &lt;span class="nt"&gt;-E&lt;/span&gt; &lt;span class="s1"&gt;'^(# )?CONFIG_(BT|NFC|HID|IO_URING|TLS_DEVICE|USB_SERIAL_OPTION)[ =]'&lt;/span&gt;
&lt;span class="nv"&gt;CONFIG_BT&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;m
&lt;span class="nv"&gt;CONFIG_NFC&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;m
&lt;span class="nv"&gt;CONFIG_HID&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;y
&lt;span class="nv"&gt;CONFIG_IO_URING&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;y
&lt;span class="c"&gt;# CONFIG_TLS_DEVICE is not set&lt;/span&gt;
&lt;span class="nv"&gt;CONFIG_USB_SERIAL_OPTION&lt;/span&gt;&lt;span class="o"&gt;=&lt;/span&gt;m
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;The pattern is anchored on purpose. A plain &lt;code&gt;grep CONFIG_BT&lt;/code&gt; would also match &lt;code&gt;CONFIG_BTRFS_FS&lt;/code&gt; and every &lt;code&gt;CONFIG_BT_*&lt;/code&gt; sub-option, which makes the output hard to read. The other symbols used in this advisory are &lt;code&gt;CONFIG_MT7925U&lt;/code&gt;, &lt;code&gt;CONFIG_CAN_ISOTP&lt;/code&gt;, &lt;code&gt;CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER&lt;/code&gt;, &lt;code&gt;CONFIG_NFC_NCI&lt;/code&gt;, &lt;code&gt;CONFIG_DEBUG_FS&lt;/code&gt;, &lt;code&gt;CONFIG_OVPN&lt;/code&gt;, &lt;code&gt;CONFIG_NVME_TARGET_TCP&lt;/code&gt;, &lt;code&gt;CONFIG_KVM&lt;/code&gt;, &lt;code&gt;CONFIG_KVM_AMD_SEV&lt;/code&gt; and &lt;code&gt;CONFIG_TCP_AO&lt;/code&gt;.&lt;/p&gt;

&lt;p&gt;Read &lt;code&gt;=m&lt;/code&gt; differently from &lt;code&gt;=y&lt;/code&gt;. A symbol set to &lt;code&gt;m&lt;/code&gt; means the code is present on the system and can be loaded, so it still counts as reachable unless your module-loading policy prevents it. If your system has no &lt;code&gt;/proc/config.gz&lt;/code&gt;, use the config file from your build tree or the matching file under &lt;code&gt;/boot&lt;/code&gt;. One record in this advisory, &lt;code&gt;CVE-2026-80758&lt;/code&gt; in futex, has no practical config gate at all, because futex support is built on every normal configuration.&lt;/p&gt;

&lt;p&gt;Third, reachability, which sets the order of work. The records describe code paths rather than attacker models, so the ordering below is our reading of reachability and not a statement from the kernel CVE team.&lt;/p&gt;

&lt;p&gt;Remote and over-the-air paths come first. On a storage host, that means &lt;code&gt;CVE-2026-80789&lt;/code&gt; in the NVMe-over-TCP target, because a single command from any client that can reach the port triggers it. On a device with a radio, that means the NFC records and the Bluetooth records. Local unprivileged memory corruption comes second, led by &lt;code&gt;CVE-2026-80758&lt;/code&gt; in futex, which is reachable by any process on almost any configuration. Guest-to-host records come third and are first in priority on shared hosts: &lt;code&gt;CVE-2026-80891&lt;/code&gt; on s390 and &lt;code&gt;CVE-2026-80853&lt;/code&gt; on SEV hardware. Records that need a specific configuration or specific hardware come last, which is where &lt;code&gt;CVE-2026-80852&lt;/code&gt;, &lt;code&gt;CVE-2026-80810&lt;/code&gt; and &lt;code&gt;CVE-2026-80749&lt;/code&gt; sit.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;Update to the target release for your branch: 5.10.269, 5.15.220, 6.1.187, 6.6.156, 6.12.108, 6.18.49, 7.1.13 or 7.2.3. Each target is the newest release of its branch.&lt;/li&gt;
&lt;li&gt;The 7.1 branch reached end of life with 7.1.13 on 2 September 2026. Install 7.1.13, then plan a move to 7.2 or to a longterm branch such as 6.18, because no further 7.1 release will come.&lt;/li&gt;
&lt;li&gt;Unlike last week, the branch update clears everything published in this window. No record this week marks a branch as affected without naming a fix for it.&lt;/li&gt;
&lt;li&gt;Three USB records set the target on all eight branches: &lt;code&gt;CVE-2026-80824&lt;/code&gt;, &lt;code&gt;CVE-2026-80827&lt;/code&gt; and &lt;code&gt;CVE-2026-80830&lt;/code&gt;.&lt;/li&gt;
&lt;li&gt;Five older items are still open on the older LTS branches: &lt;code&gt;CVE-2026-74752&lt;/code&gt;, &lt;code&gt;CVE-2026-80551&lt;/code&gt;, &lt;code&gt;CVE-2026-74743&lt;/code&gt;, &lt;code&gt;CVE-2026-80635&lt;/code&gt; and &lt;code&gt;CVE-2026-74582&lt;/code&gt;. Nothing this week changes them, so keep tracking them separately.&lt;/li&gt;
&lt;li&gt;On a storage host, schedule &lt;code&gt;CVE-2026-80789&lt;/code&gt; first. The NVMe-over-TCP target allocated buffers from an unbounded value sent by the initiator.&lt;/li&gt;
&lt;li&gt;On a multi-tenant or container host, schedule &lt;code&gt;CVE-2026-80758&lt;/code&gt; first. Futex code is reachable by any unprivileged process and is built on every normal configuration.&lt;/li&gt;
&lt;li&gt;On a device with a radio, the NFC group (eleven records this week) and the Bluetooth group (seven records) are the ones to take as a unit rather than as single patches.&lt;/li&gt;
&lt;li&gt;On a vendor or BSP kernel, ask the vendor to confirm the fixes are in their tree rather than comparing version strings.&lt;/li&gt;
&lt;li&gt;None of the records notes known exploitation, and no public exploit code was found for any of them at the time of writing. That is a point-in-time check, not a guarantee.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;What is the one thing I should do?&lt;/strong&gt;&lt;br&gt;
Update to the target release for your branch: 5.10.269, 5.15.220, 6.1.187, 6.6.156, 6.12.108, 6.18.49, 7.1.13 or 7.2.3. Each of those is the newest release of its branch, so on an upstream kernel you just install the current release. If you run a vendor or BSP kernel, ask your vendor to confirm the fixes are in their tree instead, because a vendor version string will not compare cleanly with those numbers.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;I run 7.1. What does its end of life mean for me?&lt;/strong&gt;&lt;br&gt;
7.1.13, released on 2 September 2026, is the final release of the 7.1 branch. It contains the fixes for every record in this advisory, so installing it is still the right action today. But no 7.1.14 will follow, so from now on kernel CVEs affecting code that 7.1 contains will stay unfixed on that branch. Install 7.1.13, then plan a move to 7.2, which is the current stable series, or to a longterm branch such as 6.18 if you would rather change kernel version rarely. There is no time pressure this week, because 7.1.13 is fully patched.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Is 188 CVEs in one week a lot?&lt;/strong&gt;&lt;br&gt;
No, it is close to a normal week for this project. Last week was 227, and that was unusual because a full stable cycle landed on a single day and all the records were published together. This week the count comes from ordinary weekly stable releases. The IDs form one continuous block, CVE-2026-80726 to CVE-2026-80913.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Are any of these a 0-day?&lt;/strong&gt;&lt;br&gt;
No. All 188 were published with fixes already in stable, and this week every record names a fixed version for every branch it marks as affected. None of the records notes known exploitation, and no public exploit code was found for any of them at the time of writing, though that is a point-in-time check rather than a guarantee. The action is to schedule the stable update through your normal process.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;I already applied last week's targets. Am I covered?&lt;/strong&gt;&lt;br&gt;
No. Last week's targets were 5.10.268, 5.15.219, 6.1.186, 6.6.155, 6.12.107, 6.18.48, 7.1.12 and 7.2.2. Every branch has moved up exactly one point release since then, so you need this week's targets as well. Three USB records, CVE-2026-80824, CVE-2026-80827 and CVE-2026-80830, are the reason the target moved on every branch.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Which one should I schedule first?&lt;/strong&gt;&lt;br&gt;
It depends on what the machine does. On a host that exports NVMe-over-TCP namespaces, CVE-2026-80789, because the input arrives from the network before authentication. On a multi-tenant or container host, CVE-2026-80758 in futex, because any unprivileged process can reach it. On an s390 host with PCI passthrough, CVE-2026-80891. On a device with an NFC or Bluetooth radio, the NFC group and the Bluetooth group. On a gateway with a USB cellular modem, CVE-2026-80827.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;We do not build NFC, Bluetooth or NVMe-over-TCP. Do these affect us?&lt;/strong&gt;&lt;br&gt;
Each bug is gated by a kernel config option, and the ones used in this advisory are CONFIG_MT7925U, CONFIG_BT, CONFIG_CAN_ISOTP, CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER, CONFIG_USB_SERIAL_OPTION, CONFIG_NFC_NCI, CONFIG_NFC, CONFIG_HID with CONFIG_DEBUG_FS, CONFIG_OVPN, CONFIG_NVME_TARGET_TCP, CONFIG_KVM, CONFIG_KVM_AMD_SEV, CONFIG_IO_URING, CONFIG_TCP_AO and CONFIG_TLS_DEVICE. If the vulnerable code is not built into the kernel and is not available as a loadable module, the record is generally not reachable through that feature. Read a symbol set to m as still present and loadable rather than absent. One record is an exception: CVE-2026-80758 in futex has no practical config gate, because futex support is built on every normal configuration.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Why did only some records get their own heading?&lt;/strong&gt;&lt;br&gt;
188 records is too many to explain one by one, so this advisory explains the ones that are reachable over the air, reachable by an unprivileged local process, or reachable across the guest-to-host boundary, plus a few that are tied to a specific device class. Every record in the window is fixed by the branch target in the table, so the ones without a heading are covered by the same single update.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;&lt;a href="https://lore.kernel.org/linux-cve-announce/?q=d:20260830..20260906" rel="noopener noreferrer"&gt;linux-cve-announce, 30 August to 5 September 2026&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80789" rel="noopener noreferrer"&gt;CVE-2026-80789 (NVMe-over-TCP target SGL length)&lt;/a&gt; and &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80795" rel="noopener noreferrer"&gt;CVE-2026-80795 (NFC NCI out-of-bounds write)&lt;/a&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80758" rel="noopener noreferrer"&gt;CVE-2026-80758 (futex private hash use-after-free)&lt;/a&gt; and &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80827" rel="noopener noreferrer"&gt;CVE-2026-80827 (USB serial option out-of-bounds read)&lt;/a&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80891" rel="noopener noreferrer"&gt;CVE-2026-80891 (KVM s390 PCI)&lt;/a&gt; and &lt;a href="https://www.cve.org/CVERecord?id=CVE-2026-80853" rel="noopener noreferrer"&gt;CVE-2026-80853 (KVM SEV command buffer)&lt;/a&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.kernel.org/releases.json" rel="noopener noreferrer"&gt;kernel.org active releases&lt;/a&gt; and &lt;a href="https://www.kernel.org/category/releases.html" rel="noopener noreferrer"&gt;projected end-of-life dates&lt;/a&gt;
&lt;/li&gt;
&lt;li&gt;&lt;a href="https://www.techveda.live/2026/08/29/linux-kernel-cves-29-aug-2026/" rel="noopener noreferrer"&gt;Previous edition on TECH VEDA: Linux Kernel CVEs, 23 to 29 August 2026&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;

</description>
      <category>linux</category>
      <category>security</category>
      <category>embedded</category>
      <category>kernel</category>
    </item>
    <item>
      <title>What a Linux Safety Certification Actually Covers</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Fri, 04 Sep 2026 03:51:46 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/what-a-linux-safety-certification-actually-covers-45oh</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/what-a-linux-safety-certification-actually-covers-45oh</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;A Linux safety certification is a statement about one defined software configuration running on named hardware, assessed by a named body. It is not a statement about the Linux kernel, and it does not give your item its integrity level. The document describing how a component like the kernel enters an ISO 26262 argument at all is ISO/PAS 8926:2024, published on 29 January 2024, which moves the question away from code quality and towards classification, complexity and evidence. Red Hat's In-Vehicle Operating System is the clearest public example: certified by exida against ISO 26262 Edition 2 (2018) as a Safety Element out of Context at ASIL-B, with Renesas naming the R-Car S4 as the first platform to be certified.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;If you build vehicle software on Linux, a supplier will at some point hand you a claim that sounds decisive: this platform is certified. The engineer who has to integrate it then finds the claim carries almost no information on its own. A Linux safety certification is bounded by a configuration, a set of assumptions, a hardware list and an assessor. This article explains where those bounds come from, what changed in 2024, and what to ask before accepting such a claim into your own safety case.&lt;/p&gt;

&lt;h2&gt;
  
  
  Why the kernel cannot be qualified
&lt;/h2&gt;

&lt;p&gt;Functional safety standards assume a particular kind of software. A classic safety component is written against a complete requirements specification, each requirement traced to a design element, to code and to a test, with structural coverage evidence at the end. That is workable for tens of thousands of lines written by one team for one purpose. The Linux kernel is not that: tens of millions of lines, contributed by thousands of people who never wrote a requirements specification for the automotive context, changing on a nine-week cadence.&lt;/p&gt;

&lt;p&gt;An earlier article here, &lt;a href="https://www.techveda.live/2026/07/30/safety-critical-linux/" rel="noopener noreferrer"&gt;Safety-Critical Linux: What Certifying It Actually Takes&lt;/a&gt;, sets out how a safety argument is assembled around Linux. This goes a level below it: by what defined mechanism does pre-existing software become admissible in an ISO 26262 argument at all, and what does the resulting certificate bound?&lt;/p&gt;

&lt;p&gt;Before 2024 there was no route designed for this, which is why a Linux safety certification was so hard to scope. The two normally reached for are both in ISO 26262-8:2018, the supporting-processes part: qualification of software components, and the proven-in-use argument. Qualification expects the component's functional behaviour, resource usage and behaviour under failure and overload to be specified and tested, which is impractical across the number of interfaces a kernel exposes. Proven in use expects field evidence about an unchanged element, which does not fit a codebase that takes fixes continuously.&lt;/p&gt;

&lt;h2&gt;
  
  
  What ISO/PAS 8926:2024 adds to a Linux safety certification
&lt;/h2&gt;

&lt;p&gt;ISO/PAS 8926:2024 is titled &lt;em&gt;Road vehicles — Functional safety — Use of pre-existing software architectural elements&lt;/em&gt;. Published on 29 January 2024, 19 pages, from ISO/TC 22/SC 32, the subcommittee that produces ISO 26262. It is a Publicly Available Specification rather than an International Standard, so it is a published route to a Linux safety certification rather than an obligation, and whether a programme uses it is a matter for its safety plan and its assessor.&lt;/p&gt;

&lt;p&gt;It defines a term for the thing you are trying to bring in. A pre-existing software architectural element, abbreviated PSAE, is software that already exists — commercial off the shelf or custom — that was not built to order and was not developed to conform with the ISO 26262:2018 series. The Linux kernel meets that definition, as do the C library and a vendor BSP's driver set. Meeting it is a starting condition, not a verdict: an element becomes safety-related only when software safety requirements are allocated to it, or when its failures could violate one.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;One of the two elements the specification illustrates is an operating system.&lt;/strong&gt; Its general clause describes an OS hosting safety-related applications and names the properties such an element can carry: correct execution with partitioning to achieve freedom from interference, and a defined strategy for fault handling. The other illustration is a safety-related device driver. That first one tells you what a Linux safety certification is about — not that the kernel is correct, but that this configuration provides partitioning and fault handling adequate to the requirements allocated to it.&lt;/p&gt;

&lt;p&gt;That sentence is easy to read too generously. Naming partitioning as a property of an operating system is not the same as a stock kernel supplying it. Freedom from interference has to be argued for the specific resources the safety function uses, and the mechanisms are mostly not kernel defaults: memory and device isolation through the MMU and the IOMMU, a hypervisor or a separate safety island, CPU affinity and &lt;code&gt;cpuset&lt;/code&gt; reservation, interrupt affinity, explicit device assignment, and watchdogs with defined restart domains and safe states. Each of those has to be configured deliberately and then shown to hold. The residual paths are where the argument is usually lost rather than won: a DMA-capable peripheral reaching memory it should not, cache and memory-bandwidth contention between a safety task and an infotainment workload, a shared clock or reset domain, or a driver shared across the partition boundary. Enabling an isolation feature is the start of the argument, not the argument.&lt;/p&gt;

&lt;p&gt;The examination of a pre-existing element covers, among other things:&lt;/p&gt;

&lt;ul&gt;
&lt;li&gt;which of the element's functions and properties correspond to the safety requirements allocated to it;&lt;/li&gt;
&lt;li&gt;whether its implementation and interfaces fit the static and dynamic design of the target architecture;&lt;/li&gt;
&lt;li&gt;whether the target has enough hardware and software resources once it is integrated;&lt;/li&gt;
&lt;li&gt;whether unused functionality can be shown not to interfere, or excluded — the specification names build-process configuration settings as the way this is done;&lt;/li&gt;
&lt;li&gt;whether unintended behaviour is absent, or the risk it introduces is low enough.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;The fourth changes daily work. A kernel configuration here is not a build preference; it is the evidence for what was built into the image and what was left out. Note the limit: not compiled in is not the same as absent from the running system. Anything set to &lt;code&gt;m&lt;/code&gt; still ships and can be loaded, and options pulled in by &lt;code&gt;select&lt;/code&gt; arrive without being asked for.&lt;/p&gt;

&lt;h2&gt;
  
  
  Classification, complexity and evidence
&lt;/h2&gt;

&lt;p&gt;The mechanism ISO/PAS 8926 adds on top of ISO 26262-8, and the one that decides the shape of a Linux safety certification, is a classification step. It decides whether software qualification under ISO 26262-8:2018, Clause 12 applies to the element, or whether specific safety activities are tailored under ISO 26262-2:2018, 6.4.5.1 and 6.4.5.2, and planned under 6.4.6.7. Confirmation measures under 6.4.9 may apply to the classification and impact analysis themselves. Those cross-references are cited by number inside the specification.&lt;/p&gt;

&lt;p&gt;Two considerations drive the classification. The first is that uncertainty about the process used to develop the element may increase the likelihood of systematic faults. The second is that the element's complexity can make systematic faults harder to find. Complexity is then evaluated with selected measures, and the specification allows numerical methods such as cyclomatic complexity or a count of lines, as well as qualitative methods.&lt;/p&gt;

&lt;p&gt;Applied to the kernel, this determines what a Linux safety certification can claim. Complexity is an explicit acceptance input, so the way to make the argument tractable is to reduce the element rather than defend it: the smallest configuration that still supports the allocated requirements. A line count is only an input, and not the one that dominates — configuration choices, concurrency, and the number of interfaces exposed through system calls, ioctls and sysfs matter more to a Linux platform than any single number. The practical work is configuration reduction, interface analysis and exclusion of unused subsystems, not kernel code review.&lt;/p&gt;

&lt;p&gt;The specification also defines provenance — the origins, custody and ownership of the software and its data — which for a kernel arriving as a vendor BSP branch on a stable series on mainline means which tree, which tag, which patches, and who applied them. The route has an entry condition too: it assumes a software safety requirements specification, a safety analysis report and organisation-level functional-safety processes already exist. A BSP team cannot start here.&lt;/p&gt;

&lt;p&gt;One limit, stated plainly: the classification criteria, the class boundary, the suitability evaluation and both annexes are in the paid text and were not read for this article.&lt;/p&gt;

&lt;h2&gt;
  
  
  What changed, and when
&lt;/h2&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;State&lt;/th&gt;
&lt;th&gt;Date&lt;/th&gt;
&lt;th&gt;Position&lt;/th&gt;
&lt;th&gt;Source&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;Before&lt;/td&gt;
&lt;td&gt;17 December 2018&lt;/td&gt;
&lt;td&gt;ISO 26262-8:2018 published, Edition 2, 60 pages. The routes for a pre-existing element are software-component qualification and the proven-in-use argument. Neither is designed for the kernel's size or change rate.&lt;/td&gt;
&lt;td&gt;ISO catalogue entry 68390&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;After&lt;/td&gt;
&lt;td&gt;29 January 2024&lt;/td&gt;
&lt;td&gt;ISO/PAS 8926:2024 published, Edition 1, 19 pages, same subcommittee. Adds a classification step deciding whether Clause 12 qualification applies at all, or the ISO 26262-2 activities are tailored instead, and makes complexity an explicit input.&lt;/td&gt;
&lt;td&gt;ISO catalogue entry 83346&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Since&lt;/td&gt;
&lt;td&gt;8 July 2024&lt;/td&gt;
&lt;td&gt;ISO 26262-8:2018 moved to stage 90.92, "International Standard to be revised". ISO's catalogue names ISO/DIS 26262-8 as under development.&lt;/td&gt;
&lt;td&gt;ISO catalogue entry 68390&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;The last row indicates where the standard is heading, and should be read carefully rather than optimistically. A part moving to "to be revised" tells you the committee intends a new edition. It does not tell you what that edition will say, and no publication date was found. Planning a programme around a future Part 8 means planning around something that does not exist yet.&lt;/p&gt;

&lt;h2&gt;
  
  
  Reading a Linux safety certification claim
&lt;/h2&gt;

&lt;p&gt;The clearest public example of a scoped claim is Red Hat's. In a press release dated 20 May 2025, Red Hat states that Red Hat In-Vehicle Operating System achieved functional safety certification as a Safety Element out of Context against ISO 26262 Edition 2, 2018, at ASIL-B, assessed by exida. The same release says customers will receive a Safety Guidance document containing Assumptions of Use, and that qualified hardware platforms will be rolled out on a cadence within the scope of the certification, with Renesas stating that the first certification will be on the R-Car S4. Those were forward-looking statements in May 2025. This article did not read the exida certificate or any assessment report and found no later dated statement, so which platforms are in scope today is not established here.&lt;/p&gt;

&lt;p&gt;Almost all of that is scope: a named product rather than "Linux", a named assessor, a named standard and level, and a hardware list that grows over time, so the certificate covers the silicon on that list and not the silicon you happen to have. That gives a repeatable test. For any Linux safety certification claim, ask these six questions, and ask for the artefact in the third column rather than accepting the answer in prose.&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Ask the supplier&lt;/th&gt;
&lt;th&gt;Why it matters&lt;/th&gt;
&lt;th&gt;Evidence to request&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;What exactly is certified?&lt;/td&gt;
&lt;td&gt;A distribution, one configuration of it, and one component within it are three different claims. "Linux" is not a uniquely identifiable deliverable.&lt;/td&gt;
&lt;td&gt;Release identifier, kernel tree and commit, patch manifest, the shipped configuration, image hashes&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Who assessed it, against which standard, edition and level?&lt;/td&gt;
&lt;td&gt;An assessment without a named body is a self-declaration. Edition and integrity level change what the claim means.&lt;/td&gt;
&lt;td&gt;Certificate or assessment statement, with scope wording, issue date and current status&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;On what hardware?&lt;/td&gt;
&lt;td&gt;An out-of-context assessment is bound to assumed context, and the target platform is part of that context.&lt;/td&gt;
&lt;td&gt;Qualified-platform list, SoC and board revisions, errata assumptions&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;What are the Assumptions of Use?&lt;/td&gt;
&lt;td&gt;These are obligations transferred to you. Unmet assumptions do not weaken the certificate; they put your system outside its scope.&lt;/td&gt;
&lt;td&gt;Safety manual or safety guidance document, integration constraints, confirmation measures&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;What is explicitly outside scope?&lt;/td&gt;
&lt;td&gt;Exclusions are where an assumed use case quietly stops being covered.&lt;/td&gt;
&lt;td&gt;Stated exclusions, unsupported drivers and features, interface limitations&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;How are updates handled?&lt;/td&gt;
&lt;td&gt;Security and maintenance changes can move the delivered software outside the assessed baseline.&lt;/td&gt;
&lt;td&gt;Patch policy, impact-analysis criteria, notification terms, re-assessment conditions&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;Two things a Linux safety certification does not do are worth stating. It does not transfer an integrity level to your item: an out-of-context element is assessed against an assumed ASIL, while the level your item needs comes from your own hazard analysis. And ISO 26262 does not require third-party certification at all. What it requires is a functional safety assessment and confirmation measures, so a supplier delivering a safety case with an independent assessment and no certificate can be entirely conformant.&lt;/p&gt;

&lt;p&gt;Three claims are also used interchangeably when they are not the same, and only one of them is a Linux safety certification. &lt;em&gt;Certified&lt;/em&gt; means an assessment happened and a certificate names a scope. &lt;em&gt;Certifiable&lt;/em&gt; means a package exists to support an assessment you must still arrange. &lt;em&gt;A safety package is available&lt;/em&gt; means documentation exists and no assessment has been stated. All three can be legitimate; only the first carries an assessor's name.&lt;/p&gt;

&lt;h2&gt;
  
  
  A certificate does not freeze the baseline
&lt;/h2&gt;

&lt;p&gt;The awkward part of a Linux safety certification is that the certified thing keeps moving. Security fixes arrive, the vendor rebases, the toolchain is updated, a board revision changes. None of that is prohibited, and none of it is free: each change needs an impact analysis against the certified scope, the Assumptions of Use and the evidence set, and the depth of re-verification that follows depends on the change and on the safety plan. ISO/PAS 8926 carries a clause on changes to the element's design, whose content sits in the paid text.&lt;/p&gt;

&lt;p&gt;The practical consequence is that a Linux safety certification is a baseline under control, not a baseline frozen. A programme that cannot say which patches it has taken since the assessed release, and what each one touched, has lost the thread of its own argument regardless of what the certificate says. This is the same problem as provenance, seen from the maintenance end.&lt;/p&gt;

&lt;h2&gt;
  
  
  What ELISA does, and what it does not
&lt;/h2&gt;

&lt;p&gt;The Linux Foundation's ELISA project — Enabling Linux In Safety Applications — is where much of the shared groundwork happens. Its site lists eight working groups: Aerospace, Automotive, Linux Features for Safety-Critical Systems, Medical Devices, Open-Source Engineering Process, Safety Architecture, Systems, and Tools. It publishes tooling openly, including BASIL and ks-nav.&lt;/p&gt;

&lt;p&gt;Its position on certification is worth stating because it is often assumed to be otherwise. In the write-up of the ELISA Workshop held at Canonical's London office from 9 to 11 June 2026, published on 27 August 2026, the project records that its Ask Me Anything session clarified that ELISA does not certify Linux and does not guarantee the safety of a complete product. Its role is to identify gaps and develop approaches organisations apply in their own certification contexts, so an appeal to ELISA membership is not a Linux safety certification claim, and using its tools is not evidence until they have a defined role in your safety plan.&lt;/p&gt;

&lt;p&gt;What it does produce is dated and readable. The Linux Features for Safety-Critical Systems working group gave its annual update on 11 February 2026, presented by Alessandro Carminati of NVIDIA. Its 2025 work included a minimal Linux footprint — tracing real application behaviour to determine which kernel features are actually used — and memory isolation analysed through the lifecycle of Virtual Memory Areas. Both bear directly on the exclusion and freedom-from-interference arguments above, and both are investigative rather than a safety case. The workshop slides are published, and the next scheduled event is the Safe Systems with Linux microconference at Linux Plumbers in Prague, 5 to 7 October 2026.&lt;/p&gt;

&lt;h2&gt;
  
  
  What this means for the engineer holding the BSP
&lt;/h2&gt;

&lt;p&gt;Three obligations follow from the classification and examination requirements, and a Linux safety certification will eventually ask you to produce all three.&lt;/p&gt;

&lt;p&gt;The first is configuration identity: the configuration of the kernel that shipped, taken from the device rather than your build directory. Where the defconfig sets &lt;code&gt;CONFIG_IKCONFIG_PROC&lt;/code&gt;, it is embedded in the kernel and readable at runtime:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;root@s32g399aevb3:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;uname&lt;/span&gt; &lt;span class="nt"&gt;-r&lt;/span&gt;
&lt;span class="gp"&gt;root@s32g399aevb3:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;zcat /proc/config.gz &lt;span class="o"&gt;&amp;gt;&lt;/span&gt; /root/running.config
&lt;span class="gp"&gt;root@s32g399aevb3:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;grep&lt;/span&gt; &lt;span class="nt"&gt;-E&lt;/span&gt; &lt;span class="s2"&gt;"^(# )?CONFIG_(PREEMPT|LOCALVERSION|MODULE)"&lt;/span&gt; /root/running.config
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;The pattern is anchored so it returns the whole &lt;code&gt;CONFIG_MODULE&lt;/code&gt; family and not only the plural &lt;code&gt;CONFIG_MODULES&lt;/code&gt;, and the &lt;code&gt;# CONFIG_x is not set&lt;/code&gt; lines matter as much as the rest. This works on the NXP S32 automotive BSP because &lt;code&gt;s32cc_defconfig&lt;/code&gt; sets &lt;code&gt;CONFIG_IKCONFIG_PROC=y&lt;/code&gt;; not every vendor defconfig does. Given only a delivered image and no board, &lt;code&gt;scripts/extract-ikconfig&lt;/code&gt; recovers the same data from the kernel binary.&lt;/p&gt;

&lt;p&gt;The second is provenance and drift. Back on the build machine:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;git &lt;span class="nt"&gt;-C&lt;/span&gt; linux config &lt;span class="nt"&gt;--get&lt;/span&gt; remote.origin.url
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;git &lt;span class="nt"&gt;-C&lt;/span&gt; linux describe &lt;span class="nt"&gt;--long&lt;/span&gt; &lt;span class="nt"&gt;--tags&lt;/span&gt; &lt;span class="nt"&gt;--always&lt;/span&gt; &lt;span class="nt"&gt;--dirty&lt;/span&gt;
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;git &lt;span class="nt"&gt;-C&lt;/span&gt; linux log &lt;span class="nt"&gt;--oneline&lt;/span&gt; v6.12.92..HEAD
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;scp root@s32g399aevb3:/root/running.config &lt;span class="nb"&gt;.&lt;/span&gt;
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;linux/scripts/diffconfig running.config linux/.config
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;The first three establish which tree, which tag and which patches sit above the stable base. &lt;code&gt;--tags&lt;/code&gt; is needed because a lightweight vendor tag is otherwise ignored, and &lt;code&gt;--dirty&lt;/code&gt; because uncommitted patches are otherwise invisible. The last compares what shipped against what you think shipped. Empty output is the evidence, and only the output: &lt;code&gt;diffconfig&lt;/code&gt; exits zero whether or not it finds a difference, and also when it cannot open a file. Treat it as an early drift check rather than proof of equivalence — it compares Kconfig symbols, so it says nothing about the compiler, the device tree, the modules or the image, and it ignores the version banner, which is why &lt;code&gt;uname -r&lt;/code&gt; comes first on the board. For an out-of-tree or Yocto build the configuration is in the build directory, and the layer revisions matter as much as the kernel commit.&lt;/p&gt;

&lt;p&gt;The third is the exclusion argument. Every subsystem, driver and feature built in but not required by the safety function is something you will be asked to justify, and under a classification that treats complexity as an explicit input, reducing the configuration is the most direct way to make the argument smaller. Setting &lt;code&gt;CONFIG_LOCALVERSION_AUTO&lt;/code&gt; so that &lt;code&gt;uname -r&lt;/code&gt; carries the git revision joins the first two obligations at no cost.&lt;/p&gt;

&lt;p&gt;These three are the part of a Linux safety certification that belongs to the team holding the BSP, but they are not the whole evidence pack. What a safety programme actually asks for looks more like this, and the useful discipline is to produce it as a release artefact rather than reconstruct it under assessment.&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Category&lt;/th&gt;
&lt;th&gt;Minimum useful artefact&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;Source identity&lt;/td&gt;
&lt;td&gt;Remote, branch, immutable commit, and the ordered patch series above the stable base with who approved each&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Build identity&lt;/td&gt;
&lt;td&gt;Toolchain version, build-system revision, and for a Yocto build the layer revisions, locked source revisions and &lt;code&gt;buildhistory&lt;/code&gt; output&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Configuration&lt;/td&gt;
&lt;td&gt;The shipped kernel configuration and the fragments that produced it, plus the kernel command line&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Binary identity&lt;/td&gt;
&lt;td&gt;Hashes of the kernel image, the device tree blobs, the modules and the release image&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Hardware identity&lt;/td&gt;
&lt;td&gt;SoC and board revision, memory and peripheral assignment, errata baseline&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Interference analysis&lt;/td&gt;
&lt;td&gt;Safety-related interfaces, shared resources, failure modes and the residual paths named earlier&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Change control&lt;/td&gt;
&lt;td&gt;The assessed baseline, each change since, and the impact analysis that accompanied it&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;On a Yocto-built platform this is worth emphasising: the kernel commit is not the whole provenance story. The layer revisions, the locked source revisions and the build configuration determine as much of what shipped as the kernel tree does, and a safety programme that records only the kernel commit will not be able to reproduce its own image. Assembling this is a different skill from writing kernel code, and it is the skill such programmes most often lack.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;A Linux safety certification bounds a configuration on named hardware, assessed by a named body, with assumptions transferred to the integrator. It is not a property of the kernel, and it does not give your item its ASIL.&lt;/li&gt;
&lt;li&gt;ISO/PAS 8926:2024, published 29 January 2024, defines the route by which a pre-existing element enters an ISO 26262 argument, using classification rather than full qualification. Complexity is an explicit input, which makes configuration reduction the central activity.&lt;/li&gt;
&lt;li&gt;ISO 26262-8:2018 moved to "to be revised" on 8 July 2024 and a draft successor is under development; no publication date is public, so do not plan around it.&lt;/li&gt;
&lt;li&gt;Separate &lt;em&gt;certified&lt;/em&gt;, &lt;em&gt;certifiable&lt;/em&gt; and &lt;em&gt;a safety package is available&lt;/em&gt;. Only the first names an assessor, though ISO 26262 requires an assessment rather than a certificate.&lt;/li&gt;
&lt;li&gt;A Linux safety certification is a controlled baseline, not a frozen one: every patch, rebase and toolchain change needs an impact analysis against the certified scope.&lt;/li&gt;
&lt;li&gt;ELISA states on its own site that it does not certify Linux.&lt;/li&gt;
&lt;li&gt;Configuration identity, provenance and an exclusion argument are what the team holding the BSP will be asked to produce.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;Is the Linux kernel certified to ISO 26262?&lt;/strong&gt;&lt;br&gt;
No. A Linux safety certification attaches to a defined product configuration on named hardware, assessed by a named body against a named edition and integrity level. Red Hat's In-Vehicle Operating System, for example, is certified by exida against ISO 26262 Edition 2 (2018) as a Safety Element out of Context at ASIL-B.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Why does kernel configuration matter so much to a safety argument?&lt;/strong&gt;&lt;br&gt;
Because the examination of a pre-existing element requires showing that unused functionality cannot interfere or has been excluded, and ISO/PAS 8926:2024 names build-process configuration settings as the way that is done. Without an exact record of the shipped configuration the argument cannot be made.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Does a supplier certificate give my item its ASIL?&lt;/strong&gt;&lt;br&gt;
No. A Safety Element out of Context is assessed against an assumed integrity level, while the level your item needs comes from your own hazard analysis. The certificate establishes capability on condition that the Assumptions of Use hold in your design.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Does a matching kernel configuration prove the delivered image is the one you built?&lt;/strong&gt;&lt;br&gt;
No. It shows the Kconfig selections match. It says nothing about the patch stack, the compiler, the device tree, the modules or the final binaries, so pair it with the source commit identity and hashes of what was delivered.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Does ELISA membership mean a platform is safety certified?&lt;/strong&gt;&lt;br&gt;
No. ELISA's own workshop write-up published on 27 August 2026 records that it does not certify Linux and does not guarantee the safety of a complete product. It produces shared analysis, processes and tooling instead.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;ISO, &lt;a href="https://www.iso.org/standard/83346.html" rel="noopener noreferrer"&gt;ISO/PAS 8926:2024 — Use of pre-existing software architectural elements&lt;/a&gt;. A preview of the opening clauses is published free of charge; the clauses this article does not describe are in the paid text.&lt;/li&gt;
&lt;li&gt;ISO, &lt;a href="https://www.iso.org/standard/68390.html" rel="noopener noreferrer"&gt;ISO 26262-8:2018 — Part 8: Supporting processes&lt;/a&gt;. Carries the subject list and the current revision status.&lt;/li&gt;
&lt;li&gt;Red Hat, &lt;a href="https://www.redhat.com/en/about/press-releases/red-hat-prepares-new-future-software-defined-vehicles-upcoming-general-availability-red-hat-vehicle-operating-system" rel="noopener noreferrer"&gt;press release of 20 May 2025 on the In-Vehicle Operating System certification&lt;/a&gt;.&lt;/li&gt;
&lt;li&gt;ELISA Project, &lt;a href="https://elisa.tech/community/working-groups/" rel="noopener noreferrer"&gt;Working Groups&lt;/a&gt;, and the &lt;a href="https://elisa.tech/ambassadors/2026/08/27/from-safety-processes-to-latency-monitoring-elisa-workshop-2026-highlights/" rel="noopener noreferrer"&gt;ELISA Workshop London 2026 highlights&lt;/a&gt; with published slides.&lt;/li&gt;
&lt;li&gt;ELISA Project, &lt;a href="https://elisa.tech/blog/2026/05/06/recap-safety-critical-linux-features-annual-update-feb-11-2026/" rel="noopener noreferrer"&gt;Linux Features for Safety-Critical Systems annual update&lt;/a&gt;, presented 11 February 2026.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;This article is technical commentary on Linux safety certification, based on the sources named above and read on 4 September 2026. It is not certification advice and does not replace the purchased standard, a supplier safety manual, or a qualified assessor.&lt;/p&gt;




&lt;p&gt;&lt;em&gt;Written by Raghu Bharadwaj. TECH VEDA runs hands-on training in Linux kernel internals, device drivers, embedded Linux and BSP development — including the configuration, provenance and build-reproducibility practice this article describes. Details at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;techveda.live&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;

</description>
      <category>linux</category>
      <category>automotive</category>
      <category>embedded</category>
      <category>safety</category>
    </item>
    <item>
      <title>Epistemic Debt: The Code You Own but Cannot Explain</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Thu, 03 Sep 2026 04:41:13 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/epistemic-debt-the-code-you-own-but-cannot-explain-4hpa</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/epistemic-debt-the-code-you-own-but-cannot-explain-4hpa</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;There is a kind of debt that never appears in the codebase. It is the distance between the code you own and the code you understand, and it stays completely invisible while everything is working. It reports itself for the first time on the day something has to be fixed, which is the worst possible day to discover how much of it you are carrying.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;You are forward-porting a vendor kernel. It is two long-term releases behind, it carries somewhere over a thousand out-of-tree patches, and it has been shipping in a product for three years without trouble. A CVE is reported in a subsystem those patches touch, so the fix has to go in.&lt;/p&gt;

&lt;p&gt;The port stops at patch 847. Not because anything is broken — nothing is broken. It stops because the patch conflicts, and the reason it exists is not written anywhere, and the engineer who wrote it left in 2021.&lt;/p&gt;

&lt;p&gt;Everything needed to answer the question is present. The source is there, the history is there, the tree is one clone away. &lt;strong&gt;What is missing was never in the tree in the first place.&lt;/strong&gt;&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;Technical debt is a decision somebody made. This is a decision nobody noticed making.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;h2&gt;
  
  
  What the idea actually says
&lt;/h2&gt;

&lt;p&gt;The name that has started to attach to this is epistemic debt: working software you own legally but do not own cognitively. Technical debt sits in the codebase. This sits in the engineer.&lt;/p&gt;

&lt;p&gt;The two behave differently, and the whole difference is in how they get discovered. Technical debt is discoverable by reading. The awkward function is right there, the &lt;code&gt;TODO&lt;/code&gt; is there, the eleven-minute build is there, and someone who has never seen the project can find all of it in an afternoon. It is visible continuously, which is exactly why teams manage it.&lt;/p&gt;

&lt;p&gt;The other kind becomes visible under one condition only: something has broken, and the usual source of answers cannot help. Until that condition arrives, a system carrying an enormous amount of it looks identical to one carrying none. Same tests, same coverage number, same green build, same approvals.&lt;/p&gt;

&lt;p&gt;You can see the difference in a single line of code. Take a &lt;code&gt;spin_lock_irqsave()&lt;/code&gt; and write down why it is there. One version: it takes the lock and saves the interrupt flags. The other: local interrupts are disabled because this lock is also taken by the interrupt handler on this CPU, and without that the handler can try to take a lock this CPU already holds and deadlock us against ourselves; the &lt;code&gt;_irqsave&lt;/code&gt; form exists because the caller may already have interrupts off, so the previous state has to be restored rather than interrupts unconditionally enabled.&lt;/p&gt;

&lt;p&gt;The first sentence can be written by anyone who can read the line. The second cannot be written by anyone who does not hold a model of the locking context. Both are true. Only one of them is any use when the system is failing and you are the person on call.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;There is no file to grep, no ticket, no build warning. There is only the day something breaks, and then you find out what you knew.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;h2&gt;
  
  
  Why this matters more now, not less
&lt;/h2&gt;

&lt;p&gt;Anything that produces working output faster than it produces understanding creates this debt. It is not new. Pasting an init sequence off a forum in 2009 created it. Inheriting a driver from someone who has left creates it. What has changed is the rate: a tool that writes a plausible page of code in four seconds moves the ratio between what you own and what you understand faster than any method before it, and it does so while every visible indicator improves.&lt;/p&gt;

&lt;p&gt;That last part is the difficulty. The build is green. The review passed. The feature works. Every instrument you have says the work went well, and none of them is measuring the thing that is being used up.&lt;/p&gt;

&lt;p&gt;One study has made the gap visible, and it is worth knowing about mainly for its design. Seventy-eight people built the same application in three groups — one unaided, one with an assistant, one with an assistant that would not let them merge anything until they had written down why the code worked. On the finished application the two assisted groups were indistinguishable. Then the assistant was taken away and a defect was injected into each person's own code, with thirty minutes to fix it. The group that had used the assistant freely repaired it at less than half the rate of the group that had been made to explain, and at a third of the rate of the group that never had one. It is a small study on novices, and its author says so. But nothing about the software recorded which group anyone was in.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;Two groups shipped the same application. One could repair it and one could not, and no artefact anywhere recorded the difference.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;The variable is not the tool. It is where the explanation gets required. The kernel worked this out a long time ago and wrote it into the process: &lt;code&gt;Documentation/process/submitting-patches.rst&lt;/code&gt; requires you to describe the problem and justify the approach, and a changelog that only describes the diff is rejected. Every maintainer has been enforcing an explanation gate for thirty years without calling it one.&lt;/p&gt;

&lt;p&gt;Which tells you where your own debt is sitting, and it is not upstream. Upstream extracts the explanation at the time, from everybody, on every patch, whether a person wrote it or a model did. It accumulates in the internal tree, in the vendor BSP, in the driver that ships in the product and never goes near a mailing list, because nothing there asks.&lt;/p&gt;

&lt;h2&gt;
  
  
  How to pay for it as you go
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;strong&gt;Write the internal changelog as though it were going upstream.&lt;/strong&gt; Not what changed — what was wrong, and why this approach and not the obvious one. If the sentence could have been written by someone reading the diff, you have written the useless version.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Gate the places where wrong code looks right.&lt;/strong&gt; A plain &lt;code&gt;spin_lock()&lt;/code&gt; on a lock a hardirq handler also takes runs for months on a uniprocessor test board and deadlocks on the customer's SMP part. A &lt;code&gt;devm_&lt;/code&gt; allocation with a manual &lt;code&gt;kfree()&lt;/code&gt; in the error path survives every test that never unbinds the device. None of these fail at review by inspection.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Let the tools tell you what you did not understand.&lt;/strong&gt; &lt;code&gt;CONFIG_PROVE_LOCKING&lt;/code&gt; exists to report that your lock ordering was a belief rather than a fact. KASAN and KCSAN do the same for lifetime and concurrent access. They run on a schedule instead of depending on your discipline, which is their main advantage over everything else on this list.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Ask for the explanation before you ask for the code.&lt;/strong&gt; It costs nothing and it changes what you are left with when the answer arrives.&lt;/li&gt;
&lt;li&gt;
&lt;strong&gt;Break something you shipped and fix it unaided.&lt;/strong&gt; Once a quarter. It is the only measurement of this that exists, and you can run it on yourself in an afternoon.&lt;/li&gt;
&lt;/ul&gt;

&lt;p&gt;It is why we ask people to explain a patch before we treat it as finished. If you want that kind of practice with someone checking the explanation, that is what our &lt;a href="https://www.techveda.live/linux-device-drivers/" rel="noopener noreferrer"&gt;Linux kernel and device driver programmes&lt;/a&gt; are built around.&lt;/p&gt;

&lt;p&gt;Go back to patch 847. The company owns that kernel completely — the source, the history, the legal right, the revenue. What it does not own is the reason, and no amount of ownership produces that after the fact. The cost was taken on years earlier, on an ordinary afternoon, by someone who got something working and moved on. That is not a failure of diligence.&lt;/p&gt;

&lt;p&gt;It is simply what this debt looks like at the moment you take it on, which is that it looks like nothing.&lt;/p&gt;

&lt;blockquote&gt;
&lt;p&gt;Ask yourself which of the things you shipped this year you could still repair with the assistant switched off.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;Notice what that question is not. It is not an argument for using the tool less. The group in that study who used it freely produced good software, and so will you. It is a question about who is able to repair what you own. Technical debt can be paid down by anyone on the team, which is why it survives people leaving. This kind cannot. It is owed by one person, and the only way to settle it is to do the work that would have earned the understanding in the first place.&lt;/p&gt;

&lt;p&gt;— Raghu Bharadwaj&lt;/p&gt;

</description>
      <category>linux</category>
      <category>kernel</category>
      <category>career</category>
      <category>ai</category>
    </item>
    <item>
      <title>How to Choose an Edge AI SoC: NPU, GPU, DSP, CPU, Memory, Power and the Software Stack</title>
      <dc:creator>Raghu Bharadwaj</dc:creator>
      <pubDate>Wed, 02 Sep 2026 05:29:41 +0000</pubDate>
      <link>https://dev.to/raghu_bharadwaj_404e60eb0c/how-to-choose-an-edge-ai-soc-npu-gpu-dsp-cpu-memory-power-and-the-software-stack-286i</link>
      <guid>https://dev.to/raghu_bharadwaj_404e60eb0c/how-to-choose-an-edge-ai-soc-npu-gpu-dsp-cpu-memory-power-and-the-software-stack-286i</guid>
      <description>&lt;blockquote&gt;
&lt;p&gt;Choosing an Edge AI SoC on the TOPS number printed on the front page is the most common and most expensive mistake in this work, because those numbers are quoted in units that are not comparable to each other. The decision is settled instead by three things: whether a driver for that accelerator exists in a kernel you can actually ship, what happens to the layers the accelerator refuses to run, and whether the memory system can feed it. This guide works through all seven axes with figures taken from vendor documentation and kernel source, and gives you a checklist to run before you commit.&lt;/p&gt;
&lt;/blockquote&gt;

&lt;p&gt;An Edge AI SoC selection usually starts as a spreadsheet with a TOPS column, and that spreadsheet is where the project goes wrong. Two years later the same team is explaining why a part rated at four times the throughput of its competitor delivers half the frame rate, or why a product cannot take a security update because the accelerator driver only exists for a kernel that reached end of life.&lt;/p&gt;

&lt;p&gt;None of that is bad luck. Every one of those outcomes is visible at Edge AI SoC selection time, in documents the vendors publish, if you know which questions have answers and which do not. This guide goes through the seven axes in the order that they actually decide the outcome, which is close to the reverse of the order they appear in a datasheet.&lt;/p&gt;

&lt;h2&gt;
  
  
  The TOPS number is not a unit
&lt;/h2&gt;

&lt;p&gt;Start here, because it clears away most of the spreadsheet. Below are throughput figures as the vendors themselves publish them, with the qualifier each one attaches. Every row is quoted from the vendor's own current documentation.&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Part&lt;/th&gt;
&lt;th&gt;Published figure&lt;/th&gt;
&lt;th&gt;What the vendor actually says&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;Rockchip RK3588&lt;/td&gt;
&lt;td&gt;up to 6 TOPS&lt;/td&gt;
&lt;td&gt;No data type is attached to the number anywhere in the datasheet or the product page. Separately it lists int4, int8, int16, fp16, bf16 and tf32 support.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;NXP i.MX 8M Plus&lt;/td&gt;
&lt;td&gt;2.3 TOPS&lt;/td&gt;
&lt;td&gt;No data type attached. Two SKUs in the family carry no NPU at all.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;NXP i.MX 95&lt;/td&gt;
&lt;td&gt;8 eTOPS at 1 GHz&lt;/td&gt;
&lt;td&gt;The unit is written "eTOPS", not TOPS, and NXP does not publish what it normalises to.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;TI AM62A&lt;/td&gt;
&lt;td&gt;2 TOPS (8b)&lt;/td&gt;
&lt;td&gt;Explicitly 8-bit, and explicitly quoted at the automotive worst-case junction temperature of 125 °C.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;TI TDA4VM&lt;/td&gt;
&lt;td&gt;8 TOPS (8b)&lt;/td&gt;
&lt;td&gt;Same qualifiers. The C7x DSP beside it is quoted separately, in GFLOPS and GOPS.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Renesas RZ/V2H&lt;/td&gt;
&lt;td&gt;8 TOPS dense, 80 TOPS sparse&lt;/td&gt;
&lt;td&gt;The 80 is a pruning figure and the dense silicon number is 8. Reaching it means pruning the model and retraining it to recover accuracy, so it costs a labelled dataset and a training cycle.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Hailo-8&lt;/td&gt;
&lt;td&gt;26 TOPS&lt;/td&gt;
&lt;td&gt;No precision qualifier on the product page.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Hailo-10H&lt;/td&gt;
&lt;td&gt;40 TOPS INT4, 20 TOPS INT8&lt;/td&gt;
&lt;td&gt;The headline 40 is INT4. At INT8 it is 20.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;Qualcomm QCS6490&lt;/td&gt;
&lt;td&gt;12 dense TOPS&lt;/td&gt;
&lt;td&gt;Qualcomm carries an explicit dense-versus-sparse footnote.&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;NVIDIA AGX Orin 64GB&lt;/td&gt;
&lt;td&gt;275 sparse INT8 TOPS&lt;/td&gt;
&lt;td&gt;170 sparse from the GPU, 105 sparse from the two DLA engines. Dense figures are 85 and 52.5. The 32GB module of the same name is 200.&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;Put those side by side and the comparison collapses. Renesas's 80 and NVIDIA's 275 are sparse; TI's 8 is dense 8-bit at 125 °C; Hailo-10H's 40 is INT4; NXP's 8 is a unit called eTOPS that has no published definition. Rockchip's 6 has no data type at all. There is no arithmetic that turns these into one another.&lt;/p&gt;

&lt;p&gt;The NVIDIA row carries the sharpest lesson, because it is the only vendor here that publishes the split. On AGX Orin 64GB, 105 of the headline 275 comes from the two deep learning accelerator engines rather than the GPU. That is thirty-eight per cent of the number on the box sitting behind a fixed-function engine with a restricted layer set. If your network does not map onto that engine, the number you compared against is not the number you get. And Orin Nano, the cheapest member of the family, has no such engine at all — the developer guide lists its DLA core count as zero — so its entire figure is GPU.&lt;/p&gt;

&lt;h2&gt;
  
  
  Start with the driver, not the silicon
&lt;/h2&gt;

&lt;p&gt;The question that decides an Edge AI SoC selection is not how fast the accelerator is. It is what runs it, on which kernel, maintained by whom.&lt;/p&gt;

&lt;p&gt;Linux has a subsystem for exactly this hardware. It is &lt;code&gt;drivers/accel&lt;/code&gt;, added in v6.2, and it is not a separate subsystem so much as a branch of DRM: the core is &lt;code&gt;drm_accel.c&lt;/code&gt;, devices appear under major number 261 as &lt;code&gt;/dev/accel/accel*&lt;/code&gt;, and drivers set &lt;code&gt;DRIVER_COMPUTE_ACCEL&lt;/code&gt; in their DRM feature flags. In the master tree today it contains exactly six drivers.&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls &lt;/span&gt;drivers/accel/
&lt;span class="go"&gt;Kconfig  Makefile  amdxdna  drm_accel.c  ethosu  habanalabs  ivpu  qaic  rocket
&lt;/span&gt;&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;Read that list carefully, because it is the whole upstream story. &lt;code&gt;amdxdna&lt;/code&gt; and &lt;code&gt;ivpu&lt;/code&gt; are x86-only, for the NPUs inside AMD and Intel laptop processors. &lt;code&gt;habanalabs&lt;/code&gt; and &lt;code&gt;qaic&lt;/code&gt; both depend on PCI: they are add-in cards for data centre and edge servers, and &lt;code&gt;qaic&lt;/code&gt; in particular is a trap, because it is Qualcomm and it is upstream but it drives the Cloud AI 100 card, not the Hexagon NPU inside any Qualcomm SoC you would put in a product.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;That leaves two in-tree drivers for NPUs embedded in application-class SoCs: &lt;code&gt;rocket&lt;/code&gt;, which supports the Rockchip RK3588 and nothing else, and &lt;code&gt;ethosu&lt;/code&gt;, which supports the Arm Ethos-U65 and U85 IP.&lt;/strong&gt; The device tree binding directory tells the same story from the other side — &lt;code&gt;Documentation/devicetree/bindings/npu/&lt;/code&gt; contains two files, one for Arm Ethos and one for &lt;code&gt;rockchip,rk3588-rknn-core&lt;/code&gt;.&lt;/p&gt;

&lt;p&gt;Everything else on the market reaches its NPU through an out-of-tree vendor module. That is not automatically disqualifying, and for several of these parts it is the only realistic choice, but it must be priced honestly rather than discovered later.&lt;/p&gt;

&lt;p&gt;Three more drivers have been posted to the lists and are not merged: &lt;code&gt;accel/qda&lt;/code&gt; for Qualcomm DSPs, which reached a second revision in August 2026 with open questions in its own cover letter about device tree binding and privilege separation; &lt;code&gt;accel/neutron&lt;/code&gt; for the NXP Neutron NPU; and an &lt;code&gt;accel/npac&lt;/code&gt; request for comments. Posted is not merged, and merged is not shipped in a kernel you can use.&lt;/p&gt;

&lt;p&gt;It is also worth being precise about what an in-tree driver gives you, because it is less than people assume. The kernel documentation for &lt;code&gt;rocket&lt;/code&gt; says it plainly: the driver powers the hardware on and off, allocates and maps buffers, and submits jobs, and everything else happens in userspace in a Mesa driver. The kernel has no idea what a convolution is. Every question about which operators are supported is a userspace question on every one of these platforms, in-tree or not. We went through what that means in practice for one part in &lt;a href="https://www.techveda.live/2026/08/19/mainline-npu-driver-rk3588/" rel="noopener noreferrer"&gt;The Mainline NPU Driver on RK3588, and What It Cannot Do Yet&lt;/a&gt;.&lt;/p&gt;

&lt;h2&gt;
  
  
  The kernel version outlives the product
&lt;/h2&gt;

&lt;p&gt;This is the axis that turns a good Edge AI SoC choice into a bad one three years later, and it is arithmetic rather than judgement.&lt;/p&gt;

&lt;p&gt;The current longterm kernels and their projected end-of-life dates, from kernel.org:&lt;/p&gt;

&lt;div class="table-wrapper-paragraph"&gt;&lt;table&gt;
&lt;thead&gt;
&lt;tr&gt;
&lt;th&gt;Series&lt;/th&gt;
&lt;th&gt;Released&lt;/th&gt;
&lt;th&gt;Projected EOL&lt;/th&gt;
&lt;/tr&gt;
&lt;/thead&gt;
&lt;tbody&gt;
&lt;tr&gt;
&lt;td&gt;6.18&lt;/td&gt;
&lt;td&gt;November 2025&lt;/td&gt;
&lt;td&gt;December 2028&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.12&lt;/td&gt;
&lt;td&gt;November 2024&lt;/td&gt;
&lt;td&gt;December 2028&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.6&lt;/td&gt;
&lt;td&gt;October 2023&lt;/td&gt;
&lt;td&gt;December 2027&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;6.1&lt;/td&gt;
&lt;td&gt;December 2022&lt;/td&gt;
&lt;td&gt;December 2027&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;5.15&lt;/td&gt;
&lt;td&gt;October 2021&lt;/td&gt;
&lt;td&gt;December 2026&lt;/td&gt;
&lt;/tr&gt;
&lt;tr&gt;
&lt;td&gt;5.10&lt;/td&gt;
&lt;td&gt;December 2020&lt;/td&gt;
&lt;td&gt;December 2026&lt;/td&gt;
&lt;/tr&gt;
&lt;/tbody&gt;
&lt;/table&gt;&lt;/div&gt;

&lt;p&gt;Those dates were last revised in February 2026, and the revision is instructive: 6.6, 6.12 and 6.18 all gained a year or two because enough companies depend on them, while 5.10 and 5.15 kept the dates they already had. The series you most want extended are the ones least likely to be.&lt;/p&gt;

&lt;p&gt;Now combine that with when the drivers landed. The accel subsystem did not exist before v6.2, so a BSP based on 5.10, 5.15 or 6.1 cannot contain an in-tree accelerator driver by construction. &lt;code&gt;rocket&lt;/code&gt; first appears in v6.18. &lt;code&gt;ethosu&lt;/code&gt; first appears in v7.0, which is not a longterm series at all. So of the six maintained longterm kernels, exactly one contains an in-tree NPU driver for an embedded SoC, and it contains only the Rockchip one.&lt;/p&gt;

&lt;p&gt;Set that against what the vendors actually ship. Rockchip publishes BSP branches for 4.4, 4.19, 5.10, 6.1, 6.6 and 6.12, with 6.1 as the default. NVIDIA currently ships two Jetson branches side by side: Jetson Linux 39.2.1 on kernel 6.8 with Ubuntu 24.04, and Jetson Linux 36.5.2 on kernel 5.15 with Ubuntu 22.04, both released in August 2026 and both supporting the full Orin range. "The Jetson kernel is 5.15" and "the Jetson kernel is 6.8" are both true statements, which is why you have to name the branch.&lt;/p&gt;

&lt;p&gt;The consequence is concrete. Two of the six longterm series lose upstream stable fixes in December 2026, which from now is a matter of months. If your BSP is pinned there and your accelerator driver is an out-of-tree module written against those headers, then your security update path, your kernel upgrade path and your silicon vendor's roadmap are one single dependency. Ask, at selection time and in writing, which kernel the vendor will support at the end of your product's life, not which one they ship today.&lt;/p&gt;

&lt;h2&gt;
  
  
  NPU, GPU, DSP and CPU are one question
&lt;/h2&gt;

&lt;p&gt;These four are usually presented as four separate rows in the comparison. They are better understood as a single question: when the accelerator refuses a layer, where does that layer go, and what does it cost?&lt;/p&gt;

&lt;p&gt;Every Edge AI SoC here has a restricted accelerator and a fallback path. NVIDIA documents the restrictions on its DLA in unusual detail, and the list is instructive because it is representative rather than unusual: no dynamic dimensions, so minimum, maximum and optimum profile values must be equal; convolution kernel dimensions in the range 1 to 32; deconvolution padding must be zero; activation functions limited to ReLU, Sigmoid, TanH, clipped ReLU and leaky ReLU; the unary operations limited to absolute value, sine, cosine and arctangent; static slicing only; and at most sixteen loadables resident per core.&lt;/p&gt;

&lt;p&gt;What happens to a layer outside that set is the part that hurts. NVIDIA's own documentation states that with GPU fallback enabled, layers that cannot run on the DLA fall back to GPU execution silently, without an error. A pipeline you believe is DLA-accelerated can be running entirely on the GPU, competing with everything else you put there, and nothing in the logs says so.&lt;/p&gt;

&lt;p&gt;The same pattern repeats one level up. TensorFlow Lite's delegate documentation is explicit that if you hand a floating-point model to a delegate that only supports 8-bit quantized operations, it rejects all of them and the model runs entirely on the CPU. Not partially — entirely. ONNX Runtime's execution provider mechanism has the same shape, and it is worth knowing how thin the edge support tier is: the Rockchip NPU provider is marked preview and community-maintained, as are the Arm Compute Library, Arm NN and Vitis-AI providers.&lt;/p&gt;

&lt;p&gt;This is where the DSP earns its place in the comparison, and TI is the clearest illustration because it publishes the split. On AM62A the matrix multiply accelerator does 2 TOPS of dense 8-bit work, and beside it sits a C7x vector DSP quoted at 40 GFLOPS. The MMA does dense integer matrix multiply; the C7x runs what the MMA cannot and provides the floating-point path; anything neither can take falls back to the Cortex-A cores. Renesas has the same two-part structure on RZ/V2H, where the vendor's own driver documentation defines DRP-AI as a reconfigurable processor plus an AI-MAC block described as hardware for high-speed 8-bit matrix operations.&lt;/p&gt;

&lt;p&gt;So the useful question is not "how many TOPS", it is "what fraction of my graph lands on the fast path, and how fast is the slow path". A part with a modest accelerator and a strong vector DSP can beat a part with an impressive accelerator and nothing behind it, on a real network with unusual layers. You cannot answer this from a datasheet. You answer it by compiling your actual model with the vendor toolchain and reading the operator assignment report, which every one of these toolchains produces.&lt;/p&gt;

&lt;p&gt;One practical warning about quantization while you are there. NXP documents that the i.MX 8M Plus NPU is optimised for per-tensor quantization, and that per-channel quantized models require additional compute and may carry a small accuracy error. Modern post-training quantization in both TensorFlow and PyTorch defaults to per-channel. The default export path is the slow path, and nothing tells you.&lt;/p&gt;

&lt;h2&gt;
  
  
  Memory decides more than the accelerator does
&lt;/h2&gt;

&lt;p&gt;Three separate memory questions matter when sizing an Edge AI SoC, and teams routinely check only the first.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Capacity.&lt;/strong&gt; Model weights, activation buffers and the working set of everything else on the board come out of the same DRAM. The part of that footprint the kernel cannot reclaim is invisible until an allocation fails, which we covered separately in &lt;a href="https://www.techveda.live/2026/08/26/tensor-arena-edge-ai-memory/" rel="noopener noreferrer"&gt;The Half of an AI Model the Kernel Cannot Reclaim&lt;/a&gt;.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Bandwidth.&lt;/strong&gt; This is the one that decides sustained throughput, and disclosure varies enormously. NVIDIA publishes a figure per module: 204.8 GB/s for AGX Orin on a 256-bit LPDDR5 interface, 102.4 GB/s for Orin NX on 128-bit, and 51 GB/s for the 4GB Orin Nano on 64-bit. That is a four-fold spread inside one product family, and it tracks the SKU price far more closely than the TOPS figure does. Qualcomm, by contrast, publishes bus width and clock — 2 x 16 LPDDR5 at 3200 MHz for QCS6490, 6 x 16 for the IQ-9075 — and no GB/s figure at all, so any Qualcomm bandwidth number you see has been computed by whoever wrote it down. TI publishes LPDDR4 at up to 3733 MT/s for AM62A and 4266 MT/s for TDA4VM. Rockchip's datasheet lists LPDDR4, LPDDR4X and LPDDR5 support across four 16-bit channels without a speed grade in the chapter I could retrieve.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Movement.&lt;/strong&gt; This is the one that gets missed, and on a camera pipeline it is decisive. The question is whether a buffer captured by the camera can be handed to the accelerator without a copy. On Linux that means dma-buf, and it is not a given. The mainline &lt;code&gt;rocket&lt;/code&gt; driver does not implement dma-buf export and registers no import hook, so a V4L2 capture buffer cannot be handed to the NPU as a dma-buf at all — you copy it into a driver buffer first, at every frame, on top of whatever else that memory is doing.&lt;/p&gt;

&lt;p&gt;Underneath that sit two kernel facts worth checking on any candidate. First, whether the accelerator is behind an IOMMU, because that decides whether it can work from scattered pages or needs physically contiguous memory. The contrast is visible in the two in-tree drivers: &lt;code&gt;rocket&lt;/code&gt; depends on &lt;code&gt;ROCKCHIP_IOMMU&lt;/code&gt;, requires an &lt;code&gt;iommus&lt;/code&gt; property in its binding and uses the shmem GEM helpers, while &lt;code&gt;ethosu&lt;/code&gt; has no IOMMU path at all, uses the DMA GEM helpers and pulls its scratch memory from an on-SoC SRAM pool. Second, if you need contiguous memory, you need CMA, and CMA can only be used in sleeping context, deliberately bypasses single-page allocations and works by migrating movable pages, so it fails under fragmentation rather than degrading.&lt;/p&gt;

&lt;p&gt;One more trap in the same area, because it will bite during a BSP upgrade rather than at selection: the default CMA dma-buf heap only got a stable name in Linux 6.17. Before that it could appear as &lt;code&gt;reserved&lt;/code&gt;, &lt;code&gt;linux,cma&lt;/code&gt; or &lt;code&gt;default-pool&lt;/code&gt; depending on the platform, and it is now &lt;code&gt;default_cma_region&lt;/code&gt;. Userspace that hardcodes the old name breaks on a new kernel, and vice versa.&lt;/p&gt;

&lt;h2&gt;
  
  
  Power is the axis nobody documents
&lt;/h2&gt;

&lt;p&gt;Ask what an Edge AI SoC consumes and you discover that most vendors do not answer.&lt;/p&gt;

&lt;p&gt;Rockchip's RK3588 datasheet — the only revision I could retrieve is Rev 0.1 from July 2021, marked as an initial release for special reference — has no SoC power section at all, only absolute ratings, recommended operating conditions and package thermal resistance. NXP publishes estimated maximum currents per supply rail for the i.MX 8M Plus and states explicitly that these are a guideline for power supply selection and that actual consumption for typical use cases is lower. TI publishes no typical figure for AM62A or TDA4VM, only the relative claim of the lowest power envelope in the industry at a 125 °C junction. Renesas publishes an efficiency ratio for RZ/V2H, 10 TOPS per watt, whose numerator is the pruning-inflated 80 rather than the dense 8.&lt;/p&gt;

&lt;p&gt;The exceptions are worth noting because they show what disclosure looks like. Qualcomm states 6 to 9 W typical for QCS6490 and 3.8 to 20 W for the IQ-9075 SoC. Hailo states 2.5 W typical for both Hailo-8 and Hailo-10H — the same figure for parts of very different throughput, one of which carries external LPDDR4, which is worth treating with some caution rather than repeating.&lt;/p&gt;

&lt;p&gt;NVIDIA documents this axis better than anyone here, through nvpmodel, and the detail rewards reading. In the r39.2.1 developer guide, AGX Orin 64GB offers MAXN, 15 W, 30 W and 50 W modes with 30 W as the default; Orin NX 16GB offers MAXN, 10 W, 15 W and 25 W with 15 W as the default. Two things in that table catch people out. MAXN carries a power budget of "n/a" rather than a wattage, and NVIDIA states in as many words that it is not the maximum performance mode, because hardware throttling engages when module power exceeds the TDP budget. And on Orin NX 16GB the number of available DLA cores is mode-dependent: two in MAXN, 25 W and 40 W, but one in the 10 W and 15 W modes — including the default. Choosing a power mode is also choosing how much accelerator you have.&lt;/p&gt;

&lt;p&gt;The practical position is that for most of these parts you will have to measure power yourself, on your workload, in your enclosure. Budget for that. It is a week of work, and it is cheaper than discovering the thermal design is wrong after tooling.&lt;/p&gt;

&lt;h2&gt;
  
  
  The discrete accelerator is a real option
&lt;/h2&gt;

&lt;p&gt;Before settling on a more expensive Edge AI SoC, price the other path: keep a modest SoC and attach a dedicated accelerator over PCIe. Hailo is the clearest example, and it has an unusual architecture — Hailo-8 integrates all its memory on die and requires no external DRAM, which means model weights must fit on chip. Hailo does not publish that capacity, and the practical evidence for the constraint is that Hailo-10H added a DDR interface specifically to reach larger models.&lt;/p&gt;

&lt;p&gt;Two things decide whether this path works for you, and neither is the TOPS figure.&lt;/p&gt;

&lt;p&gt;The first is the slot. Hailo publishes PCIe Gen 3 with four lanes for the M.2 Key M module, but two lanes for the Key B+M and Key A+E variants, and one lane for the 8R mPCIe module. That is a four-fold spread across parts that all carry the same headline number, and it interacts with what your carrier board actually routes, which is frequently narrower than the connector suggests.&lt;/p&gt;

&lt;p&gt;The second is the driver, and here the accounting must be honest. The Hailo PCIe driver is GPL-2.0 and actively maintained on GitHub, and the HailoRT runtime is open source. But it is not in mainline, and — this is a verified negative rather than a claim about quality — no driver series has ever been posted to the kernel lists at all: a subject search and a diff-filename search on lore both return nothing. So this is an out-of-tree module you build and maintain against every kernel you ship, with the usual consequence that a kernel update can break it until the vendor catches up. That consequence is not theoretical: the module taints the kernel on load, and the vendor's own community forums carry recurring threads from people whose accelerator stopped building after a routine kernel upgrade. Note also that the driver's master branch supports only the Hailo-10 and Hailo-15 families, while Hailo-8 needs a separate branch.&lt;/p&gt;

&lt;p&gt;That is a real cost, but it is a bounded and well-understood one, and it buys you the freedom to change the accelerator without changing the SoC, the BSP or the rest of the product. For many designs that is the better trade.&lt;/p&gt;

&lt;h2&gt;
  
  
  An Edge AI SoC checklist to run before you commit
&lt;/h2&gt;

&lt;p&gt;None of the above requires a purchase order. Most of it can be answered in a day, on an evaluation board or against a kernel tree, and the answers are far more reliable than any comparison table.&lt;/p&gt;

&lt;p&gt;On your build host, against the kernel source you intend to ship, find out whether the accelerator has an in-tree driver at all and which compatible strings it binds to:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls &lt;/span&gt;drivers/accel/
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls &lt;/span&gt;Documentation/devicetree/bindings/npu/
&lt;span class="gp"&gt;raghu@techveda.org:~$&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;grep&lt;/span&gt; &lt;span class="nt"&gt;-rn&lt;/span&gt; &lt;span class="s2"&gt;"compatible"&lt;/span&gt; drivers/accel/&lt;span class="k"&gt;*&lt;/span&gt;/[a-z]&lt;span class="k"&gt;*&lt;/span&gt;_drv.c
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;If the answer is that there is no in-tree driver, that is a legitimate outcome and not a reason to stop. It tells you the vendor module is now a line item in your maintenance plan.&lt;/p&gt;

&lt;p&gt;On the evaluation board itself, establish what is actually present at runtime. These read the board, so they are target-side:&lt;br&gt;
&lt;/p&gt;

&lt;div class="highlight js-code-highlight"&gt;
&lt;pre class="highlight console"&gt;&lt;code&gt;&lt;span class="gp"&gt;root@evk:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;uname&lt;/span&gt; &lt;span class="nt"&gt;-r&lt;/span&gt;
&lt;span class="gp"&gt;root@evk:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls&lt;/span&gt; /dev/accel/ /sys/class/accel/ 2&amp;gt;/dev/null
&lt;span class="gp"&gt;root@evk:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls&lt;/span&gt; /dev/dma_heap/
&lt;span class="gp"&gt;root@evk:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;ls&lt;/span&gt; /sys/class/iommu/
&lt;span class="gp"&gt;root@evk:~#&lt;/span&gt;&lt;span class="w"&gt; &lt;/span&gt;&lt;span class="nb"&gt;grep&lt;/span&gt; &lt;span class="nt"&gt;-i&lt;/span&gt; cma /proc/meminfo
&lt;/code&gt;&lt;/pre&gt;

&lt;/div&gt;



&lt;p&gt;Those five lines answer more than a week of datasheet reading. The kernel version tells you where you sit against the end-of-life table above. An empty &lt;code&gt;/dev/accel&lt;/code&gt; confirms the accelerator is reached through a vendor module rather than the upstream framework. The heap listing tells you what buffer types you can actually allocate and whether a CMA region exists at all. The IOMMU listing tells you whether you are going to be fighting for contiguous memory. And the CMA figures in &lt;code&gt;/proc/meminfo&lt;/code&gt; tell you how much of it you have before you have written any code.&lt;/p&gt;

&lt;p&gt;Then do the one test that cannot be substituted: compile your real model with the vendor toolchain and read the operator assignment report. Every toolchain here produces one, and every one of them requires this step to happen on an x86 host rather than on the target — TI states plainly that model compilation cannot be performed on the SoC, and Renesas, Hailo and Rockchip all have the same offline structure. Count the operators that land on the accelerator and the ones that do not. That ratio, on your network, is the specification. The TOPS figure is marketing.&lt;/p&gt;

&lt;p&gt;Finally, ask the vendor three questions in writing: which kernel version will be supported at the end of our product's lifetime; is the runtime library source-available or a binary; and what is the licence and distribution channel for the compiler. On several of these platforms the compiler is the closed part of an otherwise open stack, which is manageable, but only if you know before you commit.&lt;/p&gt;

&lt;h2&gt;
  
  
  What this means in practice
&lt;/h2&gt;

&lt;p&gt;If you take one thing from this, make it the ordering. An Edge AI SoC is chosen on its software stack first, then memory, then power, and only then the accelerator's headline figure — because the first three are what you cannot change later, and the fourth is the one that gets all the attention.&lt;/p&gt;

&lt;p&gt;A useful way to sanity-check a shortlist is to ask what happens in the worst case rather than the best. What is the frame rate when the model does not fit the accelerator's operator set? What is the update path when the kernel this driver was written against goes end of life? What is the memory bandwidth per inference when the display and camera pipelines are also running? Those three answers separate real candidates from spreadsheet candidates, and none of them appears on a product page.&lt;/p&gt;

&lt;p&gt;The teams that get this right tend to do the same unglamorous thing: they buy two evaluation boards early, compile their actual model on both, and read the operator reports before anyone writes a requirements document. It costs a fortnight. It routinely saves a redesign. And it is the same principle we applied to quantization in &lt;a href="https://www.techveda.live/2026/07/15/4-bit-weight-quantization-edge/" rel="noopener noreferrer"&gt;4-Bit Weight Quantization: Why the Memory System Decides&lt;/a&gt; — the constraint that governs is almost never the one on the front of the datasheet.&lt;/p&gt;

&lt;h2&gt;
  
  
  Key takeaways
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;TOPS figures are published in incompatible units: sparse versus dense, INT4 versus INT8, NXP's undefined "eTOPS", TI's figure at a 125 °C junction, and Rockchip's with no data type at all. They cannot be placed in one column.&lt;/li&gt;
&lt;li&gt;Mainline &lt;code&gt;drivers/accel&lt;/code&gt; holds six drivers, and only two serve NPUs in an embedded Edge AI SoC — &lt;code&gt;rocket&lt;/code&gt; for the RK3588 alone, and &lt;code&gt;ethosu&lt;/code&gt; for Arm Ethos-U. Everything else needs an out-of-tree vendor module.&lt;/li&gt;
&lt;li&gt;The accel subsystem did not exist before v6.2, &lt;code&gt;rocket&lt;/code&gt; arrived in 6.18 and &lt;code&gt;ethosu&lt;/code&gt; in 7.0, so of the six longterm kernels only 6.18 carries an in-tree embedded NPU driver. The 5.10 and 5.15 series reach end of life in December 2026.&lt;/li&gt;
&lt;li&gt;Every accelerator here has a restricted operator set and a fallback path, and the fallback is frequently silent: NVIDIA documents that DLA layers fall back to the GPU without an error, and a TensorFlow Lite delegate that rejects your operators runs the whole model on the CPU.&lt;/li&gt;
&lt;li&gt;Memory has three questions, not one — capacity, bandwidth and whether a buffer can move without a copy. Mainline &lt;code&gt;rocket&lt;/code&gt; has no dma-buf export, so a camera pipeline copies every frame.&lt;/li&gt;
&lt;li&gt;Most vendors publish no SoC power figure at all. Plan to measure it yourself, on your workload, in your enclosure.&lt;/li&gt;
&lt;li&gt;Compile your real model with the vendor toolchain and read the operator assignment report before you commit. That ratio is the specification.&lt;/li&gt;
&lt;/ul&gt;

&lt;h2&gt;
  
  
  Frequently asked questions
&lt;/h2&gt;

&lt;p&gt;&lt;strong&gt;Can I compare TOPS figures between vendors at all?&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;Only after normalising them, and often not even then. The published figures use sparse and dense counts, INT4 and INT8 precisions, one undefined vendor-specific unit, and in one case a temperature qualifier. Several vendors attach no data type to the number. Treat the figure as an upper bound under the vendor's most favourable assumptions, and compare measured throughput on your own model instead.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Which embedded NPUs actually have an upstream Linux driver?&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;In the current mainline tree, two families: the Rockchip RK3588 through the &lt;code&gt;rocket&lt;/code&gt; driver, and Arm Ethos-U65 and U85 through the &lt;code&gt;ethosu&lt;/code&gt; driver. The other four drivers in &lt;code&gt;drivers/accel&lt;/code&gt; are x86 laptop NPUs or PCIe cards. Drivers for Qualcomm DSPs and the NXP Neutron NPU have been posted to the mailing lists but are not merged.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Is an out-of-tree vendor NPU driver a reason to reject a part?&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;No, but it is a cost to price rather than discover. It means you build and maintain a module against every kernel you ship, a kernel update can break it until the vendor responds, and your upgrade path is tied to the vendor's roadmap. For most Edge AI SoC options on the market today it is the only available choice.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Why does my accelerated model still run slowly?&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;Most often because part of the graph never reaches the accelerator. Restricted operator sets mean unsupported layers fall back to the GPU, the DSP or the CPU, and that fallback is usually silent. Compile the model with the vendor toolchain, read the operator assignment report, and check how many operators actually landed on the fast path.&lt;/p&gt;

&lt;p&gt;&lt;strong&gt;Should I use a discrete accelerator instead of a more capable SoC?&lt;/strong&gt;&lt;/p&gt;

&lt;p&gt;It is often the better trade, because it lets you change the accelerator without changing the SoC or the BSP. Two things decide it: the PCIe lane count your carrier board actually routes, which varies from one to four lanes across modules carrying the same headline figure, and the fact that the driver will be out of tree and maintained by you.&lt;/p&gt;

&lt;h2&gt;
  
  
  Further reading
&lt;/h2&gt;

&lt;ul&gt;
&lt;li&gt;
&lt;a href="https://docs.kernel.org/accel/introduction.html" rel="noopener noreferrer"&gt;The Linux compute accelerators subsystem&lt;/a&gt; — what &lt;code&gt;drivers/accel&lt;/code&gt; is for and the contract a driver signs.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.kernel.org/accel/rocket/index.html" rel="noopener noreferrer"&gt;Documentation/accel/rocket&lt;/a&gt; — the RK3588 NPU driver, including the plain statement of what the kernel does and does not do.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.kernel.org/userspace-api/dma-buf-heaps.html" rel="noopener noreferrer"&gt;dma-buf heaps userspace API&lt;/a&gt; — which heaps exist, and the naming change at Linux 6.17.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://www.kernel.org/category/releases.html" rel="noopener noreferrer"&gt;kernel.org releases&lt;/a&gt; — the longterm series and their projected end-of-life dates.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://docs.nvidia.com/deeplearning/tensorrt/latest/inference-library/dla-layer-restrictions.html" rel="noopener noreferrer"&gt;TensorRT DLA layer restrictions&lt;/a&gt; — a rare example of a vendor documenting exactly what its accelerator will not run.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://ai.google.dev/edge/litert/performance/delegates" rel="noopener noreferrer"&gt;LiteRT delegates&lt;/a&gt; — the delegate mechanism, and the full-CPU fallback behaviour.&lt;/li&gt;
&lt;li&gt;
&lt;a href="https://onnxruntime.ai/docs/execution-providers/" rel="noopener noreferrer"&gt;ONNX Runtime execution providers&lt;/a&gt; — the provider list and its support tiers.&lt;/li&gt;
&lt;/ul&gt;




&lt;p&gt;&lt;em&gt;I teach Linux kernel, device driver and embedded Linux engineering at &lt;a href="https://www.techveda.live/" rel="noopener noreferrer"&gt;TECH VEDA&lt;/a&gt;. If this was useful, the &lt;a href="https://www.techveda.live/blog/" rel="noopener noreferrer"&gt;blog&lt;/a&gt; covers kernel internals, BSP work and edge AI in the same detail, most days of the week.&lt;/em&gt;&lt;/p&gt;

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      <category>embedded</category>
      <category>machinelearning</category>
      <category>iot</category>
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