DEV Community: Wesley Bertipaglia

I/O & Syscalls Explained

Wesley Bertipaglia — Sat, 24 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 7/8 of my Operating Systems Explained series is out.

This one is about I/O and system calls: blocking versus non-blocking I/O, multiplexing with poll and epoll, the layers of buffering along the data path, and one read from the program down to the hardware and back.

It also explains why the C library buffers, why readv exists, and why gettimeofday often never crosses into the kernel at all.

If you've ever wondered why epoll exists, this post walks the problem it solves: ten thousand connections, and why one thread per connection stops being an option.

Read here: https://www.wesleybertipaglia.com/blog/xpbttuoq

Filesystems Explained

Wesley Bertipaglia — Thu, 22 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 6/8 of my Operating Systems Explained series is out.

This one is about filesystems: files and inodes, directories as tables all the way down, hard links and cheap renames, journaling and crash consistency, permissions, and the path a single open takes from a name to bytes.

My favorite detail: separating names from metadata is what makes renaming cheap and hard links possible. Renaming rewrites a directory entry — it never moves a single byte of the file.

Read here: https://www.wesleybertipaglia.com/blog/dlxizd4r

Virtual Memory Explained

Wesley Bertipaglia — Tue, 20 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 5/8 of my Operating Systems Explained series is out.

This one is about virtual memory: address spaces, paging and page tables, the TLB, page faults and swap, and how mmap, brk, and malloc finally get memory from the OS.

It also closes a loop from the Computers Explained series: the CPU post waved at malloc as library bookkeeping. This is the machinery underneath it — how the same address numbers in two processes land in different physical frames, enforced by hardware on every single access.

Read here: https://www.wesleybertipaglia.com/blog/j5n50ly4

Scheduling Explained

Wesley Bertipaglia — Sun, 18 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 4/8 of my Operating Systems Explained series is out.

This one is about scheduling: how the OS shares CPUs among processes and threads, what a context switch really costs, classic policies from FIFO to fair-share, priorities, preemption, and multicore.

The part that surprised me most: the visible cost of a switch is small, but the hidden cost — cold caches and a cold TLB — is what actually pays. Nobody bills for it, and yet it's the number that decides how often you can switch.

Read here: https://www.wesleybertipaglia.com/blog/fwq0k4n2

Threads & Concurrency Explained

Wesley Bertipaglia — Fri, 16 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 3/8 of my Operating Systems Explained series is out.

This one is about threads and concurrency: threads versus processes, shared memory and race conditions, mutexes and semaphores, and deadlock with its four conditions.

Processes isolate you from each other by default. Threads offer no protection at all — they hand you speed and easy communication, and charge you with correctness.

If you've ever written balance = balance + 1 and wondered why the total came out wrong, this post explains it.

Read here: https://www.wesleybertipaglia.com/blog/ppmfmhcv

Processes Explained

Wesley Bertipaglia — Wed, 14 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 2/8 of my Operating Systems Explained series is out.

This one is about processes: programs versus processes, the process control block, process states, fork and exec, and how virtual memory isolates one crashing program from the rest of the machine.

The idea I keep coming back to: a process is just state the kernel knows how to save and restore. If you stop saving that state exactly, the illusion that a hundred programs are alone on the machine collapses.

Read here: https://www.wesleybertipaglia.com/blog/s8qmq1mn

The OS Explained

Wesley Bertipaglia — Mon, 12 Oct 2026 03:00:00 +0000

Hey dev.to 👋

I've just published a new series about operating systems: what actually happens between your programs and the hardware.

The previous series took a computer apart. This one opens it up: how one CPU ends up running a browser, an editor, and a hundred background services at once, and how the kernel keeps control of the machine while barely running.

The goal is to understand the OS from the ground up, one concept at a time, from syscalls to the power button.

This is the first post in the series (1/8): https://www.wesleybertipaglia.com/blog/zkb3xkdy

If you've ever wondered what the boundary between your code and the machine really is, this is where the series starts.

The Most Flexible Machine Ever Built

Wesley Bertipaglia — Thu, 08 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Finale of my Computers series (9/9) is out.

No new hardware this time - stepping back to ask why this machine matters: the stored-program idea, the patterns behind everything, and the bigger picture after bits, logic, CPU, memory, storage, I/O and buses.

Read here: https://www.wesleybertipaglia.com/blog/eyhl1ygp

Thanks to everyone who followed along - what series should come next?

Computer Buses & Interconnects Explained

Wesley Bertipaglia — Tue, 06 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 8/9 of my Computers series is out.

This one is about buses and interconnects: data/address/control buses, CPU-memory paths, PCIe, USB, and bandwidth - how all computer parts communicate.

Read here: https://www.wesleybertipaglia.com/blog/es12ffyu

Input and Output Explained

Wesley Bertipaglia — Sun, 04 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 7/9 of my Computers series is out.

This one is about input and output: keyboards, displays, audio, controllers, ports, interrupts and DMA - how the computer talks to the outside world.

Read here: https://www.wesleybertipaglia.com/blog/x0g3dogf

Storage Explained

Wesley Bertipaglia — Fri, 02 Oct 2026 03:00:00 +0000

Hey dev.to 👋

Post 6/9 of my Computers series is out.

This one is about storage: memory vs persistence, how HDDs and SSDs work, NAND flash, sectors/blocks, and sequential vs random access - where your data lives when power is off.

Read here: https://www.wesleybertipaglia.com/blog/s6kfogsy

Memory Explained

Wesley Bertipaglia — Wed, 30 Sep 2026 03:12:00 +0000

Hey dev.to 👋

Post 5/9 of my Computers series is out.

This one is about memory: cells and addresses, RAM vs ROM, SRAM vs DRAM, latency vs bandwidth, and the memory hierarchy - why cache exists and why memory speed shapes performance.

Read here: https://www.wesleybertipaglia.com/blog/5atxjdiq