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성수 박
성수 박

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verilog modelsim (calculator) error loading design

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hello i have problem with running modelsim. i create 16 bit calculator that can operate add, substract, multiple, division calculation. input and outbut is 20bit bcd-code. For calculation first i convert input bcd-code to binary. After binary calculation i convert binary code to bcd code. i shouldn't use *’, ‘/’…

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