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Discussion on: What are your programming goals for 2017?

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alexkindle profile image
Alex

make verilog development less painful, especially for beginners with FPGAs

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ben profile image
Ben Halpern Author

I've never heard of verilog, so I looked it up. How are you going about making it less painful?

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alexkindle profile image
Alex

tooling for the language is generally quite bad - each platform has a (bad) proprietary toolchain, and the open source options are slim-to-none, so i'm working on a linter!

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