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re: The Balanced Ternary Machines of Soviet Russia VIEW POST

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Interesting! Heard of Setun before, but was looking for more information on DSSP. Thanks for the code and link. The DO ... [] structure looks more elegant than traditional/standard Forth's DO ... LOOP (but Charles Moore didn't like DO LOOP anyway). I'm a bit sorry to hear there's not much information on it, but as it appeared in the late 70s, it could simply be a clone of Forth which appeared over 5 years earlier. If not, or perhaps even if it was, it's amusing that DSSP was said to be "found", because Charles Moore also described himself as the discoverer rather than inventor of Forth. :) Oh, Ivan Tikhonov described DSSL as "inheriting" things from Forth.

Regarding the hardware, I had a bit of a go in a cheap simulator, and was not impressed. Not being very familiar with inductors, I used transistors, and was not able to find a configuration equal to binary CMOS. I'm not surprised to hear the Setun needed 2 coils per trit, which is actually only only 3/4 the packing density of binary core memory. Binary core memory was itself huge, requiring about a cubic foot per kilobyte! Add to all this the very high cost of producing practical software in the Setun's era, and I can entirely understand the Soviet administrators' decision to replace the Setun with computers more nearly compatible with foreign software. Low power consumption seems to be the Setun's only advantage, and from my experiments I'm almost certain this could not be have been maintained into the transistor era. I was not able to find anything close to the power- or space-efficiency of CMOS.

I sometimes wonder how to efficiently emulate a balanced ternary computer, but it really is an academic fantasy as the Soviet administrators said. The Josephson junction thing has me a little bit curious, but I'm cautious because I don't know what logic could actually be done with it and what support each junction would require.

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