If you've been working on AI-related hardware projects lately, you may have noticed a signal: PCBs are starting to look less like PCBs.
One change in NVIDIA's next-generation Rubin platform is particularly worth paying attention to: the PCB has evolved from a "connection carrier" into a rack-level core interconnect layer. A 78-layer M9-grade orthogonal backplane directly replaces tens of thousands of copper cables, carrying high-speed signals between GPUs and switches.
What does this mean? For hardware engineers, the design constraints and performance requirements of PCBs are evolving into an entirely new dimension.
Signal Integrity: From "Good Enough" to "Push the Limit"
In the past, designing high-speed digital circuits meant that 50Ω impedance control, differential pair routing, and basic stack-up design could cover most scenarios.
But in AI server environments, signal rates are moving from 112Gbps toward 224Gbps and beyond. At this level, the signal attenuation of traditional FR-4 materials already exceeds 30%, with bit error rates above 5%. In other words, using traditional materials for AI hardware means the signal simply won't get through.
NVIDIA's Rubin platform fully adopts the M9-grade material system, requiring dielectric loss to be pushed below 0.0015. What does that number mean? M8 materials still sit around 0.002 dielectric loss, while M9 uses a combination of quartz cloth and HVLP4/5 copper foil to bring the metric down.
For hardware engineers, this means: when working on AI hardware projects, material selection is no longer a matter of "cost optimization"—it's a matter of "whether it can be built at all."
Thermal Management: PCBs Are Becoming "Thermal Structures"
Another change worth noting is power consumption.
The power consumption of AI server racks has jumped from roughly 130kW in the GB series to around 600kW in the Rubin platform. At this level of power density, the PCB is no longer just a channel for signal transmission—it must simultaneously handle power distribution and thermal management.
In terms of process, this means several changes:
- Power layers require thicker copper to carry high currents
- High-power areas require embedded heat pipes or high-thermal-conductivity substrates
- Board-level power design must consider new architectures such as VPD (Vertical Power Delivery)
The "thermal property" of PCBs is being redefined. It is no longer a passive structural component, but part of the thermal management system.
Impact on Hardware Development Projects
What do these changes mean for R&D teams working on AI hardware, automotive electronics, and medical devices?
First, PCB design complexity is rising. 78-layer orthogonal backplanes, 15–25μm line width/spacing, and the introduction of mSAP processes—precision requirements that once belonged to the "semiconductor level" are becoming the new normal for high-end PCBs.
Second, material selection space is narrowing. High-end materials (M9, quartz cloth, HVLP4 copper foil) have high supply concentration, and both lead times and capacity carry uncertainty. High-end sub-micron spherical silica is monopolized by a few overseas manufacturers, who hold more than 60% of the market share.
Third, supply chain strategies for small-to-medium batch projects need adjustment. The explosion of AI server orders is squeezing high-end PCB capacity. Industry analysis indicates that effective high-end capacity capable of matching AI server orders accounts for less than 20%. This means R&D teams need to pay more attention to a manufacturer's process ceiling and capacity priority when selecting partners—not just price.
A Role Being Rediscovered
Against this backdrop, PCB factories focused on small-to-medium batch, high-mix manufacturing are being rediscovered as a key role in the hardware R&D supply chain.
The reason: the R&D model for AI hardware has changed. Technology routes have not yet converged, multi-scheme parallel validation has become the norm, and demand for prototypes and small batch orders continues to grow. The characteristics of this demand are: high variety, small batch, high process complexity, fast delivery.
This is a different scheduling logic from the large-batch consistency that AI server customers pursue.
For engineers working on AI hardware R&D, supply chain resilience is shifting from a "procurement problem" to a "design problem." Your stack-up design, material selection, and collaboration approach with manufacturers all determine whether your project can close the loop quickly.
AnyPCBA's positioning in this shift is clear: focused on 5–5000 pcs small-to-medium batch PCB & PCBA manufacturing, covering 2–64 layers, including HDI, rigid-flex, and high-frequency hybrid, with ISO 13485 and IATF 16949 certifications. Our engineers check stack-up and material feasibility during DFM review.
If you're working on AI hardware, automotive electronics, or medical device R&D projects, let's talk about supply chain strategy.
What PCB-related challenges have you encountered in AI hardware R&D? Share your experience in the comments.
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