Quiescent Current and Low-Power Operation in LDOs

Quiescent Current and Low-Power Operation in LDOs

ersaelectronics.com

In a battery-powered device, the regulator is often turned on long after the load has gone to sleep, and the current it draws while doing nothing is directly subtracted from the battery capacity. This idle current is called quiescent current, and for always-on, wearable, and Internet-of-things products it can matter more than the regulated output itself. This article explains what quiescent current is, how it behaves in normal and shutdown modes, why it dominates standby life, and the tradeoffs that come with very low quiescent-current designs.

1. Defining Quiescent and Ground Current

Quiescent current, usually written IQ, is the current the LDO consumes from its own supply when it is regulating, with no load attached and with the output steady. Some datasheets instead specify ground current, which is the current flowing out of the ground pin; for an LDO these are nearly the same, because the only current leaving the device other than the load is its own operating current. It is important to distinguish this from the current delivered to the load: a regulator supplying 50 mA to a load might add only a few microamps of its own, and that microamp figure is the quiescent number that counts in standby. Manufacturers also specify shutdown current, the current drawn when the enable pin disables the regulator, which should be near zero.

1. Why IQ Matters for Battery Life

The average current drawn from a battery is the sum of the active load, the load times the duty cycle, and the quiescent current multiplied by the fraction of time the regulator is on. In a device that sleeps 99 percent of the time, the quiescent current during sleep dominates the average. A part drawing 1 uA rather than 100 uA extends the life of a coin cell by a factor that the load current can no longer offset. Over the shelf life of a product, even a few microamps add up: a 1 uA drain from a 200 mAh coin cell consumes its capacity in a matter of years, while 100 uA drains it in weeks. This is why IoT nodes, remote sensors, and always-on wrist-worn products are specified around IQ first.

1. How IQ Behaves With Conditions

Quiescent current is not constant. It typically rises with load current, because the error amplifier and the gate drive need more current to drive a heavier pass element. It rises with input voltage, because internal bias strings and reference circuits draw a current that is at least partly proportional to headroom. It also rises with temperature and with process variation, so the datasheet's typical figure should be derated for the worst case. In shutdown mode, when the enable pin is asserted off, the internal circuits are disabled and the remaining current is just leakage, commonly in the range of tens to hundreds of nanoamps on modern parts.

1. The Tradeoffs of Very Low IQ

Achieving very low quiescent current costs something elsewhere in the design:

• Bandwidth. A low-IQ amplifier has low bias current and therefore low transconductance, which narrows its bandwidth and slows its response. Very-low-IQ LDOs show softer load transients.
• Noise. The same low bias currents raise input-referred noise, so ultra-low-IQ parts are often noisier.
• Maximum input voltage and dropout. Simplified bias circuits may limit the achievable headroom or precision.
• PSRR. Narrow bandwidth means the PSRR corner frequency drops, reducing rejection at higher frequencies.

The designer must therefore decide which parameter the application cannot afford to lose, rather than simply choosing the lowest IQ on the table.

1. Shutdown and Enable Management

The enable or shutdown pin is the practical tool for eliminating quiescent current when the rail is not needed. When the load is fully off, pulling the enable pin low drops the device into shutdown, reducing current to leakage. The wake-up time from shutdown, however, is not zero: the reference and bias circuits must start up, which can take from a few tens to a few hundreds of microseconds. Systems that need a fast wake-up either leave the LDO enabled in a low-IQ light-load state or account for the startup delay in their timing budget. Some parts also provide a logic-level enable threshold that must be respected, especially when the enable signal itself comes from a battery rail.

1. Selecting an LDO for Low Power

For a battery application, the selection process starts with the standby current budget: sum the quiescent currents of all rails that stay alive during sleep and confirm the total is small enough to meet the shelf or service-life target. Then check the active IQ at the expected load, because the light-load standby number may not reflect the operating current. Compare wake-up time against the system's timing requirement, and verify that the noise and transient performance at that low IQ still meet the load's needs. Where the load is completely off, ensure the shutdown current is used rather than the operating IQ in the life calculation.

Summary

• Quiescent current is the supply current the LDO draws while regulating with no load; shutdown current is what remains when the enable disables it.
• In sleeping or always-on products, quiescent current often dominates the average battery drain and therefore the product life.
• IQ rises with load, input voltage, temperature, and process spread, so design from the worst-case number.
• Very low IQ trades away bandwidth, noise, and PSRR, so it must be matched to the load's requirements.
• The enable pin is the main lever for eliminating idle current when a rail is not needed, but wake-up time must be budgeted.