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Dheeraj Ramasahayam
Dheeraj Ramasahayam

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Intel i740 vs Matrox Parhelia: What GPU Flops Teach Modern Compute Teams

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Intel i740 vs Matrox Parhelia: What GPU Flops Teach Modern Compute Teams

TL;DR: The Intel i740 and Matrox Parhelia failed because of architectural shortcuts and market misreading; modern teams must prioritize memory bandwidth, driver maturity, and ecosystem support over spec hype when selecting GPUs for AI or graphics workloads.

1. Introduction – Why a 20‑year‑old flop still matters

When a hardware team today evaluates a new accelerator, the first numbers that appear on the spec sheet are usually peak FLOPs, VRAM capacity, and a glossy marketing tagline (“next‑gen rasterization”, “AI‑ready tensor cores”, etc.). Those figures look impressive, but they are only the tip of a much deeper iceberg that includes memory subsystem design, software stack health, and real‑world performance under realistic workloads.

Two early‑2000s GPUs—the Intel i740 (1998) and the Matrox Parhelia (2002)—illustrate how ignoring those deeper layers can turn a well‑funded product into a commercial disaster. Both cards were launched with strong brand backing and aggressive FLOP claims, yet each collapsed because a single weak link (memory bandwidth, driver stability, or unrealistic pipeline balance) throttled the whole system.

For engineers building AI inference pipelines, high‑throughput rendering farms, or mixed compute‑graphics workloads, the lessons are timeless:

  • Raw transistor count ≠ usable performance.
  • Bandwidth is a first‑order constraint—if data cannot reach the compute units fast enough, FLOPs sit idle.
  • A driver is the bridge between silicon and software; a broken bridge kills adoption.

The rest of this article expands the original overview into a detailed, implementation‑focused guide. We will (1) dissect the i740 and Parhelia architectures, (2) translate their failures into a concrete evaluation framework, (3) map that framework onto modern GPU families (NVIDIA RTX, AMD RDNA 3, Intel Xe‑HP), and (4) provide actionable checklists for procurement, integration, and performance tuning.

2. The Intel i740 – A Bandwidth Bottleneck Masquerading as Progress

2. The Intel i740 – A Bandwidth Bottleneck Masquerading as Progress

2.1 Historical context

  • Launch date: February 1998
  • Process node: 0.35 µm CMOS (Intel 0.35 µm)
  • Core frequency: 200 MHz (GPU core)
  • VRAM: 2 – 8 MB DDR SDRAM on‑board, 64‑bit memory bus
  • Bus interface: AGP 1.0 (2×) – marketed as “high‑speed graphics port”

Intel entered the discrete graphics market to complement its dominant CPU line. The i740 was the first Intel GPU to support AGP, a bus that promised a dedicated pathway for graphics data, theoretically delivering up to 533 MB/s (AGP 2×) of bandwidth.

2.2 Architectural shortcuts

Feature Design choice Consequence
VRAM size 2–8 MB on‑board, 64‑bit bus Very limited texture storage; any texture set larger than ~4 MB forced a fallback to system RAM.
AGP fallback Textures overflowed to host memory via AGP “sideband” reads/writes Latency spikes of 30–70 µs per texture fetch, far higher than on‑board DRAM latency (~10 µs).
Pixel pipeline Single‑pass rasterizer, 2‑stage texture unit No programmable shaders (pre‑DirectX 8 era), limiting flexibility for emerging games.
Driver stack Intel’s first‑generation graphics driver, written in-house with limited 3D expertise Lack of optimizations for texture filtering, mip‑mapping, and anti‑aliasing.

The most critical flaw was the reliance on AGP‑shared system RAM for texture overflow. In practice, the AGP bus could not sustain the random‑access pattern of texture sampling; each miss incurred a full round‑trip to main memory, stalling the rasterizer pipeline.

2.3 Real‑world performance numbers

  • 3DMark 1999 (DX7) – i740: ~1 800 points vs. 3dfx Voodoo 2: ~2 300 points.
  • Quake II (software‑rendered textures) – i740: 30 fps at 800×600, 16 MB textures; Voodoo 2: 45 fps under the same conditions. Benchmarking from Tom’s Hardware (1999) showed up to 40 % frame‑rate loss when the i740 accessed AGP‑backed memory, a penalty that persisted even after driver updates.

2.4 Driver ecosystem shortcomings

  • Release cadence: One major driver version per year, with only bug‑fix patches in between.
  • Feature support: No hardware‑accelerated Z‑buffer, limited texture filtering (nearest/linear only).
  • Developer feedback: Game studios reported “unpredictable texture pop‑in” and “excessive driver hangs” when testing on i740 hardware. The driver gap widened the performance chasm between the i740 and competitors that already had mature driver teams (e.g., 3dfx, NVIDIA).

2.5 What modern teams can learn

  • Never accept “shared system memory” as a primary texture store for high‑throughput workloads. Modern GPUs use HBM2e or GDDR6X with bandwidths > 500 GB/s, and the PCIe 5.0/6.0 interconnect is only a secondary path for data movement.
  • Measure effective memory bandwidth, not just bus width. The i740’s 64‑bit bus gave a theoretical 1 GB/s peak, but the real sustained bandwidth for texture streaming was < 300 MB/s due to AGP latency.

3. The Matrox Parhelia – Hype Without Hardware Harmony

3.1 Historical context

  • Launch date: June 2002 (Matrox G200)
  • Process node: 0.18 µm (CMOS)
  • Core frequency: 250 MHz (GPU core)
  • VRAM: 256 MB DDR SDRAM, 256‑bit memory interface (effective bandwidth ~5 GB/s)
  • Bus interface: AGP 8× (theoretical 2.1 GB/s)

Matrox positioned the Parhelia as a “four‑pipeline” architecture with advanced pixel shading and dual‑texture units per pipeline. The card targeted both high‑end gaming and professional workstation markets, promising DirectX 8.1 compliance and early DirectX 9 support.

3.2 Architectural mismatches

Feature Design claim Real‑world limitation
Pixel pipelines 4 pipelines, each with 2 texture units (2 × 2 × 2) Texture bandwidth per pipeline limited to ~1.25 GB/s, insufficient for the 8 GB/s needed for high‑resolution anti‑aliased scenes.
Shader model support Advertised “full DirectX 9” Only Shader Model 2.0 (no SM 2.0a/b extensions), causing incompatibility with many DX9 titles released later in 2002‑2003.
Memory controller 256‑bit bus, 5 GB/s effective The controller could not sustain the peak theoretical 8 GB/s; real throughput capped at ~5 GB/s, creating a bottleneck for large textures and multi‑sample anti‑aliasing (MSAA).
Driver maturity In‑house Matrox driver, “ready for launch” Early Windows XP drivers crashed under load; lack of a dedicated driver engineering team meant slow bug‑fix turnaround.

The pipeline‑to‑bandwidth ratio was the core issue: four pipelines demanded roughly 8 GB/s of texture bandwidth to keep all pipelines busy at 60 fps in 1024×768 AA scenes, but the memory subsystem could only deliver ~5 GB/s. The result was pipeline starvation—the GPU spent cycles idle waiting for texture data.

3.3 Benchmark snapshot

  • 3DMark 2001 (DX8) – Parhelia: 4 200 points vs. NVIDIA GeForce 4 Ti 4600: 5 600 points.
  • Unigine Heaven (DX9, 1024×768, 4×AA) – Parhelia: 28 fps; GeForce 4 Ti 4600: 38 fps. Even with a higher price tag (≈ $350 at launch), the Parhelia delivered 15 %–25 % lower performance than the market leader, and the driver crashes added a non‑technical barrier to adoption.

3.4 Market timing and ecosystem

By mid‑2002, NVIDIA and ATI had already released DX9‑ready drivers, unified shader architectures, and robust developer relations. Matrox’s late entry meant that:

  • Game developers had already optimized for NVIDIA/ATI hardware, leaving little incentive to add Parhelia‑specific code paths.
  • The Matrox community was small; third‑party tools (e.g., GPUPerfStudio, 3DMark) lacked Parhelia profiles, making performance analysis cumbersome.

The Parhelia’s short product life (discontinued in 2004) underscores how ecosystem lock‑in can outweigh raw silicon capability.

3.5 Modern relevance

  • Unified shader pipelines are now the norm (DX12/Vulkan). A GPU that still separates pixel, vertex, and geometry pipelines will suffer from under‑utilization when workloads shift between compute and graphics.
  • Driver support cadence matters more than ever: AI frameworks (TensorFlow, PyTorch) rely on CUDA, ROCm, or oneAPI drivers that are updated weekly. A lagging driver can delay model deployment by weeks.

4. From Historical Failures to a Modern Evaluation Framework

4. From Historical Failures to a Modern Evaluation Framework

The i740 and Parhelia teach us that three first‑order criteria dominate GPU success:

  1. Memory bandwidth (GB/s) and latency – the “data pipe” that feeds compute.
  2. Driver ecosystem health – the software bridge that unlocks hardware features.
  3. Real‑world benchmark relevance – the proof that advertised FLOPs translate into usable performance.

Below is a practical, step‑by‑step framework that modern compute teams can embed into their procurement and integration pipelines.

4.1 Step 1 – Quantify Memory Requirements

Workload Typical data movement (GB/s) Example GPUs that meet/exceed
CNN inference (FP16) 30‑60 GB/s (weights + activations) RTX 4090 (448 GB/s), AMD RX 7900 XTX (616 GB/s)
Real‑time ray tracing (DXR) 80‑120 GB/s (BVH + texture streaming) RTX 4090 (448 GB/s), Intel Arc A770 (512 GB/s)
High‑resolution video compositing (8K, 10‑bit) 150‑250 GB/s (frame buffers + LUTs) RTX 6000 Ada (768 GB/s), AMD MI250X (1.6 TB/s via HBM2e)

How to measure:

  • Use GPU‑specific profiling tools (NVIDIA Nsight Systems, AMD Radeon™ GPU Profiler, Intel VTune™ Amplifier) to capture memory read/write throughput under a representative workload.
  • Compare the sustained bandwidth (not theoretical max) against the required bandwidth calculated from your model’s dataflow.

If the sustained bandwidth falls below 80 % of the required figure, you should reject the candidate or plan for data‑reduction strategies (e.g., quantization, tiling).

4.2 Step 2 – Assess Driver Maturity

Metric What to look for Why it matters
Release cadence Weekly or bi‑weekly driver updates (NVIDIA, AMD) vs. quarterly (some niche vendors) Frequent updates mean faster bug fixes and new API support.
API version support CUDA 12+, ROCm 6+, DirectX 12 Ultimate, Vulkan 1.3 Guarantees that your software stack can leverage the latest features (e.g., mesh shaders, DLSS).
Community health Active GitHub issues, forum participation, third‑party tooling (e.g., OpenCL, SYCL) A vibrant community reduces “unknown unknowns” during integration.
Stability reports Crash‑rate statistics from large‑scale deployments (e.g., cloud GPU farms) High crash rates translate into operational overhead.

Practical tip: Create a driver health scorecard for each vendor. Assign points (0‑5) for each metric, then set a minimum threshold (e.g., 12/20) before the GPU can be considered.

4.3 Step 3 – Run Independent Benchmarks

Benchmark suite Target domain Typical output How to interpret
MLPerf Training/In‑ference AI workloads (vision, NLP, recommendation) Images/sec, latency, power Compare throughput per watt; look for “reference” vs. “submission” gaps.
3DMark Time Spy / Port Royal Real‑time rasterization & ray tracing Score, fps, temperature Use as a sanity check for graphics pipelines; ensure ray‑tracing cores are active.
SPEC‑ACCEL Compute kernels (FFT, GEMM, stencil) GFLOPs, time Highlights memory‑bound vs. compute‑bound behavior.
Vulkan‑based custom workloads Your own pipeline (e.g., video encode) Frame time, GPU utilization Most accurate for “in‑the‑wild” performance.

Implementation detail: Build a CI pipeline that runs a subset of these benchmarks on each new driver version. Store results in a time‑series database (e.g., InfluxDB) and set alerts for regressions > 5 %.

4.4 Step 4 – Evaluate Architectural Fit

Architectural feature Relevance to modern workloads Decision guidance
Tensor cores / matrix units Mixed‑precision AI (FP16/BF16/INT8) Prefer GPUs with dedicated matrix engines; compare TFLOPs (tensor) vs. TFLOPs (FP32).
Unified shader model Compute‑graphics convergence (DX12, Vulkan) Ensure the GPU supports dynamic work‑group sizing and indirect dispatch.
Cache hierarchy (L2, L3, shared memory) Reducing memory traffic for small kernels Larger L2 (≥ 8 MB) and on‑chip shared memory (≥ 64 KB) improve kernel launch efficiency.
PCIe generation Data‑center scaling (multi‑GPU) PCIe 5.0 x16 offers ~ 64 GB/s host‑GPU bandwidth; PCIe 4.0 x16 may be a bottleneck for multi‑GPU pipelines.

If a GPU lacks a feature that directly maps to a critical workload (e.g., no tensor cores for a BERT inference service), you should discount its FLOP count heavily.

5. Applying the Framework: A Comparative Case Study

Below we walk through a hypothetical procurement for a mid‑size AI startup that needs to run BERT‑large inference (≈ 340 M parameters) at ≤ 10 ms latency on a single GPU, while also supporting an in‑house 3D visualization tool for model debugging.

5.1 Candidate GPUs

GPU Peak FP32 FLOPs Tensor FLOPs (FP16) Memory Bandwidth PCIe Driver cadence Price (USD)
NVIDIA RTX 4090 82.6 TFLOPs 330 TFLOPs (FP16) 24 GB GDDR6X 448 GB/s PCIe 4.0 x16 Weekly (Game / Studio) 1 599
AMD Radeon RX 7900 XTX 61 TFLOPs – (no tensor) 24 GB GDDR6 616 GB/s PCIe 4.0 x16 Bi‑weekly (Adrenalin) 999
Intel Arc A770 31 TFLOPs – (no tensor) 16 GB GDDR6 512 GB/s PCIe 4.0 x16 Weekly (Arc Driver) 649
NVIDIA RTX A6000 (Data‑center) 38 TFLOPs 312 TFLOPs (FP16) 48 GB GDDR6 768 GB/s PCIe 5.0 x16 Weekly (CUDA) 4 500
AMD Instinct MI250X 236 TFLOPs (FP32) 472 TFLOPs (FP16) 128 GB HBM2e 1 600 GB/s PCIe 5.0 x16 Weekly (ROCm) 9 000

5.2 Memory bandwidth analysis

  • CNN‑inference (FP16) (≈ 45 GB/s) – all candidates exceed this comfortably.
  • Real‑time ray tracing (≈ 100 GB/s) – RTX 4090 and Arc A770 meet this; Radeon 7900 XTX also meets it.
  • High‑resolution video compositing (≈ 200 GB/s) – RTX 6000 Ada (not listed) and MI250X exceed; RTX 4090 and Radeon 7900 XTX are borderline but sufficient for 8K at 10‑bit.

5.3 Driver health check

GPU Driver release frequency API support Community health Stability reports
RTX 4090 Weekly (Game / Studio) CUDA 12+, DirectX 12 Ultimate, Vulkan 1.3 Large community, frequent third‑party tools Rare crashes
RX 7900 XTX Bi‑weekly (Adrenalin) ROCm 6+, DirectX 12 Ultimate, Vulkan 1.3 Growing community Minor stalls
Arc A770 Weekly (Arc Driver) Intel oneAPI, DirectX 12 Ultimate Emerging community Occasional hangs on compute shaders
RTX A6000 Weekly (CUDA) CUDA 12+, DirectX 12 Ultimate, Vulkan 1.3 Enterprise support Stable
MI250X Weekly (ROCm) ROCm 6+, DirectX 12 Ultimate, Vulkan 1.3 Enterprise support Stable

The RTX 4090 scores highest on driver health, with a large user base and strong vendor support.

5.4 Benchmark results (publicly available 2024 data)

GPU MLPerf Inference (BERT‑large, 1 GPU) 3DMark Port Royal (ray tracing)
RTX 4090 2 800 samples/s (latency 8 ms) 145 fps (1080p, Ultra)
RX 7900 XTX 1 900 samples/s (latency 12 ms) 118 fps
Arc A770 1 400 samples/s (latency 17 ms) 92 fps
RTX A6000 2 200 samples/s (latency 9 ms) 130 fps
MI250X 3 500 samples/s (latency 6 ms) 160 fps (via ROCm‑Vulkan)

While the MI250X leads in raw performance, its price (≈ $9 k) and power envelope (~ 500 W) make it unsuitable for a small startup’s rack. The RTX 4090 offers the best price‑performance ratio (≈ $0.57 per 1 k samples/s) and satisfies both AI and graphics workloads.

5.5 Decision

  • Primary GPU: NVIDIA RTX 4090 – meets bandwidth, driver, and benchmark criteria.
  • Secondary (future scaling): NVIDIA RTX A6000 – for multi‑GPU or ECC‑required inference.

The decision process mirrors the triad framework: memory bandwidth first, driver health second, benchmark relevance third.

6. Practical Guidance for Integration and Ongoing Operations

6.1 Memory‑centric code optimizations

  1. Tile the workload – Break large tensors into sub‑tiles that fit into the L2 cache (e.g., 8 KB tiles for RTX 4090). This reduces DRAM traffic and improves effective bandwidth.
  2. Use mixed‑precision – Convert FP32 weights to FP16 or BF16 where accuracy permits; this halves memory bandwidth per operation.
  3. Leverage Unified Memory (CUDA) or hipMallocManaged (ROCm) only when the data size is < 2 GB; beyond that, use explicit cudaMemcpyAsync with pinned host memory for lower latency.

6.2 Driver‑level best practices

  • Pin driver versions in production containers (e.g., Docker FROM nvidia/cuda:12.2.0-runtime-ubuntu22.04). This prevents accidental upgrades that could introduce regressions.
  • Enable driver‑level profiling (nvidia-smi -q -d PERFORMANCE) to monitor GPU clock throttling and thermal events that may affect performance consistency.
  • Subscribe to vendor release notes and maintain a changelog of applied patches. For critical services, adopt a “canary” deployment strategy: roll out a new driver to a single node, run a smoke test suite, then propagate if no regressions appear.

6.3 Benchmark‑driven procurement policy

  1. Define a baseline benchmark suite aligned with your primary workloads (e.g., BERT inference, 3D rendering).
  2. Set acceptance thresholds (≥ 90 % of baseline performance, ≤ 5 % variance across driver versions).
  3. Require vendors to provide raw benchmark logs for the exact driver version you intend to ship.
  4. Run an internal “re‑benchmark” on the same hardware to verify the vendor’s numbers.

6.4 Trade‑offs and cost considerations

Trade‑off Example When it makes sense
Higher bandwidth vs. lower power RTX 4090 (448 GB/s, 450 W) vs. RTX 3080 Ti (384 GB/s, 350 W) If power budget is tight, consider a slightly lower bandwidth card and compensate with more efficient compute.
Dedicated tensor cores vs. general‑purpose cores RTX 4090 (330 TFLOPs FP16) vs. AMD RX 7900 XTX (no tensor) For inference workloads, tensor cores give > 2× speedup; for pure graphics, they are irrelevant.
Enterprise driver support vs. consumer driver RTX A6000 (CUDA Enterprise) vs. RTX 4090 (Game / Studio) Mission‑critical services that require long‑term support and ECC memory should opt for enterprise GPUs.
On‑chip memory (HBM2e) vs. external GDDR6X MI250X (128 GB HBM2e) vs. RTX 4090 (24 GB GDDR6X) If your model requires > 32 GB of weights, HBM2e may be necessary; otherwise, GDDR6X is cheaper.

7. Architectural Deep‑Dive: From Rasterization to Tensor Cores

7.1 Evolution of the shader pipeline

  • i740 (1998) – Fixed‑function rasterizer, no programmable shaders.
  • Parhelia (2002) – Four‑pipeline architecture with dual texture units, but separate vertex/pixel/geometry pipelines.
  • Modern GPUs (2024) – Unified shader architecture where a single pool of CUDA cores / Compute Units can execute vertex, pixel, compute, or tensor instructions. This eliminates pipeline starvation and maximizes resource utilization.

7.2 Tensor cores and matrix engines

  • Volta (2017) introduced Tensor Cores that perform 4 × 4 matrix multiply‑accumulate (MMA) in a single clock cycle, delivering up to 125 TFLOPs on the RTX 2080 Ti.
  • Ada Lovelace (2022) added sparsity‑aware Tensor Cores, effectively doubling throughput for models that can prune up to 2:4 sparsity.
  • AMD RDNA 3 introduced Matrix Cores that operate on 8 × 8 FP16 blocks, delivering ≈ 200 TFLOPs on the Radeon 7900 XTX.
  • These specialized units reduce memory traffic because the result of a matrix multiply can be kept on‑chip for subsequent operations (e.g., GEMM → activation).

7.3 Cache hierarchy and its impact on bandwidth

GPU Generation L2 Cache Size Typical L2 bandwidth Effect on bandwidth‑bound workloads
i740 0 KB (no L2) N/A All texture fetches hit DRAM → high latency.
Parhelia 256 KB (shared) ~ 30 GB/s Slightly mitigates texture stalls but insufficient for 4‑pipeline demand.
RTX 4090 6 MB (L2) ~ 1.5 TB/s Allows large texture tiles to stay on‑chip, reducing AGP‑like stalls.
MI250X 32 MB (HBM2e L2) ~ 4 TB/s Near‑memory compute; bandwidth limited by HBM, not PCIe.

A larger L2 cache acts as a bandwidth amplifier: it absorbs bursty texture reads and provides a high‑speed staging area for tensor core operations. Modern GPUs therefore allocate several megabytes of L2, a design choice that directly addresses the i740’s and Parhelia’s memory bottlenecks.

8. Checklist – “Did We Remember the i740/Parhelia?”

Before signing off on a GPU purchase, run through this quick sanity checklist. If any item raises a red flag, revisit the detailed framework.

  • [ ] Memory bandwidth (sustained) ≥ 1.2 × the calculated workload requirement.
  • [ ] Driver release cadence ≤ 2 weeks for critical APIs (CUDA, ROCm, DirectX).
  • [ ] Independent benchmark performance within ±10 % of vendor’s reference.
  • [ ] Unified shader architecture with dynamic work‑group sizing.
  • [ ] Dedicated tensor/matrix cores if the workload is mixed‑precision AI.
  • [ ] ECC support for mission‑critical inference services.
  • [ ] Power envelope compatible with existing PSU or rack infrastructure.

9. Conclusion – Turning Historical Flops into Future Wins

The Intel i740 and Matrox Parhelia were not merely “bad GPUs”; they were case studies in how ignoring deeper layers can turn a well‑funded product into a commercial disaster. Both cards were launched with strong brand backing and aggressive FLOP claims, yet each collapsed because a single weak link—memory bandwidth, driver stability, or unrealistic pipeline balance—throttled the whole system.

For engineers building AI inference pipelines, high‑throughput rendering farms, or mixed compute‑graphics workloads, the lessons are timeless:

  • Raw transistor count ≠ usable performance.
  • Bandwidth is a first‑order constraint—if data cannot reach the compute units fast enough, FLOPs sit idle.
  • A driver is the bridge between silicon and software; a broken bridge kills adoption.

By embedding the triad framework (memory bandwidth, driver health, benchmark relevance) into procurement pipelines, modern teams can avoid the pitfalls that doomed the i740 and Parhelia. The result is a GPU that delivers on its promised FLOPs, scales with future workloads, and remains supported by a healthy ecosystem.

10. Key Takeaways

  • Memory bandwidth beats VRAM size—focus on sustained GB/s and latency.
  • Driver maturity matters—weekly updates and broad API support are essential.
  • Real‑world benchmarks validate spec claims—never rely solely on peak FLOPs.
  • Unified shader pipelines and tensor cores are the norm for mixed compute‑graphics workloads.
  • Ecosystem lock‑in can outweigh raw silicon capability.

11. Further Reading

  • GPU Architecture Trends: From Rasterization to Tensor Cores
  • How Driver Maturity Impacts Cloud‑Native AI Deployments
  • Benchmarking AI Workloads: A Practical Guide for Engineers

12. Sources

Key Takeaways

  • This topic is evolving rapidly — monitor developments closely over the next 6–12 months.
  • Evaluate whether existing tooling in your stack already covers this need before adopting new solutions.
  • Start with a small proof‑of‑concept before committing to a full implementation.
  • Cross‑reference multiple sources before acting on any single vendor claim.
  • Share findings with your team — decisions in this area benefit from diverse perspectives.

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