Ethernet PHY chips are classified into voltage-mode and current-mode types based on the structure of their output stages. The two types have entirely different requirements regarding the connection of the network transformer’s centre tap; incorrect connection can result in reduced signal amplitude, waveform distortion or even failure to establish a link.
Voltage-Mode PHY
The output stage of a voltage-driven PHY employs a voltage-source configuration and incorporates an internal impedance-matching resistor (typically 50 Ω). Its output impedance is matched to the characteristic impedance of the transmission line (100 Ω differential), and the signal amplitude is determined by the internal voltage source.
Centre-tapped connection:
Must be earthed via a capacitor (typically 100 nF) to isolate the DC component.
**Principle: **The output of a voltage-driven PHY already has a defined DC offset point; the centre-tapped ground capacitor provides an AC coupling path, ensuring that the signal across the primary winding of the transformer is symmetrical with respect to ground.
**Typical chips: **Realtek RTL8211F, Intel LXT972, Jinglue JL2101C.
(2) Current-Mode PHY
The output stage of a current-mode PHY employs a current-source configuration, requiring an external resistor to convert the current into a voltage. The centre tap of the transformer provides a DC bias path, enabling the differential current to flow through the primary winding of the transformer to form a complete AC loop.
Centre-tapped connection: **This must be connected directly to the PHY’s supply voltage (VDD, typically 3.3 V, 2.5 V or 1.8 V), and a capacitor to ground (0.01 μF to 0.1 μF) must be used for high-frequency decoupling.
**Principle: **Connecting the centre tap to VDD provides a DC path for the differential current; the resistor (typically two 50Ω resistors in series or integrated within the chip) and the primary winding of the transformer together form a current-to-voltage conversion network.
**Typical chips: TI DP83848, Microchip LAN8720, Jinglue JL2201B/JL1111B.
The Function and Design of the Bob-Smith Circuit
The Bob-Smith circuit is an impedance-matching and common-mode rejection network widely used in the Ethernet physical layer. It consists of resistors and capacitors connected across a pair of differential lines near the transformer (each pair of lines is configured independently).
(1) Circuit Configuration
A standard Bob-Smith circuit consists of two resistors (typically 75 Ω) and a high-voltage capacitor (1000 pF/2 kV) connected in series between them, with its terminals connected to the differential lines (TX+ and TX-) respectively; common-mode surge energy is dissipated via the capacitor to the protective earth (PGND).
(2) Main Functions
Impedance matching: Provides a defined AC termination impedance for differential signals, reducing signal reflection.
Common-mode noise suppression: Provides a discharge path to ground for common-mode currents, reducing radiated emissions from the cable.
Surge energy absorption: External surge energy can be coupled via the capacitor to protective earth for dissipation.
(3) Design Considerations
The resistance value is typically 75 Ω (for a differential impedance of 100 Ω, 75 Ω single-ended is a common choice for impedance matching).
A resistance tolerance of 1 per cent is recommended to ensure impedance matching accuracy.
The capacitance withstand voltage must be ≥2 kV to ensure compliance with the IEC 61000-4-5 surge test requirements (2 kV line-to-ground).
Top comments (0)