This article was first published on my site: https://resume.tensorview.cc/blog/rk3588-rga-multi-camera.html
RGA + DMA zero-copy for three high-res camera streams
In a recent RK3588 Embedded Linux project I owned the vision capture path: three high-resolution streams (coaxial, USB, wireless) previewed at once. CPU soft conversion would choke the UI thread under that throughput.
Legacy CPU soft-decode path: heavy memory traffic fights the UI thread.
The architectural decision
I designed around the on-SoC RGA from day one. A DMA path feeds raw YUV from contiguous buffers into RGA for YUV→RGB and scaling, skipping extra CPU cache churn.
RGA hardware path: CPU only configures; pixels stay on DMA.
Technical challenges
- Strict alignment: posix_memalign 4K page-aligned pools keep DMA stable and avoid tearing / faults.
- Heterogeneous sources: a unified buffer layer configures RGA from V4L2 metadata (UYVY vs YUYV, MIPI vs USB).
Live preview UI: switch coaxial / FOV / RX with hardware controls in one panel.
Outcome
All three cameras preview smoothly with negligible CPU on the video path, leaving headroom for business logic and UI. Hardware-aware design still wins in embedded.
Original post: https://resume.tensorview.cc/blog/rk3588-rga-multi-camera.html
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