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Discussion on: Understanding Atomics and Memory Ordering

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nd profile image
nd

Trying to wrap my head around fences.

Shouldn't ordering be the following?

A fence(Release) makes previous non-Release atomic stores into Release if they have a matching Acquire atomic load or matching fence(Acquire).

A fence(Acquire) makes subsequent non-Acquire atomic loads into Acquire if they have a matching Release atomic store or matching fence(Release).

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kprotty profile image
kprotty

I don't think so: write(); fence(Release); store() under those rules would imply that the write() is Release when in-fact the store() might be the one that is used to observe the contents of the write(), meaning the store() would have to be Release.

"Promoting the store() to Release" might be the wrong imagery to use on my part. The C++ Atomics Reference describes it much more concretely:

A release fence F in thread A synchronizes-with atomic acquire operation Y in thread B, if:

  • there exists an atomic store X (with any memory order)
  • F is sequenced-before X in thread A