From Standard Cell Layouts to SPICE, SRAM, and P&R Flows
If you’ve ever opened a PDK and thought, “Where do I even start?”, you’re not alone.
This article is for hobbyists, students, and engineers who want to understand PDKs beyond documentation—by actually touching and experimenting with them.
PDKs (Process Design Kits) often look overwhelming at first—huge directories, dense design rules, endless SPICE parameters. They’re usually introduced as something professional, serious, and not meant to be touched casually.
But here’s the good news: open-source PDKs don’t have to be scary.
In this post, I’ll share how I’ve been learning open-source PDKs by playing with them—looking at layouts, drawing my own cells, running SPICE simulations, breaking things, and sometimes fixing them again.
No tape-outs.
No deadlines.
Just curiosity and experiments.
A Practical Guide to Open-Source PDKs 🚶
In this article, I share a hands-on, experience-based guide to understanding open-source PDKs (Process Design Kits).
We will cover:
- What a PDK actually is
- How to read and explore an open-source PDK
- Practical examples using standard cells, SPICE, SRAM, and P&R flows
- How to learn PDKs by playing with them
This article is written for people who are interested in semiconductor design but feel unsure about where to start:
- What exactly is a PDK?
- How should I approach an open-source PDK?
- What should I try first to really understand it?
Rather than treating PDKs as something purely professional or intimidating,
this guide focuses on learning by experimenting and having fun.
What Is a PDK?
A PDK (Process Design Kit) is a collection of everything required for semiconductor design.
It typically includes:
- Transistor models (SPICE)
- Device parameters
- Design rules
- DRC / LVS / ERC rules
- Parasitic extraction rules (LPE / PEX)
- Standard cell libraries
- Configuration for place-and-route (P&R) flows
In the past, IC design could be done with just the so-called “three essentials”:
- Device parameters
- Design rules
- SPICE models
However, as processes became more advanced and EDA tools more complex, things changed.
With increasing:
- Verification complexity
- Number of layers and device types
- Mask costs and respin risks
Almost everything related to design and verification became part of the PDK.
Where Should You Start Reading a PDK?
If you want to understand a PDK,
jumping straight into design-rule documents is honestly painful.
A much better starting point is to look at standard-cell layouts.
From a single standard-cell layout, you can immediately see:
- Layer stack and structure
- Minimum rules (width, spacing, enclosure)
- Metal pitch and routing directions
- Poly width and pitch
- Well structures and isolation strategies
Below is an example of a standard-cell layout from SKY130.
(Standard cells are essentially compressed collections of minimum rules.)
Rather than reading rules, you can often understand them visually just by looking.
Understanding Skyrockets When You Draw Cells Yourself
An even better approach is to draw standard cells yourself.
For example:
- Try shrinking an 8-track cell into a 7-track cell
When you do this, you quickly discover:
- Which rules actually matter
- The real limits of poly, active, and contacts
- Non-negotiable routing constraints
- The unique “personality” of each PDK
To understand the design philosophy behind a PDK,
nothing beats drawing layouts while constantly checking the rules.
Reading the “Personality” from Device Parameters
Next, look at the device parameters.
Even just comparing Ion (on-current) and Ioff (off-current) reveals a lot about a process.
Typical trends include:
- FF corner: fast but leaky
- SS corner: slow but low leakage
From this, you can infer:
- Speed vs. leakage trade-offs
- Delay and power tendencies
- Threshold-voltage variation windows
If device documentation is limited,
SPICE simulations can help fill the gaps
(though model accuracy should always be considered).
Try Running SPICE Simulations
Running SPICE simulations reveals device behavior very clearly.
You can explore things like:
- I–V characteristics
- Standard-cell delay (Tpd)
- Power vs. speed trade-offs
Even if symbols are not provided,
handwritten netlists are usually enough to experiment.
Once you establish the flow:
Read → Draw → Simulate
your understanding of the PDK reaches a new level.
🔗 Open-source PDK community
https://ishi-kai.org/
If You Want to Build a PDK Yourself
With the classic three essentials
(device parameters, design rules, and SPICE models),
you can build a minimal PDK.
The goal is to start small and functional.
1. Layer Definitions (Layer Map)
- Layer names, numbers, colors, GDS mappings
- Mapping between design and mask layers
This step defines the worldview of the PDK.
Minimum required layers include:
- Active
- N-well / P-well
- Poly
- N+/P+ source-drain
- Contact
- Metal / Via
2. Minimal DRC
- Width, spacing, enclosure rules
- Enough to draw INV / NAND gates
3. LVS
- MOS extraction (W/L)
- Connectivity extraction
- Consistency with SPICE models
4. Simple Standard Cells
- INV / NAND for rule validation
- DFF to confirm practical usability
The initial goal is simple:
A PDK that design tools can correctly interpret
Open-Source PDKs Are Meant to Be Played With
Professional PDK development and open-source PDK exploration are completely different.
| Professional Work | Playing |
|---|---|
| Deadlines and precision | Try ideas freely |
| Reproducibility | Breaking things is OK |
| Corporate rules | Your own rules |
Tuning SPICE models,
characterizing cells with Libretto,
designing SRAM bitcells,
running OpenLane with 7-track libraries…
Through this kind of “play,”
you often gain deeper insight than from formal work.
Things I’ve Tried with Open-Source PDKs
Below are some examples of how I’ve been playing with open-source PDKs—not as work, but as exploration.
Building Design Environments with Mini PCs and SSDs
I start from the environment.
Using low-cost mini PCs and multiple small SSDs, I prepare:
- Mini PC (CHUWI LarkBox X 2023)
- Linux (Linux Mint 21.3 “Virginia”)
- Various EDA tools
- Multiple open-source PDKs
Each PDK lives on its own SSD.
This makes it easy to:
- Break environments without worry
- Carry setups between machines
- Maintain clean, PDK-specific systems
Supported PDKs include:
- SKY130
- GF180MCU
- TR-1um
Portable PDK environment on a mini SSD
Playing with SPICE Model Parameters
Next, I tweak SPICE model parameters such as Vth0 and U0.
By gradually changing them, I observe:
- Changes in Id–Vg curves
- Differences from virtual measurement data
I also tried simple fitting to minimize error between:
- Synthetic measurement data
- SPICE simulation results
The goal is not model accuracy, but intuition:
How do model parameters affect circuit behavior?
Using Libretto for Cell Characterization
I used Libretto, a characterization tool, with:
- Original models
- Self-adjusted models
By comparing results, I could clearly see:
- Delay trends
- Slope dependencies
- Where model differences appear
Seeing characterization results helps bridge
SPICE models and circuit-level behavior.
🔗 Libretto
https://github.com/snishizawa/libretto
Drawing SRAM Butterfly Curves
Using a 6T SRAM bitcell,
I plotted butterfly curves to evaluate SNM (Static Noise Margin).
By varying:
- SPICE models
- Transistor sizing
I could visually understand SRAM stability much better.
Laying Out SRAM Bitcells
I also laid out SRAM bitcells:
- Conventional vertical cells
- Point-symmetric cells
Comparing them reveals differences in:
- Routing efficiency
- Cell area
- Scalability potential
Doing both circuit and layout work connects understanding in a powerful way.
Running OpenLane with Custom 7-Track Cells
Finally, I prepared a full digital flow using custom 7-track standard cells:
- GDS
- LEF
- Verilog
- Liberty (.lib)
Running the OpenLane flow answers key questions:
- Does P&R actually succeed?
- Where are routing density limits?
- How compatible are these cells with existing libraries?
The key is not stopping at cell creation,
but running the full flow.
Playing Deepens Understanding
None of these experiments are:
- Required for professional work
- Particularly efficient
But in an environment where you can:
- Break things
- Try ideas
- Laugh at failures
your understanding of PDKs deepens naturally.
Open-source PDKs are, in my opinion,
excellent learning and experimentation platforms.
If you’re curious about semiconductor design, don’t wait for permission—open a PDK, draw something small, and start playing.
Summary
- Playing with open-source PDKs leads to deeper understanding
- Breaking and fixing things yourself is the best teacher
Open-source PDKs are
a gateway to making semiconductor design accessible and enjoyable for everyone.
Related Materials
📅 December 2025 Event: Open PDK Seminar by Tokai Rika Shuttle
https://ishi-kai.org/information/seminar/2025/10/30/DecEvent_1213.html
📄 Presentation slides (PDF):
A Practical Guide to Open-Source PDKs
https://ishi-kai.org/assets/presentation/event/202512/Guide2OpenSourcePDKs.pdf
🇯🇵 Japanese version of this article (Qiita):
https://qiita.com/take_hoojoo/items/8840528d3e26b31d18bb
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