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<span>
<span>30<sup>th</sup></span>
<span>Oct</span>
<span>2021</span>
</span>
<h2>Milestone: Running stress test of regression suite on the FPGA</h2>
<p>Regression suite
<br>- transplants
<br>- memory transactions
<br>- page faults
<br>- stress test for queues
</p>
<p>Laboratory Infra
<br>- DevteroFlex QEMU 5.2 to 6.0
<br>- helped Ali and Shanqing with QEMU instrumentation for CS471
<br>- helped Sid and Atri with QEMU instrumentation for ISCA submission
</p>
<span>
<span>30<sup>th</sup></span>
<span>Nov</span>
<span>2021</span>
</span>
<h2>Milestone: Run program in QEMU with DevteroFlex attached</h2>
<p>Tutorials:
<br>- QEMU instrumentation
<br>- Chisel development and DevteroFlex accelerator
</p>
<p>DevteroFlex software:
<br>- Demand Paging
<br>- Inverted Page table for synonyms
<br>- Physical page management
<br>- Sychronization on QEMU modification of FPGA page
<br>- DevteroFlex as master of QEMU execution
</p>
<span>
<span>Today</span>
</span>
<h2>Today Status, EPFL Report;<h2></h2>
The Good
</h2><p>These two months leaded:
<br>- fixing more than 70 bugs in both RTL and software
<br>- fixing design errors
<br>- helping other labs members understand deep aspects of QEMU
<br>- designing tutorials for the platform
<br>- improving our verification suite
<br>- rewritting and verifying the whole DevteroFlex software in QEMU
<br>- having a good regression suite methodology and tests
<br>Running for the first time a program in QEMU with DevteroFlex attached</p>
The Bad
<p>
<br>- can't run in kernel mode without a significant amount of transplants
<br>- can't run correctly multithreaded with QEMU as the master
</p>
The Ugly
<p>
<br>- we still don't have clear direction/the research for a killer app
<br>- we don't have a paper yet
<br>- interrupts, vm clock integration with QEMU might be tricky
<br>- full determinism might be impossible?
</p>
<span>
<span>20<sup>th</sup></span>
<span>Dec</span>
<span>2021</span>
</span>
<h2>Milestone: Check instrumentation slowdown and multithread speedup</h2>
<p>In the context of the CS471 course, we want to measure the instrumentation overhead of DevteroFlex.
We would also like to see if increasing the number of threads leads to increase performance without impacting instrumentation speed.</p>
<span>
<span>15<sup>th</sup></span>
<span>Jan</span>
<span>2022</span>
</span>
<h2>Milestone: SVC and system registers single threaded running SPEC</h2>
<p>Significant slowdown is due to not supporting a wide range of system registers (MSR, MRS), and missing system calls (SVC) support</p>
<span>
<span>30<sup>th</sup></span>
<span>Jan</span>
<span>2022</span>
</span>
<h2>Milestone: Fully Functioning Multithreaded</h2>
<p>With this, we can finally close a fully functioning product of DevteroFlex and try to measure a decent multi-threaded program performance</p>
<p>Research: We need to know which app we will showcase (tracing? reverse debugging? memory tagging? system-call argument checkup?)</p>
<span>
<span>30<sup>th</sup></span>
<span>Fev</span>
<span>2022</span>
</span>
<h2>Milestone: Instrumentation case implemented</h2>
<span>
<span>22<sup>th</sup></span>
<span>March</span>
<span>2022</span>
</span>
<h2>Paper Submission: FPL</h2>
<span>
<span>30<sup>th</sup></span>
<span>April</span>
<span>2022</span>
</span>
<h2>Milestone: Prepare for submission for funding proposal</h2>
<p>Wrap up infrastructure for improved usage</p>
<span>
<span>June-July</span>
<span>2022</span>
</span>
<h2>Performance optimisations, support for multiplexed memory hierarchy</h2>
<p>
<br>- fix issues due to paper
<br>- fix issues of funding submission proposal
</p>
<span>
<span>Aug-Sept</span>
<span>2022</span>
</span>
<h2>Milestone: Paper presentation</h2>
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