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Jensen is out. CUDA isn't. A Developer's Guide to Everything Nvidia Built

#nvidia #programming #ai #cuda

Yesterday, Jensen Huang resigned as Nvidia's CEO, effective immediately. The stock fell as much as 14% during the day before closing down 4.3%.

If you write code for a living, the stock drop is not the interesting part. The interesting part is that a single company, run by a single founder for 33 years, ended up owning the layer that almost every AI workload runs on. Your PyTorch training loop, your vLLM server and the model behind your coding assistant all sit on that layer.

So this post skips most of the boardroom drama and asks the developer questions. What did Nvidia actually invent? Why is CUDA so hard to leave? And does any of it change now that Huang is gone?

The major Nvidia inventions from 1993 to 2028, in three eras: graphics, compute and AI factories

TL;DR

  • What happened: Huang resigned as president, CEO and director on November 12, 2026. CFO Colette Kress is interim CEO, and Harvey C. Jones became Nvidia's first board chair. Nvidia gave no reason.
  • For developers, nothing changes this week. CUDA, cuDNN, NCCL, TensorRT and the Nemotron models keep shipping. Nvidia credits over 6 million developers with building on CUDA.
  • The key invention was making the GPU programmable: programmable shaders in 2001, then CUDA in 2006, put on every GeForce card, including cheap ones. That is why a grad student's gaming PC could train AlexNet in 2012.
  • The moat is software, not silicon. A rival chip has to replace compilers, PTX, libraries, profilers and framework support, not just match FLOPS.
  • Huang was one of open source's strongest allies in big tech. He agreed to buy Hugging Face for $12.93 billion, co-wrote an industry letter defending open-weight models, and called DeepSeek-R1 "genuinely a gift to the world's AI industry." I counted 338 Nvidia engineers in the git history of open-source AI projects over the last 12 months, including DeepSeek's own kernel libraries.
  • Gaming paid for AI. Data center was $193.7B, about 90% of Nvidia's $215.9B in fiscal 2026 revenue. Gaming, the original business, was $16.0B.
  • You can research all of this with code. Every research example comes in two flavors: a fast Search call and a cited DeepResearch report, in JavaScript and Python.

Contents

  1. What actually happened
  2. Era 1: Graphics, and the chip that became programmable
  3. Era 2: CUDA, explained with code
  4. Era 3: AI factories
  5. Why the moat is software
  6. How gaming paid for AI
  7. Seven times Nvidia nearly failed
  8. The engineers behind the moat
  9. Jensen and open source: 338 engineers, counted
  10. Follow the money: who owns Nvidia, and who Nvidia owns
  11. Research Nvidia yourself, with code
  12. What changes for developers
  13. FAQ

What actually happened

Nvidia's board announced that Huang had resigned as president, CEO and director. It is the company's first CEO change since he co-founded it in 1993.

  • Interim CEO: Colette Kress, CFO since 2013. She keeps the CFO job too.
  • Board chair: Harvey C. Jones, the former Synopsys CEO, who has been on the board since 1993. Nvidia never had a chair before.
  • Reason: The release gives none. Press reports link the exit to a board review of Huang's personal conduct. Nvidia has not confirmed them, and its 8-K does not mention them.
  • Market: Shares closed down 4.34% at $166.19, about 30% below the October 6 record close.

That's the news. Now the engineering.

Era 1: Graphics, and the chip that became programmable

1993. Huang, Chris Malachowsky and Curtis Priem founded Nvidia to build 3D graphics chips for PCs.

1995: NV1, the wrong bet. NV1 rendered 3D with quadratic surfaces instead of the triangles the rest of the industry was standardizing on through Direct3D. Clever, and commercially wrong. Nvidia nearly died.

1997: RIVA 128, shipped without a prototype. Nvidia switched to triangles. With about six months of cash left, by Huang's account, it verified the RIVA 128 on a hardware emulator and sent the design straight to mass production. Huang has said he never held the chip before ordering it. If you've ever shipped to prod without a staging environment, imagine doing it with the whole company.

1999: GeForce 256 and the word "GPU." Nvidia marketed it as the world's first GPU. The real leap was hardware transform and lighting: moving per-vertex geometry math off the CPU. "First GPU" is Nvidia's label, and rivals dispute it, but the name stuck.

2001: GeForce 3 and programmable shaders. This is the one that matters for AI. Before GeForce 3, graphics chips ran a fixed pipeline. GeForce 3 let you write small programs, vertex shaders and pixel shaders, that ran for every vertex or pixel.

Once the hardware ran programs, researchers started abusing it for non-graphics math: encode your data as a texture, write a "shader" that's really a linear algebra kernel, read the result back as pixels. The hack got a name, GPGPU, and it was painful enough that someone had to build a real programming model.

2004: SLI. Two graphics cards sharing one game's rendering. A footnote now, but it was Nvidia's first product built on the idea that linking GPUs together is a feature. That idea comes back as NVLink.

Era 2: CUDA, explained with code

Why a gaming chip turned out to be an AI chip: a CPU has a few big cores, a GPU has thousands of small ones, and matrix multiplication suits the GPU

2006: G80 and CUDA. The GeForce 8800 (G80) replaced separate vertex and pixel units with unified shader cores that could run any program. With it, Nvidia announced CUDA: write GPU code in ordinary C, no texture tricks. The first public release followed in 2007. It was built by Ian Buck, who had created the Brook stream language for his Stanford PhD, and John Nickolls, who led the GPU computing architecture.

Twenty years later, the core ideas haven't changed.

The mental model

  • SIMT (single instruction, multiple threads). You write scalar code for one thread. The hardware runs it across thousands of threads in groups of 32 called warps.
  • A thread hierarchy. Threads form blocks, blocks form a grid. Blocks get scheduled onto streaming multiprocessors (SMs), so the same code scales from a laptop GPU to a data-center GPU with well over a hundred SMs.
  • An explicit memory hierarchy. Per-thread registers, fast per-block shared memory, and big but slow global memory. Most GPU performance work is moving data to the fast levels and keeping it there.
  • PTX, a virtual ISA. CUDA compiles to PTX, and the driver compiles PTX to each GPU's real instructions.

How CUDA works: a kernel launch creates a grid of blocks, each block holds warps of 32 threads, and blocks are scheduled onto streaming multiprocessors

Hello world: one thread per element 

__global__ void add(const float* a, const float* b, float* c, int n) {
  int i = blockIdx.x * blockDim.x + threadIdx.x;  // this thread's global index
  if (i < n) c[i] = a[i] + b[i];
}

// launch enough 256-thread blocks to cover n elements
add<<<(n + 255) / 256, 256>>>(a, b, c, n);
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No loop. You describe what one thread does, and the launch configuration <<<blocks, threadsPerBlock>>> decides how many run.

Where it gets interesting: shared memory

The naive matrix multiply reads every element of A and B from global memory N times. The classic fix is tiling: each block loads a small tile of A and B into shared memory once, and every thread in the block reuses it.

#define TILE 16

__global__ void matmul(const float* A, const float* B, float* C, int N) {
  __shared__ float As[TILE][TILE];
  __shared__ float Bs[TILE][TILE];

  int row = blockIdx.y * TILE + threadIdx.y;
  int col = blockIdx.x * TILE + threadIdx.x;
  float acc = 0.0f;

  for (int t = 0; t < (N + TILE - 1) / TILE; ++t) {
    int aCol = t * TILE + threadIdx.x;
    int bRow = t * TILE + threadIdx.y;
    As[threadIdx.y][threadIdx.x] = (row < N && aCol < N) ? A[row * N + aCol] : 0.0f;
    Bs[threadIdx.y][threadIdx.x] = (bRow < N && col < N) ? B[bRow * N + col] : 0.0f;
    __syncthreads();  // wait until the whole tile is loaded

    for (int k = 0; k < TILE; ++k)
      acc += As[threadIdx.y][k] * Bs[k][threadIdx.x];
    __syncthreads();  // wait before overwriting the tile
  }

  if (row < N && col < N) C[row * N + col] = acc;
}

// dim3 block(TILE, TILE);
// dim3 grid((N + TILE - 1) / TILE, (N + TILE - 1) / TILE);
// matmul<<<grid, block>>>(A, B, C, N);
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Each global value is now loaded N / TILE times instead of N times, a 16x cut in global-memory reads for this tile size. Production libraries like cuBLAS and CUTLASS go much further (register tiling, async copies, Tensor Cores), which is exactly why almost nobody writes their own matmul. That gap between "correct kernel" and "fast kernel" is a big part of the moat.

PTX: why your old binaries still run

When you compile with nvcc, you can embed PTX alongside machine code for a specific GPU:

nvcc -gencode arch=compute_70,code=sm_70 \
     -gencode arch=compute_70,code=compute_70 \
     kernel.cu -o app
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code=sm_70 is native machine code for Volta. code=compute_70 embeds the PTX itself, which the driver can JIT-compile for GPUs that didn't exist when you built the binary. Nearly two decades of forward compatibility is one of the most underrated reasons teams stay on CUDA.

The business decision behind the code

The API wasn't the bold part. Putting CUDA on every GeForce card was. It cost die area and margin on products whose buyers just wanted to play games, and Wall Street questioned it for years. But it meant every student with a gaming PC owned a parallel computer they could program.

2010: Fermi added ECC memory, a real L1/L2 cache hierarchy and much faster FP64, which made GPUs acceptable to supercomputer centers.

2012: AlexNet. Alex Krizhevsky, Ilya Sutskever and Geoffrey Hinton trained a deep CNN on two GeForce GTX 580 gaming cards and won ImageNet with about 15% top-5 error against roughly 26% for the runner-up. Deep learning had been waiting for cheap parallel compute. CUDA on gaming GPUs supplied it.

2014: cuDNN. Nvidia packaged hand-tuned convolutions, pooling and activations into a library, and every framework adopted it. That became the pattern: find the hot loop in a new field, write the fastest library for it, and give it away to sell hardware.

2016: P100, NVLink, DGX-1. HBM2 memory, the first NVLink (a GPU-to-GPU link far faster than PCIe) and an eight-GPU "AI supercomputer in a box." Huang hand-delivered the first DGX-1 to a small non-profit called OpenAI.

Era 3: AI factories

2017: Volta and Tensor Cores. Neural nets spend most of their time multiplying matrices. Tensor Cores do a small matrix multiply-accumulate (a 4x4 block in the first generation) in mixed precision every clock. Every Nvidia data-center GPU since has them.

2018: Turing, RT cores and DLSS. Real-time ray tracing for games, plus DLSS: render at lower resolution, upscale with a neural network on the Tensor Cores. AI sold gaming, and gaming funded AI.

2020: A100 and Mellanox. Multi-Instance GPU slices one A100 into up to seven isolated GPUs. Nvidia also closed its $6.9B purchase of Mellanox, the InfiniBand leader. Training a large model is as much a networking problem as a compute problem, and Nvidia now owned both.

2021: Grace. An Arm-based data-center CPU built to feed GPUs over NVLink-C2C. (Nvidia doesn't make gaming CPUs; your gaming PC's CPU is Intel or AMD.)

2022: H100 and the Transformer Engine. It switches parts of a transformer to FP8 and back where accuracy needs it, roughly doubling effective throughput on the workload that was about to take over. Nvidia announced it in March 2022, eight months before ChatGPT launched.

2024: Blackwell and GB200 NVL72. Two dies acting as one GPU (208 billion transistors), FP4 support, and a liquid-cooled rack of 36 Grace CPUs and 72 Blackwell GPUs joined by NVLink switches at 130 TB/s, behaving like one giant GPU. The unit of compute became the rack.

From one chip to an AI factory: one GPU, one superchip, one NVL72 rack, then thousands of racks linked by InfiniBand or Spectrum-X

2023 to 2026: Inference software and open models. TensorRT-LLM for fast LLM inference, Dynamo for spreading inference across GPUs, NIM containers for deployment, and the Nemotron 3 open models (December 2025) with a hybrid mixture-of-experts design and open training data. Reports put Nvidia's open-model commitment at roughly $26 billion over five years. Same playbook as cuDNN: make the best free software for your hardware.

Next: Nvidia says Vera Rubin is in production with partner systems from the second half of 2026, Rubin Ultra in 2027 and Feynman in 2028. Those are company plans, and details keep shifting.

Why the moat is software

AMD's MI-series GPUs, Google's TPUs, Amazon's Trainium and plenty of startups all post strong benchmark numbers. Raw FLOPS isn't the problem. Everything above the chip is.

The real Nvidia moat is a software stack: silicon, interconnect, the CUDA platform, CUDA-X libraries, inference software, frameworks and models

You feel this in one line of PyTorch:

import torch

device = "cuda" if torch.cuda.is_available() else "cpu"
model = torch.nn.Linear(1024, 1024).to(device)
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The device string is literally "cuda". A rival doesn't have to beat a chip. It has to make that line, and the millions of kernels, configs and tutorials behind it, work on day one.

How gaming paid for AI

Nvidia didn't pivot from gaming to AI. Gaming funded AI for about 15 years.

The flywheel: gamers buy GeForce cards, profits fund GPU R&D, CUDA makes every GPU programmable, researchers use cheap gaming GPUs, frameworks are built CUDA-first, AI labs buy data-center GPUs

  1. Gamers bought GeForce cards in the tens of millions.
  2. Those profits funded GPU R&D.
  3. CUDA turned every card into a programmable parallel computer.
  4. Researchers used cheap gaming GPUs, and AlexNet proved the approach.
  5. TensorFlow and PyTorch were built CUDA-first because that's where the researchers were.
  6. AI labs bought data-center GPUs by the rack, funding the next generation.
Fiscal year Total revenue Gaming Data center
FY2016 $5.0B $2.8B (56%) $0.34B (7%)
FY2023 $27.0B $9.1B (34%) $15.0B (56%)
FY2026 $215.9B $16.0B (7%) $193.7B (90%)

Source: Nvidia 10-K filings. Fiscal 2026 ended January 25, 2026.

Gaming didn't shrink. It grew 41% in fiscal 2026. Data center just grew far faster, and networking alone passed $31 billion.

Seven times Nvidia nearly failed

Nvidia's history looks like a straight line up only in hindsight. Early backer Mark Stevens has said that "between 1993 and 1997 we almost went bankrupt three times".

Seven times Nvidia nearly failed, from the NV1 in 1995 to US export controls in 2025 and 2026, and the decision that got it through each one

  1. 1995, NV1 flops. Huang asked Sega to drop Nvidia's console contract but turn the rest into an investment. That $5 million kept Nvidia alive.
  2. 1997, RIVA 128. Months of cash, an emulator instead of prototypes, and a hit.
  3. 2002 to 2003, Xbox. A pricing fight with Microsoft went to arbitration. The next Xbox went to ATI, and the Xbox had been 15% to 20% of sales.
  4. 2008, "bumpgate." A packaging flaw killed laptop GPUs. The stock fell 31% in a day, and Nvidia took a $196M charge.
  5. 2018, crypto hangover. Mining demand vanished and the stock fell 18.8% in a day.
  6. 2022, Arm deal dies. Regulatory opposition in the US, UK and EU sank the $40B deal. Nvidia took a $1.36B charge and built its own Arm CPU anyway.
  7. 2025 to 2026, China. Export rules shut Nvidia out of China's data centers, with a $4.5B H20 charge.

The pattern: cut losses on the committed path, keep investing in the next architecture.

I didn't build this list by hand. You can reproduce it two ways with Valyu. Install the SDK first: npm install valyu-js (or pip install valyu for Python).

Search returns ranked sources in seconds, for about $0.003 a call. Good for checking one fact:

import { Valyu } from "valyu-js";

const valyu = new Valyu(process.env.VALYU_API_KEY);

const res = await valyu.search(
  "NVIDIA near bankruptcy history NV1 Sega investment RIVA 128",
  { maxNumResults: 5 }
);

for (const r of res.results) {
  console.log(r.title, r.url);
}
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DeepResearch reads dozens of sources and writes the report for you. This list started as a Valyu DeepResearch report: one API call, 36 sources (SEC filings, Huang's interviews, news archives back to 2002), a cited report in under five minutes for about $0.16. I then checked every figure against its source:

import { Valyu } from "valyu-js";

const valyu = new Valyu(process.env.VALYU_API_KEY);

const task = await valyu.deepresearch.create({
  query:
    "Every time NVIDIA nearly failed, from its 1993 founding to 2026: " +
    "what happened, what decision saved it, and the outcome. Cite primary sources.",
  mode: "fast", // instant | fast | standard | heavy | max
});

const report = await valyu.deepresearch.wait(task.deepresearch_id);
console.log(report.output);  // markdown report with citations
console.log(report.sources); // every source it used
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Swap the company name and you have a post-mortem generator for any company you're curious about. You can get an API key here.

The Engineers behind the moat

Nvidia gets reduced to one person. These people built the parts developers touch:

  • Ian Buck created CUDA and now runs Nvidia's hyperscale and HPC business.
  • John Nickolls co-architected CUDA, including its software-managed shared memory, and co-wrote the 2008 paper "Scalable Parallel Programming with CUDA." He died in 2011, far less known than the platform he helped build.
  • David Kirk, chief scientist from 1997 to 2009, founded NVIDIA Research.
  • Bill Dally left the chair of Stanford's CS department to become chief scientist in 2009. Under him, research produced NVLink and RT cores. He recalls Huang first rejecting NVLink with "we don't do networking." He also had Bryan Catanzaro port Google Brain's cat-recognition network to GPUs, which by Dally's account "ran faster on 48 GPUs than on 16,000 CPUs." That code became cuDNN.
  • Chris Malachowsky, co-founder, led hardware engineering and is still at Nvidia as an NVIDIA Fellow.

Jensen and open source: 338 engineers, counted

On the day Huang resigned, TechCrunch wrote that the open-source community "just lost one of its strongest advocates." For a company that sells proprietary chips and a closed-source CUDA, that sounds odd. The record says otherwise.

What Huang did for open source

It's not pure idealism. More teams training and serving their own models means more GPUs sold, and less dependence on a handful of frontier labs that are now designing their own chips. Either way, the open ecosystem got a lot out of it. AI researcher Nathan Lambert put the worry bluntly: losing Huang as CEO would be "very very bad for the open model cause in the US." One Nvidia insider told TechCrunch they don't expect the leadership change to affect Nemotron development.

Counting the engineers

Press releases are one thing. Commits are better evidence. I cloned ten major open-source AI repos and counted distinct @nvidia.com addresses in each commit's author, Co-authored-by and Signed-off-by lines over the 12 months to November 13, 2026.

Nvidia engineers in open source: 338 engineers across 10 repos in 12 months, with 185 in vLLM, 96 in SGLang and 43 in PyTorch, and Nvidia contributions inside DeepSeek's DeepEP, DeepGEMM and FlashMLA

Project What it is Nvidia engineers (12 months) Commits with an Nvidia name
vLLM LLM serving 185 732
SGLang LLM serving 96 479
PyTorch Training framework 43 619
llama.cpp Local inference 20 289
JAX Google's ML framework 18 73
Transformers Hugging Face models 10 12
All 10 repos (incl. DeepSeek's) 338 2,200+

Treat this as a floor. Plenty of Nvidia engineers commit with personal or GitHub no-reply emails, which this method can't see. You can run it yourself on any repo:

git clone --filter=blob:none --no-checkout https://github.com/vllm-project/vllm
cd vllm
git log --since=2025-11-13 \
  --format='Author: <%ae>%n%(trailers:key=Co-authored-by,key=Signed-off-by)' \
  | grep -io '[a-z0-9._+-]*@nvidia\.com' | tr 'A-Z' 'a-z' | sort -u | wc -l
# 185
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The --filter=blob:none --no-checkout clone pulls commit history without file contents, so even PyTorch downloads in minutes.

Nvidia engineers inside DeepSeek's code

The most interesting commits aren't in Nvidia's repos. They're in DeepSeek's. DeepSeek open-sourced the low-level libraries behind its models, and Nvidia engineers have contributed to three of them (all-time counts):

  • DeepEP, the expert-parallel communication library for mixture-of-experts models: 10 Nvidia engineers. Their commits added CPU-assisted IBGDA networking support and support for upstream NVSHMEM packages, added the UE8M0 data format and documented a Hybrid-EP branch.
  • DeepGEMM, DeepSeek's FP8 matrix-multiply kernels: 2 Nvidia engineers, with fixes for Blackwell (SM100), NVRTC compilation, support back to CUDA 12.3 and prebuilt wheels.
  • FlashMLA, the multi-head latent attention kernels: 3 Nvidia engineers, with SM100 attention fixes and a fix for sequences longer than a million tokens.

DeepSeek's 3FS file system had no Nvidia commits.

Nvidia also works on the models themselves:

Research it yourself

Search, for quick sources:

from valyu import Valyu

valyu = Valyu()  # reads VALYU_API_KEY from the environment
res = valyu.search(
    "NVIDIA engineers contributions to DeepSeek DeepEP DeepGEMM open source",
    max_num_results=5,
)
for r in res.results:
    print(r.title, r.url)
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DeepResearch, for a cited write-up:

from valyu import Valyu

valyu = Valyu()

task = valyu.deepresearch.create(
    query=(
        "How have NVIDIA engineers contributed to open-source AI software and "
        "open-weight models, including PyTorch, vLLM, SGLang, llama.cpp and "
        "DeepSeek's DeepEP, DeepGEMM and FlashMLA? Cite commits, blog posts and releases."
    ),
    mode="fast",  # instant | fast | standard | heavy | max
)

report = valyu.deepresearch.wait(task.deepresearch_id)
print(report.output)   # markdown report with citations
print(report.sources)  # the sources it used
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Follow the money: who owns Nvidia, and who Nvidia owns

Huang never controlled Nvidia. He held 3.58% (870.6 million shares in the 2026 proxy), and Nvidia has no dual-class shares, so there were no super-voting rights like Zuckerberg has at Meta. BlackRock (8.0%) and Vanguard (about 8.5% across two entities) each own more than he does.

Who owns Nvidia: the top 10 holders by percentage of shares, with BlackRock and Vanguard each larger than Jensen Huang's 3.58%

The stock plan made engineers rich. Stacked yearly RSU grants plus a 15%-discount employee stock purchase plan, applied to a share price up roughly 200x since early 2016. One share bought at the 1999 IPO for $12 is now 480 shares, about $79,800. Turnover was 3.7% in fiscal 2026, which helps explain why the people who know CUDA's internals tend to stay.

And Nvidia owns a slice of your toolchain. Huang has no verified personal angel investments, but under him Nvidia joined about 260 startup funding rounds: 177 directly and 83 through its NVentures arm (Crunchbase, February 2026). That list includes the tools and models a lot of you use daily: Anysphere (Cursor), Mistral, OpenAI, Anthropic, xAI and more. Its check into OpenAI went from a reported $100M in October 2024 to $30B in February 2026.

Which companies Jensen Huang invested in: no verified personal angel deals, but 260 startup bets with Nvidia's money, grouped by sector with round stage and date

Research Nvidia yourself, with code

Everything above is checkable. Ownership is in SEC filings, and the inventions left a patent trail. Both are painful to dig through by hand, so here's how I did it with Valyu's Search API.

Find the patent behind Tensor Cores 

import { Valyu } from "valyu-js";

const valyu = new Valyu(process.env.VALYU_API_KEY);

const res = await valyu.search(
  "NVIDIA tensor core mixed precision matrix multiply accumulate",
  {
    includedSources: ["valyu/valyu-patents", "valyu/valyu-patents-epo"],
    maxNumResults: 5,
  }
);

for (const p of res.results) {
  console.log(p.title, p.metadata?.filing_date, p.url);
}
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The top hit is US 10,338,919, "Generalized acceleration of matrix multiply accumulate operations," assigned to NVIDIA, filed on November 29, 2017 and granted in July 2019. The same search surfaced two of its continuations, US 10,884,734 (granted 2021) and US 12,321,743 (granted 2025). The query cost $0.04. Try "NVLink", "unified shader architecture" or "transformer engine FP8" next.

Or have DeepResearch trace the whole patent family

Search finds the patents. DeepResearch reads them and explains how the claims evolved:

import { Valyu } from "valyu-js";

const valyu = new Valyu(process.env.VALYU_API_KEY);

const task = await valyu.deepresearch.create({
  query:
    "Trace NVIDIA's Tensor Core patent family: the original filing, " +
    "its continuations, what each one claims, and how the claims changed " +
    "over time. Cite each patent number.",
  mode: "fast", // instant | fast | standard | heavy | max
});

const report = await valyu.deepresearch.wait(task.deepresearch_id);
console.log(report.output);  // markdown report with citations
console.log(report.sources); // every source it used
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When I ran it, the report traced the whole chain: the 2017 original plus seven continuations granted between 2021 and 2025. Each one keeps the same title but narrows the claims, from a broad matrix multiply-accumulate method to specific processor designs and data types such as FP16 and signed or unsigned integers. That's how a company keeps one invention covered as its hardware changes.

Pull the ownership table from SEC filings 

from valyu import Valyu

valyu = Valyu()  # reads VALYU_API_KEY from the environment
filings = valyu.search(
    "NVIDIA proxy beneficial ownership table directors executive officers",
    included_sources=["valyu/valyu-sec-filings"],
    max_num_results=3,
)
for f in filings.results:
    print(f.title, f.url)
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That returns the "Security Ownership" section from Nvidia's last three proxy statements in one call, for $0.036. Put them side by side and you find something no single filing shows: Huang's stake fell from 934.6M split-adjusted shares (2024) to 922.9M (2025) to 870.6M (2026).

Tip: name the document type in your query ("proxy", "10-K", "8-K"). It matches the right section much more reliably. More in the query-writing guide.

Or let DeepResearch do the comparison 

from valyu import Valyu

valyu = Valyu()

task = valyu.deepresearch.create(
    query=(
        "Using NVIDIA's DEF 14A proxy statements, compare the beneficial ownership "
        "of directors and executive officers across the last three years. "
        "Show how Jensen Huang's stake changed and cite each filing."
    ),
    mode="fast",  # instant | fast | standard | heavy | max
)

report = valyu.deepresearch.wait(task.deepresearch_id)
print(report.output)   # markdown report with citations
print(report.sources)  # the sources it used
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If you'd rather click than code, the same searches run on the Valyu platform.

What changes for developers

This week: nothing. CUDA, the libraries and the Nemotron models keep shipping. The board says the roadmap continues, and Vera Rubin is already in production. Chip roadmaps are set years ahead.

Over the next year, watch three things:

  1. Who the next CEO is. Huang made the CUDA bet, the Mellanox bet and the open-model bet, each years before it paid off. An operator CEO might protect margins instead of making the next ten-year bet.
  2. Whether senior engineers stay. Unvested stock ties a lot of people to Nvidia, and their grants now ride on a new strategy. The engineers behind CUDA and the libraries are the real moat.
  3. How hard buyers hedge. AMD and Broadcom rose on the news. Google TPUs, Amazon Trainium and custom accelerators already exist, and a leadership gap gives big buyers another reason to make their code portable.

The bottom line: the moat in this story was built by thousands of engineers over 20 years. It's in PTX, cuDNN, NCCL and six million developers' muscle memory, and it doesn't resign with the CEO. The open question is whether Nvidia can keep placing the next decade-long bet without the person who placed all the previous ones.

Not investment advice.

FAQ

What did Nvidia invent?
The biggest inventions: the GeForce 256, which Nvidia marketed as the first GPU (1999); programmable shaders in GeForce 3 (2001); CUDA (2006); NVLink and the DGX system (2016); Tensor Cores (2017); RT cores and DLSS (2018); Multi-Instance GPU (2020); the Transformer Engine with FP8 (2022); and the GB200 NVL72 rack-scale system (2024). Through Mellanox it also became the leading InfiniBand supplier.

What is CUDA, and why is it so hard to replace?
CUDA is Nvidia's platform for running general-purpose code on GPUs, introduced in 2006. You write code for one thread and the GPU runs it across thousands. It's hard to replace because two decades of libraries (cuBLAS, cuDNN, NCCL), tools, framework backends and about 6 million developers are built on it.

Who created CUDA?
Ian Buck created CUDA after joining Nvidia in 2004, building on Brook, the GPU language from his Stanford PhD. John Nickolls co-architected it. Nvidia announced CUDA with the GeForce 8800 (G80) in November 2006, and the first public release followed in 2007.

Does Nvidia make gaming CPUs?
No. GeForce cards are GPUs. The CPU in a gaming PC usually comes from Intel or AMD. Nvidia does make data-center CPUs, Grace and its successor Vera, designed to work alongside its GPUs.

Did Jensen Huang support open source?
Yes, strongly. Under Huang, Nvidia open-sourced its Linux GPU kernel modules (2022), released more than 1,000 open-source projects and 500+ open models, praised DeepSeek-R1's open release, and agreed to buy Hugging Face for $12.93 billion in September 2026. In 2026 he co-wrote an industry letter urging Washington not to over-restrict open-weight models.

How many Nvidia engineers contribute to open source?
At least 338 distinct @nvidia.com engineers appear in the commit history of ten major open-source AI repos (vLLM, SGLang, PyTorch, llama.cpp, JAX, Transformers and DeepSeek's DeepEP, DeepGEMM, FlashMLA and 3FS) between November 13, 2025 and November 13, 2026. That is a floor, because engineers who commit with personal emails are not counted.

Do Nvidia engineers contribute to DeepSeek?
Yes. Nvidia engineers have commits in DeepSeek's open-source DeepEP (10 engineers), DeepGEMM (2) and FlashMLA (3) repositories, covering networking, Blackwell support and build fixes. Nvidia also publishes FP4 DeepSeek-R1 checkpoints, shipped day-0 Blackwell support for DeepSeek V4, and distilled DeepSeek-R1-0528 into its OpenReasoning-Nemotron models.

Why did Jensen Huang resign?
Nvidia's announcement gives no reason. Press reports link the exit to a board review of his personal conduct, and Nvidia has not confirmed them.

Who is Nvidia's CEO now?
Colette Kress, CFO since 2013, is interim CEO and remains CFO. The board is searching for a permanent CEO. Harvey C. Jones is the first board chair.

Does this affect CUDA or PyTorch?
Not in the short term. CUDA, its libraries and framework support keep shipping, and the product roadmap is set years ahead. The longer-term questions are leadership, engineer retention and how fast buyers diversify to other chips.

Over to you: have you tried moving a real workload off CUDA, to ROCm, TPUs, Trainium or anything else? What broke first? Tell me in the comments.

A longer version of this post, with the full shareholder table, the board and the employee wealth breakdown, is on Medium.

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