DEV Community

Ahmed Nabit
Ahmed Nabit

Posted on

Navigation FPGA

System Purpose
This FPGA firmware implements a complete Navigation and Solar Position subsystem for an AESA radar platform. It integrates three independent sensor pipelines into a unified data bus:

Pipeline Sensor Interface Primary Output
GNSS u-blox ZED-F9P SPI (UBX protocol) Position, velocity, UTC time, PPS
IMU Xsens MTi-630 CAN 2.0B 1 Mbit/s Attitude, inertial data, SDI, HR data
SPA Computed Internal Solar azimuth, elevation, zenith
The system also provides:

GPS-disciplined 1 Hz PPS output with IEEE 802.1AS / TSN timestamping
Full NREL Solar Position Algorithm (SPA) including sunrise/sunset/transit/EoT
Target device: Xilinx UltraScale KU040, 200 MHz clock.

Top comments (0)