A superconducting quantum computer is mostly not a quantum computer. Around the qubit chip sits a dilution refrigerator, and through that refrigerator run hundreds of coaxial cables, each carrying a microwave signal from room-temperature electronics down to a device sitting at 10 millikelvin. The cables are not a detail. They are the dominant cost, the dominant failure mode, and the reason scaling from 100 qubits to 1,000 is not simply a matter of making a bigger chip.
The industry's answer is cryogenic CMOS: build the control electronics out of transistors that work at 4 kelvin, and put them inside the fridge. It is elegant, it is hard, and it changes the economics in a way that is easy to state and difficult to believe.
Part One: The wiring tax, in numbers
Each superconducting qubit needs two to three control lines for the current generation of tunable-coupler architectures, plus readout. A 100-qubit system therefore runs 300 to 500 coax lines. Each line needs attenuators at multiple temperature stages, a filter, and a connector, and each one terminates in a rack instrument at room temperature: an arbitrary waveform generator, a digitiser, or both.
The bill is roughly $8,000 to $15,000 per line once you count the instrument, the cable, the attenuators and the rack space. At 400 lines that is $3.2 to $6 million of control hardware for a 100-qubit machine, which is comparable to the cost of the fridge itself and often larger than the cost of the quantum chip.
Then there is the thermal load. Every coax cable conducts heat from 300 K to 4 K. A well-designed line carries 30 to 60 microwatts into the 4 K stage. At 400 lines that is 12 to 24 milliwatts, and a typical dilution refrigerator has 1 to 2 milliwatts of cooling power at 100 millikelvin and a few hundred milliwatts at 4 K. Cabling, not qubit coherence, is the first thing that runs out when you try to scale a superconducting machine.
Part Two: What cryo-CMOS buys
Cryogenic CMOS moves the last stage of the signal chain inside the fridge. Instead of a room-temperature instrument generating a microwave tone, a small CMOS chip at 4 K generates it, driven by a digital baseband signal over a handful of wires.
The gain is in wire count. A multiplexing scheme can drive 32 to 64 qubits from one cryo-CMOS chip with a single digital link. A 1,000-qubit machine that would need 3,000 coax lines drops to roughly 50 to 100. The instrument bill falls by an order of magnitude, the thermal load falls with it, and the rack footprint collapses from several cabinets to one.
The costs are real. CMOS at 4 K behaves badly: threshold voltages shift, noise increases, and the models that circuit designers rely on are calibrated at 300 K. Power dissipation per transistor must be kept in the nanowatt range, which forces simple architectures. And a chip at 4 K that fails cannot be swapped without warming the whole fridge, which turns a five-minute repair into a three-day one.
There is also a yield problem that gets less attention. Cryo-CMOS parts are not a standard product line. You are designing custom silicon with a small number of tape-outs, and every design iteration costs a year and several million dollars.
Part Three: The competing path, and why it might win
Not everyone agrees that the electronics should go cold. Two alternatives are gaining ground.
The first is photonic interconnects. Convert the control signal to light, run it down a fibre, and convert back at the cold stage. Fibres carry almost no heat compared with coax, so the thermal argument disappears, and one fibre can carry many channels through wavelength division. The cost moves to the electro-optic modulators, which currently do not work well at 4 K either.
The second is a different qubit. Trapped ions and neutral atoms are addressed with lasers, which are already optical and already room-temperature. Photonic qubits need almost no control wiring at all. If any of these architectures reaches fault tolerance first, the entire cryo-CMOS investment becomes a detour.
This is the strategic risk that makes the cryo-CMOS bet uncomfortable: it is a large, specialised capital investment that only pays off if superconducting qubits remain the dominant modality. Cryo-CMOS is not a bet on electronics, it is a bet that the qubit stays the same, and that is the least certain assumption in the whole programme.
Part Four: The economics by 2031
Assume superconducting machines reach 1,000 physical qubits with error correction overhead of 100 to 300 physical qubits per logical qubit. That means 3 to 10 logical qubits per machine, enough for chemistry simulation and some optimisation, not enough for cryptography.
At 1,000 qubits, room-temperature control costs $6 to $12 million per machine in electronics alone. Cryo-CMOS brings that to $1.5 to $3 million, with a higher non-recurring engineering cost that amortises across units. For a research lab buying one machine, room temperature is rational. For a vendor shipping twenty, cryo-CMOS is the only path to a manufacturable product.
My estimate: by 2031, 60% to 70% of new superconducting systems above 500 qubits ship with some cryogenic control, and the cryo-CMOS component market reaches $1.5 to $2.5 billion. The quantum computing market overall reaches $8 to $14 billion in hardware revenue, still small compared with the $400 billion memory market, but growing at 35% to 45% a year.
The daily-life angle
Quantum computing's near-term practical impact is not codebreaking, it is chemistry and materials: nitrogen fixation for fertiliser, battery electrolyte design, catalyst discovery. Those are unglamorous problems with enormous downstream effects. A fertiliser process that runs at room temperature instead of 500 degrees and 200 atmospheres would change the economics of food production for a large part of the world.
Getting there requires machines that cost millions, not billions, and the control electronics are a large part of that difference. The wiring tax is, quite literally, a tax on the pace of materials discovery.
The transferable lesson
In every scaling problem there is a component that does not scale with the thing you are trying to scale. For quantum computers it is the cable. For early GPUs it was the PCIe bus. For distributed databases it was the clock.
The engineering instinct is to optimise the component everyone is measuring, which in this case is qubit count and coherence time. The value is almost always in the component nobody puts on the slide, because that is where the ceiling actually is. Find the cable in your system, because the cable is what you will spend the next three years fighting.
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