Limitations of the Von Neumann Architecture and the Rise of Neuromorphic Semiconductors
Through previous electronic circuit research, it was confirmed that the current control mechanism of BJTs and the voltage control mechanism of MOSFETs serve as the foundation of modern digital circuits.
However, current computing architectures are based on the 'Von Neumann architecture,' where the CPU, responsible for data computation, and the memory device, which stores data, are physically separated. In this architecture, data must continuously move between the computation unit and memory, causing significant time delays and power consumption—a phenomenon known as the 'Von Neumann Bottleneck.'
To overcome these limitations, neuromorphic computing—which mimics the structure of the human brain to process computation and memory simultaneously within a single device—and its core component, the synaptic transistor, have emerged as essential research subjects.
Physical and Functional Differences Between Conventional MOSFET and Synaptic Transistors
The BJT and MOSFET covered in previous studies are key switching devices that make up modern digital logic circuits.
In particular, the MOSFET is a voltage-driven device that controls the channel current (I_D) through the gate voltage (V_GS), offering the advantages of fast switching speeds and high integration density.
However, from the perspective of neuromorphic computing, conventional MOSFETs possess the following critical limitations, prompting the design of the synaptic transistor structure to overcome them.
Volatility and Lack of Memory Retention : In a typical MOSFET, an inversion layer channel is formed under the oxide layer (SiO_2) to allow current flow only when a gate voltage is applied.
When the gate voltage drops below the threshold voltage, the channel dissipates immediately (volatility).
In contrast, a synaptic transistor introduces special charge-storing materials, such as ferroelectrics or ion-gels, into the gate dielectric.
As a result, the material's polarization or ion migration state is maintained even after the external pulse stimulus ends, granting it the characteristic of 'non-volatile analog memory' that permanently remembers the altered channel conductance.
Integration of Computation and Memory (In-Memory Computing) : In conventional MOSFET-based circuits, the transistors responsible for logic and the capacitors or transistors that store memory must be physically separated.
However, a synaptic transistor can process input signals (computation) while simultaneously storing their weights in the form of channel conductance (memory) within a single device entity, demonstrating a structural difference that fundamentally resolves the Von Neumann bottleneck.
Necessity and Expected Effects of Synaptic Transistors
Why did recent studies choose the synaptic transistor?
Our brain performs complex cognitive operations with a low power consumption of about 20W.
This is because memory and computation occur simultaneously within a network of synapses.
The reasons why synaptic transistors are necessary are as follows : Maximizing Energy Efficiency (In-Memory Computing): Because it memorizes weights and computes within the device without moving data, it can drastically reduce the power consumed by unnecessary data transfers.
Massive Parallelism : Going beyond digital 0 and 1 logic operations, it can process vast amounts of information simultaneously through analog conductance changes, dramatically increasing the speed of artificial intelligence learning.
Technical Differences from Conventional RC Leaky Integrator Circuits
The biggest difference between the RC leaky integrator circuit, commonly used to simulate synaptic behavior, and the synaptic transistor implemented in this study lies in 'memory persistence.‘
RC Leaky Integrator Circuit (Volatile) : An RC circuit receives input pulses, accumulates (integrates) voltage in a capacitor, and gradually leaks it through a resistor.
While suitable for mimicking short-term plasticity (STP) behavior, it is a volatile device that eventually returns to 0V when the stimulus disappears. Therefore, implementing long-term potentiation (LTP) is impossible.
Synaptic Transistor (Non-volatile) : In a synaptic transistor, the internal physical state of the device (channel conductance) changes when an external stimulus (pulse) is applied, and this state is permanently maintained even after the stimulus is removed.
In other words, the decisive difference is its ability to store 'long-term memory' as an analog physical quantity, which an RC circuit cannot achieve.
Implementation and Troubleshooting via LTspice Behavioral Modeling
overcome the environmental constraints that make fabricating actual synaptic devices difficult, this study applied a 'behavioral modeling' technique that mathematically defines the physical and electrical behavior of the device.
The initial design strategy was to formulate the input/output characteristics of the synaptic transistor using LTspice's non-linear dependent source (B-source), with the following specific conditions
Weight Memory Block : The condition I=if(V(gate)>1,1u,0) was applied to design the circuit so that charge accumulates in a virtual node (capacitor) only when a gate pulse exceeding a specific threshold is applied.
Channel Current Control Block : The formula I=V(weight)V(drain})*1m was applied to link the accumulated weight voltage to determine the conductance of the actual channel current.
Based on the above design method, an initial simulation was attempted; however, as shown in [Photo 1] below, it was confirmed that an error occurred instead of yielding normal results.
Troubleshooting 1 : Overcoming the Floating Node Error
Upon analyzing the error message, it was determined that this was a systemic issue (Floating Node) caused by the SPICE program's inability to calculate the initial operating point of the node due to the direct current (DC) blocking characteristic of the capacitor.
To solve this, a virtual parallel leakage resistor with an extremely large value sufficiently high so as not to affect physical operation (memory retention) was added to the capacitor.
This provided the minimum DC path required by the simulator, thereby bypassing the mathematical error.
Troubleshooting 2: Overcoming Charge Accumulation Direction Mismatch (LTD Behavior)
After resolving the error, the simulation was resumed, but an additional problem was discovered: the weight descended downwards instead of forming the ascending step-like waveform that serves as evidence of long-term potentiation (LTP).
A re-examination of the circuit revealed that the dependent current source component used in the design was pointing toward ground (GND), meaning that when a pulse was applied, it was discharging the node rather than charging it.
To correct this, a negative sign was added to the formula in the weight memory block, modifying it to I=if(V(gate})>1,-1u,0).
By reversing the flow of current to induce normal charge accumulation, the intended synaptic behavior waveform where the channel current rises in steps in response to pulse stimuli and maintains its state was successfully derived, as shown in [Photo 2] below.
**Future Applications and Conclusion*
The synaptic transistor model implemented through this study can be applied to the following fields
Edge AI Devices : Ultra-low-power artificial intelligence that learns and infers in real time on smartphones or wearable devices without passing through a data center.
Intelligent Sensor Systems : Self-learning sensor nodes that evaluate anomalous signs on their own by accumulating and learning analog data from sensors in real time, applicable in fields such as the 'fire prediction system' explored in previous research topics.
Implantable Medical Chips : Artificial neural circuits that react to or correct neurotransmitter imbalances by analyzing biosignals in real time.
In conclusion, this study has proven that the core characteristics of next-generation neuromorphic devices can be successfully verified through behavioral modeling techniques, even in environments lacking physical semiconductor fabrication infrastructure.
This will serve as a highly powerful tool as a preliminary verification platform for the design of complex analog-neuromorphic circuits in the future.
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