Memory Mapped IO (MMIO)

Introduction

Memory-Mapped I/O (MMIO) is an address-mapping technique where device registers are assigned fixed ranges in the system’s physical address map. When the CPU issues a load or store to these regions, the transaction is routed to a hardware block instead of DRAM. There are no special instructions involved; ordinary load/store operations form the entire I/O protocol.

VA to PA Conversion

The CPU always issues virtual addresses (VAs). Before transactions reach the interconnect, the Memory Management Unit (MMU) translates VAs into physical addresses (PAs). The MMU uses a Translation Lookaside Buffer (TLB) for cached translations and performs a page-table walk on TLB misses.

MMIO Regions

MMIO regions occupy fixed physical address ranges defined by the SoC. Linux receives the physical MMIO layout from the Device Tree (DT), reserves the corresponding regions, and builds virtual mappings with device-type memory attributes.

+-----------------------------------------+
|   SoC Physical Address Map              |
+-----------------------------------------+
| 0x0000_0000 - 0x0FFF_FFFF : DDR         |
| 0x1000_0000 - 0x1000_0FFF : UART MMIO   |
| 0x1234_0000 - 0x1234_0FFF : Device MMIO |
| ...                                     |
+-----------------------------------------+

Load and Store Operations

A CPU MMIO access follows the same initial path as a normal load or store: instruction issue → VA → MMU translation → PA. After translation, the PA is emitted onto the SoC interconnect. The interconnect decodes the PA and routes the access to the MMIO peripheral instead of DDR.