FSIMX STUDIO - Wave: Drag-and-Drop Signals and Trace a Driver to its Source File

Debug RTL Faster: Trace a Wrong Signal Value Back to Its Source

A waveform tells you what happened.

The real debugging challenge is finding why it happened and identifying the RTL statement that produced the unexpected value.

That is the workflow behind vWIZ-Wave, part of WIOWIZ FSiMX Studio.

Focus on the Relevant Signals

Load a VCD or FST dump, browse the design hierarchy, and drag the required signals directly onto waveform lanes.

Engineers can quickly:

• Add multiple signals using drag and drop
• Reorder or group waveform lanes
• Zoom into individual clock edges
• Measure timing using A/B cursors
• Remove signals that are no longer relevant

This keeps the waveform focused on the current debugging question instead of displaying unnecessary design activity.

Move from Waveform to RTL

When a signal contains an unexpected value, vWIZ-Wave can trace its driver back to the corresponding RTL source statement.

The waveform, source view, and schematic share the same time cursor. This connects:

• The suspicious signal value
• The logic that drove it
• Inline RTL values at that exact moment
• The surrounding schematic and fan-in path
• The earlier capture edge for registered logic

For RISC-V processor debugging, the same cross-probing workflow links the program counter, instruction trace, waveform cycle, and source logic.

Instead of searching through signal names and source files manually, engineers can move directly from the failing value to the logic behind it.

A value on the waveform is the question. The source statement that drove it is the answer.

Want to see the complete MiniSoC demonstration and driver-tracing workflow?

👉 Read the full article on WIOWIZ

verification #rtl #riscv #semiconductor