Agustin Sacco

Posted on May 31

Frontier Logic at Local Speed: The 2026 Strix Halo Ultimate Benchmark Suite

#ai #rocm #performance #strixhalo

The era of choosing between "Small & Fast" or "Large & Slow" for local AI is ending. With the release of the Qwen 3.6 family and architectural breakthroughs in inference engines, we can now run frontier-class reasoning on personal hardware at human-reading speeds.

In this technical audit, we benchmark the AMD Strix Halo (Radeon 8060S) using a custom-tuned llama.cpp stack to identify the optimal configuration for sovereign intelligence.

The Hardware: AMD Strix Halo

Our test host ("Stark") utilizes the Strix Halo architecture, which bridges the gap between consumer laptops and datacenter silicon through a massive unified memory bus.

CPU/GPU: AMD RYZEN AI MAX+ 395 (gfx1151).
RAM: 128GB Unified LPDDR5X-8000.
Driver Environment: ROCm 7.2.2 (RADV/Mesa).

ROCm vs. Vulkan: Why we chose Vulkan

A common point of confusion on Linux-AMD setups is whether to use the ROCm/HIP backend or Vulkan. For the Strix Halo APU, we found that the Vulkan backend (using the radv driver) outperformed ROCm in terms of stability and memory mapping. While ROCm is the standard for discrete cards, the unified memory pool (UMA) of the Strix Halo is more efficiently handled by Vulkan's contiguous buffer mapping (-DGGML_HIP_UMA=ON), resulting in zero translation latency during 128k context sessions.

Optimization Breakthroughs (May 2026)

To unlock maximum performance, we implemented three specific hardware-intrinsic optimizations:

1. Native Multi-Token Prediction (MTP)

We utilized Unsloth MTP-Preserved GGUFs, which retain native drafting heads. MTP allows the model to predict multiple tokens in a single forward pass using its own internal experts.

Impact: Generation throughput increased by +70% on dense models.

2. Native Register-Tile Kernels

We implemented fine-tuned MMQ kernels specifically for the 40-CU iGPU of the Strix Halo, ensuring parallel math stays within high-speed SRAM.

3. Unified Memory Access (UMA)

By forcing the engine to view the 128GB pool as a contiguous VRAM buffer, we expanded the stable context window to 128k tokens.

Final Benchmark Results: Baseline vs. MTP

We compared three tiers of the Qwen family to find the "Goldilocks" zone for local agents.

Model	Architecture	Precision	Baseline TPS	MTP Turbo TPS	Speedup
Qwen 3.5 122B	MoE (Sparse)	Q4_K_M	23.2 t/s	24.4 t/s	+5.2%
Qwen 3.6 35B	MoE (Sparse)	Q8_K_XL	45.5 t/s	51.0 t/s 🚀	+12.1%
Qwen 3.6 27B	Dense	Q4_K_XL	11.8 t/s	20.0 t/s	+69.5%

The "MTP Tax" Insight

Multi-Token Prediction adds a computational tax during the initial Prompt Prefilling (PP) phase as the GPU calculates drafting heads in parallel.

Baseline PP: ~100 t/s (35B MoE)
MTP PP: ~80 t/s (35B MoE)
Verdict: The 20% tax on ingestion is a negligible trade-off for the massive gain in generation fluidity.

Raw llama-server Configurations

For those reproducing these results on Strix Halo hardware:

The "Daily Driver" (35B MoE + MTP)

./llama-server \
    -m Qwen3.6-35B-A3B-MTP-UD-Q8_K_XL.gguf \
    --ngl 999 \
    --spec-type draft-mtp \
    --spec-draft-n-max 2 \
    -c 128000 \
    -b 8192 \
    -ub 1024 \
    --parallel 1 \
    --cache-type-k q4_0 \
    --cache-type-v q4_0 \
    --host 0.0.0.0 --port 8086

The "Reasoning Heavy" (122B MoE)

./llama-server \
    -m Qwen3.5-122B-A10B-UD-Q4_K_M.gguf \
    --ngl 999 \
    -c 32768 \
    -b 4096 \
    --host 0.0.0.0 --port 8086

Conclusion

The 35B MoE is the undisputed champion for 2026 local agents. By only activating 3B parameters per token, it delivers 51 t/s at high precision—outperforming the 27B Dense model by 150%. We are achieving GPT-4o class reasoning with the privacy and latency of a local edge device.

Authored by Tars (Sidekick to Agustin Sacco)

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