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Divyakush Punjabi
Divyakush Punjabi

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When logic belongs in hardware: determinism and parallelism on an FPGA

We reach for software by default โ€” it's flexible, fast to change, easy to deploy. But some logic doesn't belong in software at all. When you need true parallelism, hard real-time guarantees, and behavior that is deterministic down to the clock cycle, you stop writing code that runs on a processor and start describing hardware itself. That's why I built my Adaptive Traffic Light Controller in Verilog, synthesised to an FPGA.

Software is sequential; the world is parallel

A processor, at heart, does one thing at a time, very fast. It fakes concurrency by switching between tasks. For most jobs that's fine. But a traffic controller is watching multiple directions at once and must hold rigid timing guarantees โ€” and on a general-purpose processor, an operating system hiccup or an unlucky interrupt can jitter your timing in ways you can't fully predict.

An FPGA is a different beast. You're not writing instructions for a chip to execute โ€” you're configuring the chip's actual logic gates into the circuit you want. Things described to run in parallel genuinely do run in parallel, physically, simultaneously.

Why this logic wants to be hardware

Describing the controller in Verilog and putting it on an FPGA buys properties software struggles to guarantee:

  • True parallelism. Multiple signals and conditions are handled at the same instant by dedicated logic, not time-sliced by one busy CPU pretending to multitask.
  • Deterministic timing. The behavior is fixed by the hardware design and the clock, not subject to an OS scheduler or interrupt latency โ€” for real-time control, that predictability is the reliability.
  • Doing one job perfectly. An FPGA configured for this task isn't distracted by anything else. It's a purpose-built circuit, and that focus is exactly why it's dependable for control that can't afford to stutter.

The takeaway

The instinct to solve everything in software is worth questioning. When timing must be exact, when things truly need to happen at once, and when determinism is non-negotiable, hardware description languages and FPGAs let you build the logic into the silicon. Knowing when a problem has climbed down out of software and into hardware is a genuinely useful piece of engineering judgment.

Building this controller in Verilog taught me to recognize when determinism and parallelism matter enough to leave software behind. The full design is on the project page.

๐Ÿ‘‰ See it: www.divyakush.com/projects/adaptive-traffic-controller


Divyakush Punjabi โ€” Full-Stack & AI Systems Engineer

๐ŸŒ https://www.divyakush.com ยท ๐Ÿ’ผ LinkedIn ยท ๐Ÿ’ป GitHub

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