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WIOWIZ SOCVP - Compose. Boot. Repeat.

#riscv #semiconductor #soc #embeded

Compose. Boot. Repeat: Building a RISC-V SoC Without Local Toolchain Setup

What if exploring a new SoC configuration started with choosing the blocks—not installing and configuring tools?

Traditional SoC bring-up often begins with environment preparation:

  • Install a compiler and linker
  • Configure the build system
  • Define the memory map
  • Create register headers
  • Prepare firmware
  • Connect everything to a simulation environment

With WIOWIZ socvp, the workflow begins by selecting the components required for the system.

Compose the SoC

A project can be created from available memory, peripherals, interrupt controllers and accelerators:

bin/socvp new my-soc \
  -blocks ram,uart0,clint,timer0,plic0,npu0,cnn0
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The generated output is not simply a diagram or an empty folder.

It includes:

my-soc/
├── socvp-project.yaml
├── firmware/
├── generated register headers
├── build files
└── output directories
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Creating a WIOWIZ SoC project with generated firmware, register headers and build files

The selected catalogue blocks become a structured project that is ready to build.

The versioned SoC contract records the selected blocks, while generated headers keep the firmware’s register names and addresses aligned with the project configuration.

Build with the packaged toolchain

The compiler and linker are included inside the socvp package.

bin/socvp build my-soc
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The build does not depend on a separately installed host compiler. This makes the environment more portable and helps different machines build against the same fixed toolchain.

Boot the composed system

The resulting project can be booted using the same workflow as the packaged systems:

bin/socvp boot my-soc
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The objective is not merely to generate an architecture. The composed project must execute firmware and produce a checked result.

Modify and repeat

Engineers can update the generated firmware, rebuild the project and inspect it in Studio:

bin/socvp build my-soc
bin/socvp studio my-soc
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This creates a compact exploration loop:

Choose blocks
     ↓
Generate project
     ↓
Build firmware
     ↓
Boot and check
     ↓
Modify and repeat
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The takeaway

A composition tool should deliver more than a block diagram.

It should turn selected components into a firmware project that can be built, booted and evaluated—without making the first experiment wait for a lengthy host setup.

👉 Explore the complete “Compose. Boot. Repeat.” workflow on WIOWIZ

#riscv #semiconductor #soc #embedded

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