HDI PCB pricing is opaque because manufacturers rarely explain WHY each sequential lamination cycle adds 40-60% to cost. Here's the actual breakdown.
The 30-Second Decision
| HDI Type | Typical Cost vs Standard ML | Best For | Avoid When |
|---|---|---|---|
| 1+N+1 (staggered) | 1.8-2.2x | Standard BGA breakout | Density fits on standard vias |
| 1+N+1 (stacked, filled) | 2.0-2.5x | Via-in-pad for fine-pitch BGA | Staggered would work |
| 2+N+2 | 2.5-3.5x | 0.4-0.5mm pitch BGA, high-speed memory | Can redesign with creative routing |
| 3+N+3 | 3.5-5.0x | 0.3mm pitch, extreme density | Consider any-layer instead |
| Any-layer (ELIC) | 4.0-6.0x | Maximum density, all-layer connectivity | Low via density (sequential cheaper) |
Why Each Lamination Cycle Costs What It Does
The pricing of HDI PCBs mystifies many hardware engineers because cost scaling isn't proportional to material addition. Adding two thin buildup layers (which add perhaps $2-3 in raw material to a 100x100mm board) somehow increases price by $50-150 per piece.
Each sequential lamination cycle requires five distinct process steps:
- Laser via drilling — separate program, separate pass per buildup layer
- Desmear/seed — preparing blind via walls for plating
- Electrolytic copper fill — plating the vias (slower than standard flash)
- Surface preparation — oxide treatment for next lamination
- Precision alignment lamination — with registration verification
A standard 8-layer through-hole board goes through ONE lamination cycle, ONE drilling pass, and ONE plating sequence. An 8-layer 2+N+2 HDI board requires FIVE lamination cycles, THREE drilling passes, and THREE plating sequences. Raw processing time is approximately 3.2x longer.
Sequential Lamination Cost Breakdown
Laser Drilling (25-35% of cycle cost): At typical volumes (100-500 pieces), laser drilling costs $0.002-0.005 per via. A moderately complex HDI layer with 2000-5000 microvias adds $4-25 in laser drilling per piece. This scales linearly with via count — so optimizing via count directly reduces cost.
Copper Fill/Plating (20-25%): Filled microvias require specialized chemistry with tighter process windows. Staggered microvias requiring only flash plating cost approximately 40% less for this step.
Lamination Alignment (15-20%): Each sequential lamination must register within ±25 microns (±15 for advanced HDI). Accuracy degrades with each additional cycle.
Yield Loss Allocation (15-20%): Each cycle introduces new defect opportunities. Typical yield per cycle: 95-97%. Compounded: 1+N+1 = 90-94%, 2+N+2 = 86-91%, 3+N+3 = 81-88%. The manufacturer prices boards to account for expected scrap.
Inspection/Testing (10-15%): Each completed cycle requires AOI and sometimes X-ray before proceeding — you can't rework a bad microvia after the next layer is laminated on top.
Any-Layer HDI: When Fixed Process Wins on Economics
Any-layer (ELIC) takes a counter-intuitive approach: instead of building outward from a core, it builds ALL layers sequentially using the same standardized process flow. This sounds more expensive — and for simple designs, it is.
But at 3+N+3 complexity and above, any-layer achieves cost parity because:
- Same laser drilling program for every layer
- Same plating recipe and lamination parameters
- No mixing mechanical drills with laser vias
- Better yield from process consistency
The crossover point: approximately 25-30 microvias per square centimeter when comparing against 3+N+3 sequential. Below this density, sequential is cheaper. Above it, any-layer's yield advantage wins.
For smartphone-class designs (0.3mm pitch BGA, 50+ microvias/cm2), any-layer is definitively cheaper. For industrial HDI (0.5mm pitch, 10-15 microvias/cm2), sequential 1+N+1 or 2+N+2 remains cost-optimal.
Cost Optimization Strategies That Actually Work
Approximately 30-40% of boards specified as 2+N+2 can be redesigned as 1+N+1 — saving 30-40% on PCB cost:
1. Route on core layers aggressively. Core layers use cheap through-hole vias. Every signal routed there reduces microvia count and potentially reduces buildup complexity.
2. Use staggered instead of stacked microvias where possible. Staggered needs only flash plating (40% cheaper per via) but uses more pad area. For 0.5mm+ pitch BGAs, staggered delivers same connectivity at lower cost.
3. Evaluate whether HDI is actually required. Many designs can use mechanical blind vias (0.15mm min) combined with via-in-pad on standard sequential multilayer — 30-50% less than laser-drilled HDI.
4. Consolidate HDI to one side. Asymmetric builds (2+N+0 instead of 1+N+1) save one complete lamination cycle.
2026 Pricing Reality: What HDI Actually Costs
Approximate per-piece costs for 100x100mm, 10-layer total:
| HDI Type | 10 pieces | 100 pieces | 1000 pieces |
|---|---|---|---|
| Standard 10L (through-hole) | $45-65 | $18-28 | $8-12 |
| 10L, 1+N+1 staggered | $85-120 | $35-55 | $15-22 |
| 10L, 1+N+1 stacked/filled | $100-150 | $42-65 | $18-28 |
| 10L, 2+N+2 | $160-240 | $65-100 | $28-42 |
| 10L, 3+N+3 | $250-380 | $100-160 | $42-65 |
| 10L, any-layer | $300-450 | $120-180 | $48-72 |
NRE (tooling, laser programming, first-article) is $200-500 regardless of quantity — which is why per-piece cost drops dramatically from 10 to 100 pieces.
Lead time scales similarly: standard 10L = 10-12 days; 1+N+1 adds 3-5 days; 2+N+2 adds 5-8 days; 3+N+3 adds 8-12 days.
Written by the AtlasPCB Engineering Team. We build HDI PCBs up to 5+N+5 with stacked microvias and via-in-pad — and we'll tell you if your design can use a simpler, cheaper buildup.
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