A D-type flip-flop is one of the simplest memory elements in digital electronics. It captures one bit of data on a clock edge and keeps that value until the next valid clock event.
In this beginner-friendly project, we will build a breadboard circuit using the 74F74D dual D-type flip-flop. Two switches will control the data inputs, two push buttons will generate clock pulses, and two LEDs will display the stored output states.
By completing this project, you will learn how clocked data storage works and how two independent flip-flops can operate inside a single IC.
Difficulty: Beginner
Build time: About 30 minutes
Tags: #electronics #beginners #hardware #digital
What Is the 74F74D?
The 74F74D contains two independent, positive-edge-triggered D-type flip-flops. Each flip-flop has:
A data input: D
A clock input: CLK
A normal output: Q
A complementary output: /Q
An asynchronous preset input: /PRE
An asynchronous clear input: /CLR
When both /PRE and /CLR are high, the value present at D is transferred to Q when the clock changes from low to high.
The asynchronous inputs work independently of the clock:
Pulling /PRE low forces Q high.
Pulling /CLR low forces Q low.
Pulling both low at the same time must be avoided.
These operating details are documented in the official Nexperia 74F74 datasheet and Texas Instruments SN74F74 documentation.
Important Package Note
The letter D normally identifies the SO14 surface-mount package. A 74F74D cannot be inserted directly into a standard solderless breadboard.
For this project, use either:
A 74F74D soldered to an SO14-to-DIP adapter, or
A DIP version such as the 74F74N
The logic operation is the same, but you should always verify the pinout in the datasheet for the exact manufacturer and package.
Components Required
1 × 74F74D with SO14-to-DIP adapter
1 × solderless breadboard
1 × regulated 5 V power supply
2 × SPDT slide switches for the data inputs
3 × momentary push buttons
2 × high-efficiency LEDs
2 × 2.2 kΩ LED resistors
2 × 1 kΩ clock pull-down resistors
1 × 4.7 kΩ reset pull-up resistor
1 × 100 nF ceramic decoupling capacitor
Jumper wires
Multimeter or logic probe, optional
The two data switches can also be replaced with jumper wires that connect each D input to either 5 V or ground.
74F74D Pinout
Pin Signal Function
1 /CLR1 Asynchronous clear for flip-flop 1
2 D1 Data input 1
3 CLK1 Clock input 1
4 /PRE1 Asynchronous preset 1
5 Q1 Normal output 1
6 /Q1 Complementary output 1
7 GND Ground
8 /Q2 Complementary output 2
9 Q2 Normal output 2
10 /PRE2 Asynchronous preset 2
11 CLK2 Clock input 2
12 D2 Data input 2
13 /CLR2 Asynchronous clear for flip-flop 2
14 VCC 5 V supply
How the Circuit Works
For normal clocked operation, /PRE and /CLR must both remain high.
/PRE /CLR Clock D Q after event
High High Rising edge Low Low
High High Rising edge High High
High High No rising edge X No change
Low High X X High
High Low X X Low
Low Low X X Invalid condition
X means that the input does not affect the result in that condition.
The most important idea is that changing D does not immediately change Q. The new value is stored only when a rising edge arrives at the clock input.
Circuit Connections
- Power Connections
Connect:
Pin 14 to regulated 5 V
Pin 7 to ground
A 100 nF ceramic capacitor between pins 14 and 7
Place the capacitor as close to the IC as possible. It helps suppress short supply-voltage disturbances caused by fast logic transitions.
- Preset Inputs
Connect pins 4 and 10 directly to 5 V.
This disables the asynchronous preset function during the basic experiment. Do not leave these inputs floating.
- Common Reset Button
Connect pins 1 and 13 together to create a common reset node.
Then connect:
A 4.7 kΩ resistor from the reset node to 5 V
A momentary push button from the reset node to ground
Pressing the button pulls both /CLR inputs low and resets both Q outputs to zero.
- Data Inputs
For each SPDT data switch:
Connect one outer terminal to 5 V.
Connect the other outer terminal to ground.
Connect the center terminal to the corresponding data input.
Use:
Pin 2 for D1
Pin 12 for D2
The switch now selects a definite logic zero or logic one.
- Clock Inputs
For the first clock:
Connect a push button between pin 3 and 5 V.
Connect a 1 kΩ resistor between pin 3 and ground.
Repeat for the second clock using pin 11.
A pressed button produces a rising clock edge. The pull-down resistor keeps the clock low while the button is released.
A 1 kΩ pull-down is used because the 74F family is TTL logic and requires a stronger low-level pull-down than many CMOS circuits.
- LED Outputs
For each output, connect:
Q output → 2.2 kΩ resistor → LED anode
LED cathode → ground
Use pin 5 for the first LED and pin 9 for the second.
The LED turns on when the corresponding Q output is high.
The 74F74 has limited high-level output current, so a 2.2 kΩ resistor and a high-efficiency LED are safer than the commonly suggested 220 Ω resistor. If more brightness is required, use a transistor or logic buffer instead of heavily loading the flip-flop output.
Step-by-Step Assembly
Step 1: Install the IC
Place the DIP adapter across the center channel of the breadboard. Check the orientation mark before connecting power.
Step 2: Add Power and Decoupling
Connect pin 14 to 5 V and pin 7 to ground. Install the 100 nF capacitor directly across the supply pins.
Before inserting or powering the IC, use a multimeter to confirm that the supply rails are not shorted.
Step 3: Configure the Control Inputs
Connect both /PRE inputs to 5 V. Build the common reset circuit for pins 1 and 13.
Step 4: Add the Data Switches
Connect one switch to pin 2 and the other to pin 12. Confirm that each switch selects either ground or 5 V.
Step 5: Add the Clock Buttons
Connect the two push buttons and their 1 kΩ pull-down resistors to pins 3 and 11.
Step 6: Connect the LEDs
Connect the LEDs to pins 5 and 9 through the 2.2 kΩ resistors. Check the LED polarity before applying power.
Testing the Circuit
Test 1: Reset Both Flip-Flops
Apply 5 V and press the reset button.
Both LEDs should turn off because both Q outputs have been cleared to zero.
Do not assume the outputs will automatically start at zero. Without a reset event, their power-up states may be unpredictable.
Test 2: Store a Logic One
Set the first data switch to 5 V and press the first clock button.
The first LED should turn on.
Now change the data switch back to ground without pressing the clock button. The LED should remain on because the flip-flop is still storing the previous value.
Test 3: Store a Logic Zero
With D1 connected to ground, press the first clock button again.
The first LED should turn off.
This demonstrates the key behavior of a D flip-flop: the output samples the data input only on the rising clock edge.
Test 4: Test Independent Operation
Set D2 high and press the second clock button.
The second LED should turn on without affecting the first flip-flop. This confirms that the two flip-flops operate independently.
Troubleshooting
The output never changes
Check that:
The IC receives 5 V between pins 14 and 7.
/PRE and /CLR are high during normal operation.
The clock input is normally low and rises when its button is pressed.
The data input is connected to a definite logic level.
The output changes unpredictably
The most common cause is a floating input. Every input must be connected to either a valid high or low level.
Also verify that the 100 nF decoupling capacitor is installed near the IC.
The LED is very dim
The 74F74 is not designed to source large LED currents. Use a high-efficiency LED or add a transistor driver. Do not simply replace the 2.2 kΩ resistor with a very small value.
One press appears to create several clock events
Mechanical push buttons bounce. For this basic storage experiment, the final result is usually still correct because the data input remains constant.
Button bounce becomes a serious problem when the circuit is configured as a counter or frequency divider. In that case, use a debouncing circuit, Schmitt-trigger buffer, or clean signal generator.
The IC becomes hot
Disconnect the power immediately and inspect:
Supply polarity
IC orientation
LED polarity
Output shorts
Accidental connections between 5 V and ground
Further Experiments
Divide the Clock Frequency by Two
Connect /Q1 at pin 6 to D1 at pin 2.
Each clean rising clock edge will make Q1 change state. With a periodic input clock, the output frequency will be half the input frequency.
Use a debounced clock source for this experiment.
Build a Two-Bit Shift Register
Connect:
Q1 to D2
Both clock inputs to the same clean clock source
On each clock edge, the value stored in the first flip-flop moves into the second flip-flop.
Experiment with Preset and Clear
Add momentary buttons that temporarily connect /PRE or /CLR to ground. This demonstrates how asynchronous controls can change the output without a clock edge.
Never activate /PRE and /CLR simultaneously.
Practical Applications
D-type flip-flops are used in many digital systems, including:
One-bit data storage
Multi-bit registers
Frequency dividers
Binary counters
Shift registers
Finite state machines
Input synchronization
Control-sequence memory
The same principle demonstrated by this small circuit appears inside processors, communication interfaces, digital timers, and programmable logic devices.
Conclusion
This project demonstrates how the 74F74D captures and stores digital data. Each flip-flop samples its D input on a rising clock edge and holds the resulting value at Q until another clock event or asynchronous control signal changes it.
Once the basic circuit is working, it can be extended into a frequency divider, two-bit register, shift register, or simple state machine. These experiments provide a practical foundation for understanding sequential logic and more advanced digital systems.
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