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Kushal_Meghani1644
Kushal_Meghani1644

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RustyBoot-RISCV - A bare metal Boot-loader in Rust

Hey folks!

I’m excited to share my new project: RustyBoot-RISCV, a minimal bare-metal bootloader for RISC-V, written entirely in Rust (no_std, no_main). This is a continuation of my RustyBoot series — but this time for RISC-V!

Why?

I’ve always wanted to explore low-level OS development while keeping the safety and modern tooling of Rust. RISC-V is an open and growing architecture, and writing a bootloader for it seemed like the perfect challenge.

RustyBoot-RISCV aims to be:

  • Minimal: simple linker script, _start, and UART output.
  • Modular: UART, memory, filesystem, and ELF modules split for clarity.
  • Educational: a project for learning + experimenting.
  • Compatible: runs on QEMU virt machine for easy testing.

Project Structure

├── src/
│   ├── main.rs      # entrypoint (_start)
│   ├── panic.rs     # custom panic handler
│   ├── uart/        # UART driver
│   ├── memory/      # memory handling
│   ├── block/       # block device abstraction
│   ├── fs/          # filesystem support
│   └── elf/         # ELF loader
├── linker.ld        # linker script (entry at 0x8000_0000)
└── boot/            # boot assets (future use)
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Build

Make sure you have a RISC-V target installed:

rustup target add riscv64imac-unknown-none-elf

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Then Build

cargo build --target riscv64imac-unknown-none-elf
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Run in QEMU

qemu-system-riscv64 \
    -machine virt \
    -nographic \
    -bios none \
    -kernel target/riscv64imac-unknown-none-elf/debug/RustyBoot-RISCV \
    -serial mon:stdio
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You should see:
" === RustyBoot-RISCV === "

Features so far

  • Custom _start entrypoint (Rust 2024 requires #[unsafe(no_mangle)])

  • UART driver with println support

  • Panic handler

Planned: ELF loading, filesystem parsing, memory management, etc.

❤️ Built with Rust

Check-out the repository:
Github: https://github.com/KushalMeghani1644/RustyBoot-RISCV.git
Gitlab: https://gitlab.com/KushalMeghani1644/RustyBoot-RISCV.git

Thank You!

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