Transformer placement and routing determine EMC test outcomes more than any other single PCB decision in an Ethernet design. Here are the rules with specific measurements.
Optimal Layout Pattern
Board edge (left) ─────────────────────────────── Board interior (right)
┌──────┐ ┌─────┐ ┌─────────────────┐ ┌─────────┐
│ RJ45 │───│ CMC │───│ Transformer │───│ PHY │
│ │ │(opt)│ │ (secondary) │ │ chip │
└──────┘ └─────┘ │ (primary) → │ └─────────┘
└─────────────────┘
│
┌───────────────┐
│ Bob Smith │
│ 75Ω + 1000pF │
└───────┬───────┘
│
CHASSIS GND pour
Signal flow: PHY → Transformer → CMC → RJ45 → Cable
Layout: interior ──────────────────────→ board edge
Placement Distance Rules
Connection Target Maximum Impact if exceeded
──────────────────────────────────────────────────────────────────────
Transformer secondary to RJ45 < 10mm 20mm EMC cable coupling
Bob Smith to center tap pins < 5mm 10mm HF bypass degraded
CMC to RJ45 < 15mm 25mm Re-couples CM after CMC
PHY to transformer primary < 30mm 50mm SI trace length increases
Transformer to switching node > 10mm 5mm min Switching noise coupling
Transformer to crystal/clock > 10mm 5mm min Clock coupling into pairs
Isolation Zone (Ground Plane Moat)
Per IEC 62368-1 @ 1500V, Pollution Degree 2:
Creepage (along PCB surface): ≥ 6.4mm
Clearance (through air): ≥ 4.0mm
Moat implementation:
┌──────────────────┬──────────────────────┐
│ PRIMARY side │ SECONDARY side │
│ (Signal GND) │ (Chassis GND) │
│ PHY, decoupling │ Bob Smith, RJ45 │
└──────────────────┤ shield, mounting │
← 4mm+ → │ │
└──────────────────────┘
Rules:
✅ No copper crosses moat on any layer
✅ No via passes through moat
✅ Only connection: Bob Smith 1000pF → chassis GND (star point)
❌ Do NOT bridge moat with ground pour
❌ Do NOT run differential traces across moat boundary
Differential Pair Routing Checklist
differential_pair_rules = {
# Electrical
"impedance": "100Ω differential (±10%)",
"length_match_100M": "±2mm between pairs",
"length_match_1000M": "±1mm between pairs",
"via_count": "Minimize — zero preferred on secondary side",
# Routing
"pair_spacing": "Consistent throughout run (2× trace width typical)",
"layer_transitions": "Use differential via pairs — never single-ended via",
"parallel_run_limit": "< 5mm alongside switching traces or clocks",
# Layer strategy
"preferred_layer": "Top layer (short runs), avoid buried via transitions",
"reference_plane": "Continuous ground reference beneath entire run",
}
routing_mistakes = [
"Single via on one trace of differential pair (impedance imbalance)",
"Routing pair across isolation moat (violates galvanic isolation)",
"90° corners on differential pairs (use 45° or curved bends)",
"Length mismatch > 2mm (skew degrades common-mode rejection)",
"Running pairs adjacent to switching regulator traces > 5mm"
]
Multi-Port Layout
For boards with N Ethernet ports:
Port 1: [RJ45] ─ [CMC] ─ [XFMR1] ─ [PHY1] ← isolated moat 1
Port 2: [RJ45] ─ [CMC] ─ [XFMR2] ─ [PHY2] ← isolated moat 2
Port N: [RJ45] ─ [CMC] ─ [XFMRN] ─ [PHYN] ← isolated moat N
Each port has its own:
- Isolation moat
- Bob Smith termination
- Chassis GND connection to chassis pour
Do NOT share moat between ports.
Each transformer's secondary chassis GND connects independently to chassis copper.
Layer Stack Recommendation
Layer 1 (Top): Components + signal routing
Layer 2: Ground plane (solid — no splits except moat)
Layer 3: Power planes
Layer 4 (Bot): Signal routing + chassis GND pour (secondary side)
Moat in ground plane (Layer 2):
≥ 4mm gap under transformer body between primary and secondary copper
Source
Voohu Technology (www.voohuele.com) — network transformers with reference footprints and layout guidelines. MOQ 50pcs, DHL 3–5 days.
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