Akarsh

Verification-focused engineer with experience in SystemVerilog, UVM, Verilog, AXI/AHB protocols, assertions, coverage, and scripting (Perl).

Exploring real-world verification flows—UVM methodology, protocol verification, assertions, coverage-driven verification, and debug strategies used in industry.

Always open to connecting with fellow engineers to discuss verification concepts, interview prep, and industry practices in VLSI. Also looking to collaborate on verification projects.