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EV Group Demonstrates 450nm Pitch Hybrid Bonding at ECTC 2026: 98% Yield Across 20M Interconnects

EV Group Showcases 450nm Pitch Hybrid Bonding and Layer Transfer at ECTC 2026

EV Group (EVG), the Austrian semiconductor equipment manufacturer, has demonstrated a breakthrough at ECTC 2026: 450nm pitch Cu-Cu hybrid bonding with 98% yield across 20 million interconnects — a critical milestone for ultra-dense 3D chip integration powering next-generation AI processors.

Key Technologies Demonstrated

Ultra-Fine Pitch Hybrid Bonding (450nm)

Co-authored with Applied Materials:

  • 450nm Cu-Cu interconnect pitch — among the finest demonstrated at production scale
  • 98% yield across 20 million interconnects — proving manufacturing viability
  • Wafer-to-wafer process using EVG GEMINI® FB production bonding systems

This pitch density enables significantly higher bandwidth die-to-die interfaces than current 2-3μm pitch used in today's HBM stacks.

300nm Pitch Process Integration

A separate paper presents:

  • 300nm pitch hybrid bonding with SiCN passivation
  • 50nm overlay accuracy
  • Fine-grain Cu metallurgy with comprehensive reliability assessment
  • Demonstrates readiness for upcoming HBM5/6 generations

IR Layer Transfer (LayerRelease™)

  • Fabrication and transfer of fine-pitch RDL using Si temporary carriers
  • IR laser release enabling non-destructive layer separation
  • Application: heterogeneous integration of pre-fabricated redistribution layers

Maskless Lithography (LITHOSCALE® XT)

  • Digital lithography on 310×310mm² panel substrates
  • High aspect ratio Cu pillar applications
  • Eliminates mask tooling cost for advanced substrate manufacturing

Seven Technical Sessions

EVG's conference program spans the full range of heterogeneous integration — from professional development courses on hybrid bonding fundamentals to frontier research on epitaxial ruthenium layer transfer for single-crystal interconnects.

Why This Matters for PCB Engineers

As chips integrate more dies through hybrid bonding, PCB substrates must support:

  • Higher I/O density → finer pitch BGA arrays
  • Higher power density → improved thermal via arrays
  • Higher signal frequency → ultra-low-loss materials
  • Tighter warpage control → precision lamination

Originally published at AtlasPCB

Source: EV Group Press Release, May 19, 2026; IEEE ECTC 2026 Technical Program

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