A proper DFM (Design for Manufacturability) check before ordering catches 85% of fabrication failures at zero cost. Here are the 15 checks that matter most, with specific parameters and the engineering rationale behind each.
The 15 Critical DFM Checks
| # | Check | Min (Standard) | Min (HDI) | Failure Rate |
|---|---|---|---|---|
| 1 | Annular ring (PTH) | 3.5 mil | 3.0 mil | 30% |
| 2 | Trace/space | 3.5/3.5 mil | 3/3 mil | 18% |
| 3 | Solder mask dam | 3 mil | 2.5 mil | 15% |
| 4 | Drill-to-copper clearance | 8 mil | 6 mil | 12% |
| 5 | Acid traps (acute angles) | >90 degrees | >90 degrees | 8% |
| 6 | Copper-to-edge clearance | 10 mil | 8 mil | 5% |
| 7 | Via-to-pad clearance | 6 mil | 5 mil | 4% |
| 8 | Solder mask registration | +/-2 mil | +/-1.5 mil | 3% |
| 9 | Silkscreen over pads | No overlap | No overlap | 2% |
| 10 | Impedance vs actual Dk | +/-10% | +/-5% | 2% |
| 11 | Via aspect ratio | 10:1 max | 0.75:1 (micro) | 1.5% |
| 12 | Copper balance (per layer) | <30% imbalance | <20% imbalance | 1% |
| 13 | Starved thermals | 8mil spoke min | 6mil spoke min | 0.5% |
| 14 | Missing solder mask (non-SMD) | Verify intent | Verify intent | 0.3% |
| 15 | Board outline vs drill | 8mil clearance | 6mil clearance | 0.2% |
These 15 checks catch 97% of fabrication issues we encounter in incoming orders.
Check 1: Annular Ring -- The Most Common Failure
Annular ring violations are prevalent because of the disconnect between design tool theoretical values and manufacturing reality. When an engineer places a 40mil pad with a 24mil drill, the theoretical annular ring is 8mil -- perfectly comfortable. But three manufacturing factors erode that margin:
- Drill registration: +/-3mil (75um) accuracy on CNC machines
- Copper etching: 0.5-1mil undercut from each side
- Inner layer shift: 1-2mil from oxide treatment and lamination
Net result: an 8mil designed annular ring can fabricate as low as 3-4mil worst case. Below 3.5mil, IPC Class 2 rejects the board.
The fix: increase pad diameter by 6-8mil beyond your drill size. If routing density prevents larger pads, discuss tighter drill registration options with your manufacturer.
Checks 2-5: Geometry Rules Dictated by Etch Chemistry
Trace/space is dictated by etch process and copper thickness. On 1oz (35um) copper, 3.5/3.5mil achieves >99% yield. At 3/3mil, yield drops to approximately 95% because the etch time for 35um copper undercuts narrow trace sidewalls. On 2oz copper, minimum increases to 5/5mil.
Solder mask dam below 3mil cannot reliably form -- the mask ink either bridges the gap or slumps during curing. At 2.5mil (HDI with LPISM), reliability is approximately 95%.
Drill-to-copper prevents drill wander from damaging adjacent copper. The 8mil rule accounts for bit deflection during plunge plus worst-case registration.
Acid traps are acute-angle copper features where etchant cannot flush properly, leaving un-etched bridges. Any trace angle below 90 degrees in copper is problematic. This does not show up in standard DRC -- your CAD tool sees valid copper, but the fab process sees an impossible geometry.
Checks 6-10: Clearances That Prevent Assembly Failures
Copper-to-edge (Check 6): V-score leaves a 0.2mm kerf; routing uses a 2mm end mill. Copper within 10mil of the edge risks exposure during profiling.
Impedance vs actual Dk (Check 10): This is the failure mode no CAD-based DRC catches. Engineers model impedance using textbook Dk values (FR-4 = 4.35), but the actual laminate may have different Dk depending on resin content and glass style. A design modeled with Dk 4.35 built with Dk 4.1 laminate has impedance 5-7% higher than intended.
Our DFM check cross-references your impedance table against the specific laminate we will use and flags mismatches before production.
Checks 11-15: Fabrication Process Constraints
Via aspect ratio (Check 11): Above 10:1, plating chemistry cannot transport copper ions deep enough into the barrel. The result is thin plating at mid-point -- sometimes only 5-8um versus the 25um specification. This creates thermal weak points.
For HDI microvias, the constraint is 0.75:1 aspect ratio maximum. Above this, plasma desmear cannot clean the via bottom, preventing reliable connection.
Copper balance (Check 12): If one layer has 80% copper pour and an adjacent layer has 20%, differential resin flow during lamination creates thickness variation. A 30% imbalance can create +/-8% dielectric thickness variation, pushing impedance out of spec.
Solution: add copper thieving to sparse layers, bringing density within 20-30% of adjacent layers.
What We Actually Catch in Production
Across last quarter, approximately 35% of incoming designs had at least one DFM flag:
- 60% advisory (we can build it, but flagging a concern)
- 30% engineering query required (ambiguous intent)
- 10% hard stop (cannot fabricate as-submitted)
Most frequent hard stops:
- Annular ring breakout on inner layers
- Impedance mismatch due to wrong Dk assumption
- Minimum space violation in BGA fanout (3mil designed with 1oz copper needing 3.5mil)
Recommended DFM Workflow
During schematic capture: Validate stackup against manufacturer's available materials. Request their stackup capability table early.
During layout: Enable real-time DFM constraints in your CAD tool matching your target manufacturing class.
After Gerber output: Run final automated DFM audit. This catches acid traps, copper balance, silkscreen overlaps, and manufacturing notes contradicting Gerber data.
For the complete 15-point checklist with downloadable parameters for each manufacturing class, see the full PCB DFM check guide.
Every order at AtlasPCB receives this 15-point DFM check during our incoming CAM inspection -- catching issues before they become expensive problems on the production floor.
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