Every multilayer PCB starts with the same two dielectric materials: core and prepreg. If you've designed a few boards, you probably know the textbook definitions — core is cured, prepreg isn't. But the practical implications run deeper than most articles cover, especially when it comes to pressed thickness, impedance accuracy, and specification errors that slow down your order.
I work in PCB fabrication, and these are the issues I deal with daily. Here's what actually matters.
The Fundamental Difference
A PCB core is a fully cured copper-clad laminate — rigid, dimensionally stable, with copper bonded to both sides. It's ready for inner-layer imaging and etching. The dielectric thickness is essentially fixed by the time it reaches our facility.
Prepreg is a partially cured (B-stage) bonding material made from the same glass fiber and resin system. During lamination at 170-185°C under 250-400 psi, the resin softens, flows into etched copper relief on adjacent layers, and then cross-links into a permanent bond.
This cured-vs-uncured distinction drives every practical difference:
- Core thickness is predictable before lamination
- Prepreg thickness changes during pressing based on adjacent copper patterns
- Your impedance model needs to account for both behaviors differently
Glass Weave Styles: What You Need to Know
Both materials are built on standardized glass weaves (IPC-4412). The common styles:
| Style | Nominal Thickness/ply | Resin Content | Best For |
|---|---|---|---|
| 106 | ~1.5 mil | 70-75% | Thinnest dielectric layers |
| 1080 | ~2.6-3.0 mil | 63-68% | Workhorse for thin layers |
| 2116 | ~4.5-5.0 mil | 48-54% | Medium dielectric, good fill |
| 3313 | ~4.0-4.5 mil | 52-58% | Medium-thick constructions |
| 7628 | ~7.5-8.0 mil | 42-48% | Thick layers, strong mechanical |
Practical tip: Most fabricators stock 1080, 2116, and 7628 for FR-4. If you specify a style they don't carry, you'll trigger an engineering query (adding days) or a material order (adding a week). Better approach: specify your target dielectric thickness and impedance, and let the fab pick the glass combination from their qualified inventory.
The Pressed Thickness Problem
This is where most articles fall short. The thickness on a prepreg datasheet is the nominal thickness of a single uncured sheet. It is not the dielectric thickness in your finished board.
Here's real production data for 1080 prepreg (Shengyi S1000-2M):
| Adjacent Copper Coverage | Pressed Thickness/ply |
|---|---|
| 75%+ (ground/power planes) | 2.0-2.3 mil |
| ~50% (moderate routing) | 2.3-2.5 mil |
| 25% or less (sparse traces) | 2.5-2.8 mil |
That's up to 0.8 mil variation from a single ply of the same prepreg, depending on what's on the adjacent layers. For a 50Ω microstrip on a 3 mil dielectric, this can shift impedance by 5-8 ohms if you use the wrong thickness assumption.
This is precisely why fabricators insist on providing impedance-modeled stackups. We calculate pressed thickness for each prepreg layer based on the actual copper distribution extracted from your Gerber files.
Resin Starvation: The Failure Mode Nobody Talks About
When there isn't enough resin in the prepreg to fill the copper relief during lamination, you get voids, incomplete bonding, and eventually delamination.
The math is straightforward: 1 oz copper with 50% removal creates ~1.4 mil deep etch channels. 2 oz copper with the same pattern creates ~2.8 mil channels — needing roughly twice the resin volume. For heavy copper designs, a single prepreg ply may not have enough resin capacity.
It gets worse with uneven copper distribution. A large ground plane (90% copper) next to sparse traces (15% copper) creates differential resin flow — the resin migrates toward the area with more relief, potentially starving the plane area.
Prevention:
- Use copper balancing and thieving to equalize distribution
- Specify adequate prepreg plies for your copper weight
- Let your fabricator validate resin sufficiency during DFM review
Five Specification Mistakes I See Every Week
After processing thousands of designs:
1. Confusing core thickness with dielectric thickness. Core thickness includes base laminate + copper. The dielectric spacing (what matters for impedance) is the core minus copper on each side. An "8 mil core" might have 7.1 mil actual dielectric.
2. Copying exact prepreg style numbers from another fab. Your previous fab's "2 plies of 2116" was based on their inventory. Specify target dielectric thickness instead.
3. Over-constraining the material brand. Unless you genuinely need Rogers 4350B for RF, don't specify "Isola 370HR only" when a Shengyi S1000-2M at lower cost and shorter lead time has equivalent properties.
4. Missing impedance callouts. If your design needs impedance control but the fab drawing doesn't say so, the board gets built without impedance verification.
5. Asymmetric stackups. A stackup that isn't symmetric about the center line causes warpage during lamination. We see this surprisingly often — usually unintentional.
How to Specify Materials Correctly
For standard FR-4 multilayer boards, here's what your fab drawing should include:
- Material performance class: "FR-4, Tg 150 min, IPC-4101/126 or equivalent"
- Layer-by-layer dielectric targets: "Dielectric L2-L3: 8 mil nominal ±1.5 mil"
- Impedance requirements: "50Ω SE, 100Ω differential ±10%, L1/L6 referenced to adjacent planes"
- Special requirements only if genuinely needed: "Lead-free compatible, halogen-free per IPC-4101B required"
What NOT to do: copy a specific stackup table from another fabricator's documentation. Their stackup was designed around their inventory and press conditions.
For mixed dielectric stackups (e.g., Rogers + FR-4), specifying the material family by name is appropriate since those electrical properties aren't interchangeable.
The bottom line: core gives you dimensional predictability, prepreg gives you bonding capability. Understanding how both behave during real manufacturing — not just their textbook definitions — is what separates a producible stackup from one that generates engineering queries.
Originally published on the AtlasPCB Engineering Blog. We manufacture multilayer PCBs with impedance-controlled stackups from 2 to 30 layers.
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