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Patrick Araujo
Patrick Araujo

Posted on Originally published at pklavc.com AI-assisted

Microsoft Accelerates Chip Design with Azure Cobalt 200 for EDA Workloads

Originally published on PkLavc.

Confirmed facts

On November 5, 2026, Microsoft announced that it is accelerating Electronic Design Automation (EDA) workloads by utilizing Azure Cobalt 200 virtual machines (VMs).

Internal tests conducted by Microsoft demonstrated significant performance gains for EDA workloads running on Cobalt 200 when compared to Cobalt 100. These workload-specific gains ranged from 38% higher throughput to a 4.15x increase in performance.

Specifically, a Calibre workload, a common EDA tool, showed approximately 23% less execution time on Azure Cobalt 200. The evaluation of EDA tools included offerings from major industry vendors such as Cadence, Synopsys, and Siemens.

Azure Cobalt 200 is purpose-built for scale-out, cloud-native, and Linux-based agentic AI workloads. Key architectural advancements in Cobalt 200 include memory encryption, built-in acceleration for compression and encryption, and higher throughput designed for data-intensive cloud services.

Technical analysis

Electronic Design Automation (EDA) workloads are fundamental to modern semiconductor development, encompassing a complex suite of tasks from initial architectural exploration and logical design to physical implementation, verification, and sign-off. These processes are characterized by their extreme computational demands, often requiring hundreds of thousands of CPU cores and terabytes of memory for tasks like full-chip simulations, formal verification, and physical design rule checks. The iterative nature of chip design means engineers frequently execute numerous simulation and verification runs, each generating vast datasets and demanding high throughput for data processing and storage. Historically, managing these workloads has necessitated significant on-premises infrastructure investments, leading to challenges such as capital expenditure, resource underutilization during off-peak times, and bottlenecks when peak demand for compute resources exceeds available capacity. The ability to scale compute resources dynamically and efficiently is a persistent challenge in the semiconductor industry.

Microsoft's Azure Cobalt 200 virtual machines (VMs) are purpose-built for scale-out, cloud-native, and Linux-based workloads, presenting architectural characteristics that directly address the inherent challenges of EDA. The "scale-out" design (inference) is particularly critical for modern EDA flows, which increasingly rely on distributing highly parallelizable tasks across numerous compute nodes. Examples include running extensive regression test suites for functional verification, executing Monte Carlo simulations for analog design, or performing distributed physical verification checks. The "Linux-based" foundation (inference) is a fundamental compatibility requirement, as the vast majority of commercial EDA toolchains from vendors like Cadence, Synopsys, and Siemens are developed and optimized for Linux environments. Furthermore, the confirmed "higher throughput for data-intensive cloud services" (fact) is directly beneficial for EDA, which involves the constant processing and movement of massive design files, intellectual property (IP) libraries, and voluminous simulation and verification results. This high throughput can mitigate I/O bottlenecks that often plague large-scale EDA deployments.


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