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Posted on • Originally published at atlaspcb.com

AI Server PCB Material Selection: T-Glass Shortage and Low-Loss Laminate Engineering for 112G

Quick Decision: Material Tier by Channel Data Rate

The signal speed on your highest-bandwidth SerDes links determines the minimum material performance tier for AI server PCBs.

Data Rate (per lane) Required Df Material Tier Options
< 10 Gbps NRZ < 0.020 @ 5 GHz Standard FR-4 IT-180A, TU-862HF
10-28 Gbps NRZ < 0.010 @ 14 GHz Mid-Loss Megtron 4, EM-370D
28-56 Gbps PAM4 < 0.005 @ 14 GHz Low-Loss Megtron 6, IS680-345
56-112 Gbps PAM4 < 0.002 @ 28 GHz Ultra Low-Loss Megtron 7, T-Glass

The Supply Crisis

The PCB materials industry in 2026 faces a structural imbalance. Global demand for ultra-low-loss laminates has approximately tripled since 2023, driven by AI accelerator deployments. Every GPU training cluster, every inference rack — all require PCBs built on materials that were previously niche.

AGC's T-Glass exemplifies the constraint. Traditional E-glass has Dk of 6.2-6.6, dominating composite laminate properties regardless of resin. T-Glass reduces glass Dk to 4.4-4.6, enabling composite Dk of 3.0-3.2 — impossible with E-glass. The problem: AGC is the sole volume producer, and new glass furnaces take 18-24 months to build.

Panasonic's Megtron 7 uses T-Glass cloth, so when T-Glass constrains, Megtron 7 constrains proportionally. Lead times are currently 8-14 weeks for T-Glass materials, with smaller orders (under 500 sheets) facing allocation refusal.

Chinese alternatives (Shengyi S7439G, ITEQ IT-968SE) are beginning to receive volume qualification approvals as of mid-2026, offering 4-6 week lead times at 70-80% of the cost.

Mixed-Dielectric Stackups: The Practical Solution

Building an entire 24-layer board from Megtron 7 is unnecessary. In a typical GPU baseboard, only 4-8 layers carry critical 112G signals. The remaining layers serve as power planes, low-speed control (I2C, SPI), and mid-speed interfaces.

A practical mixed-dielectric stackup: Megtron 7 on 4-6 critical high-speed layers, IT-180A or Megtron 4 everywhere else. Material cost reduction: 55-65%.

The engineering challenge: verifying material compatibility during lamination. Not all combinations bond reliably. Established pairings (Megtron 6/7 with IT-180A) are well-characterized.

Impedance control becomes layer-specific — each signal pair sits between different Dk materials. Provide your fabricator explicit Dk values per layer rather than a single "average" value.

Copper Roughness: The Hidden Variable

At 28+ GHz, copper surface roughness contributes 0.5-1.5 dB/inch additional insertion loss. Standard copper (Rz 3-5 µm) on Megtron 7 negates much of the laminate benefit.

For 112G PAM4: specify HVLP copper (Rz < 1.5 µm). The cost premium is 5-10% but the performance improvement is dramatic — typically 0.3-0.5 dB/inch improvement that enables the channel lengths AI server architectures demand.

Caveat: HVLP bonds less aggressively due to smooth surface. Verify adhesion compatibility with your specific resin system.

Securing Supply: Practical Strategies

  1. Qualify two materials for every critical signal layer. If your simulation closes with both Megtron 7 and I-Speed CAF, you have fallback.

  2. Engage fabricator early — during schematic planning, not after Gerber release. Pre-allocate laminate 3-4 months before production.

  3. Consider Chinese alternatives (Shengyi S7439G, ITEQ IT-968SE) for designs without vendor-locked qualification mandates. Functionally equivalent performance, better availability.

  4. Mixed-dielectric reduces risk — using ULL on only critical layers means you need less of the constrained material.

Key Takeaways

  • 112G PAM4 requires Df < 0.002 and HVLP copper — no shortcuts
  • T-Glass supply remains constrained through at least end of 2026
  • Mixed-dielectric stackups save 55-65% on materials without performance compromise
  • Always qualify two material options for supply chain resilience
  • Chinese ULL alternatives are now production-viable for many applications

For detailed stackup engineering guidance, see the full article on AtlasPCB. Building AI hardware? Request a quote with your material requirements.

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