Reviewed by AtlasPCB Engineering Team
The Document That Defines Your Board
Every multilayer PCB begins its manufacturing life not with copper imaging or drilling, but with a stackup drawing. This document, typically a single page, describes the complete cross-sectional architecture of your board from top copper to bottom copper, specifying every layer of copper and every layer of dielectric material in between. It is the blueprint that determines your impedance values, your signal integrity performance, your thermal behavior during assembly, and ultimately whether your board works or fails.
Most engineers are comfortable designing stackups in their EDA tools. Fewer are comfortable reading the stackup proposal that comes back from their manufacturer, which often uses different conventions, different dielectric values, and sometimes proposes changes the designer did not expect. The gap between what you specified and what your manufacturer proposes to build is where problems hide. Understanding how to read and interpret that proposal is one of the most important skills a hardware engineer can develop, because once you approve a stackup and boards go into production, the construction is locked.
When we send stackup proposals to customers at AtlasPCB, we include every parameter needed to verify the design intent. This guide walks through each element of a stackup drawing, explains what it means from both the designer's and manufacturer's perspective, and provides a practical checklist for reviewing and approving any stackup proposal you receive.
Anatomy of a PCB Stackup Drawing
A stackup drawing presents the board construction as a vertical cross-section. Reading from top to bottom, each row represents either a copper layer or a dielectric layer. Every row carries specific information that defines the manufacturing process. Understanding what each column and annotation means is the first step toward meaningful review.
Layer Designation and Function
The leftmost column in any stackup drawing identifies each copper layer with a sequential number, typically L1 through L6 for a six-layer board or L1 through L10 for a ten-layer design. Adjacent to the layer number, most manufacturers include a function label that describes the intended purpose of that copper layer. Common function labels include Signal for layers carrying routed traces, Ground or GND for unbroken ground reference planes, Power or PWR for power distribution planes, and Mixed for layers that carry both routed signal traces and partial plane areas.
These function labels are not merely decorative. They tell the manufacturer which layers require trace routing with specific width and spacing rules and which layers should remain as continuous copper pours with only anti-pad clearances around vias. When you review a stackup proposal, verify that the function assignments match your design. A layer you intended as a solid ground reference should not be labeled Mixed, because manufacturing processes for plane layers differ from those for signal layers in terms of copper balance and etching compensation.
Dielectric Material Identification
Between every pair of copper layers sits a dielectric material, and the stackup drawing must identify whether that material is a core or a prepreg. This distinction is fundamental to understanding how the board will be constructed, and confusing the two is a common source of misunderstanding between designers and manufacturers.
A core is a fully cured, rigid laminate panel with copper foil already bonded to both sides. It arrives at the factory as a finished product from the laminate supplier. The manufacturer images and etches circuit patterns onto the copper surfaces of the core, creating inner-layer pairs. In the stackup drawing, a core always appears between two copper layers that were processed together as a single unit.
A prepreg, by contrast, is a sheet of woven fiberglass cloth that has been impregnated with partially cured epoxy resin. During the lamination press cycle, heat and pressure cause the prepreg resin to soften, flow into the etched copper pattern on adjacent cores, and then fully cure into a rigid bond. Prepreg is the adhesive that holds the entire multilayer sandwich together. In the stackup drawing, prepreg appears between copper layers that belong to different cores and need to be bonded during pressing.
Understanding the core-versus-prepreg distinction helps you understand why certain dielectric thicknesses are achievable and others are not. A core thickness is fixed by the laminate supplier and cannot be adjusted during manufacturing. A prepreg thickness, however, changes during pressing because resin flows into the copper pattern on adjacent layers, meaning the final pressed thickness depends on the copper density of the neighboring layers.
Dielectric Thickness and Glass Weave Style
Each dielectric row in the stackup drawing specifies a thickness value, usually in mils (thousandths of an inch) or millimeters, along with a glass weave style designation such as 1080, 2116, or 7628. These numbers refer to specific fiberglass cloth constructions defined by IPC standards, and they carry significant implications for both impedance control and signal integrity.
A 1080 prepreg uses a thin, open-weave glass cloth with approximately 65 percent resin content by weight. Because it has more resin and less glass, its dielectric constant is lower, typically around 3.9 to 4.1 for standard FR-4 formulations. A 7628 prepreg uses a thick, tight-weave glass cloth with approximately 42 percent resin content, giving it a higher dielectric constant around 4.4 to 4.6. The 2116 falls between these two extremes with roughly 50 percent resin content and a Dk around 4.2 to 4.4.
When your manufacturer specifies a particular glass weave style in the stackup, they are making a deliberate choice that affects the dielectric constant used for impedance calculations, the pressed thickness tolerance they can achieve, the availability of the material from their suppliers, and the cost of the finished board. A stackup built entirely with 1080 prepreg will have different impedance characteristics than one built with 7628, even if the nominal thickness is the same. Always verify that the glass weave styles in the proposal match the dielectric constant values used in the impedance calculation table.
Copper Weight
Each copper layer in the stackup drawing specifies a copper weight, expressed in ounces per square foot or equivalently in micrometers of thickness. The most common values are half-ounce (17.5 micrometers), one-ounce (35 micrometers), and two-ounce (70 micrometers) copper. The stackup drawing may distinguish between base copper weight, which is the foil laminated to the core or applied during initial layup, and finished copper weight, which includes the additional copper deposited during the plating process.
For outer layers, the plating process typically adds 20 to 30 micrometers of copper on top of the base foil. This means a one-ounce base copper outer layer will have a finished thickness closer to 55 to 65 micrometers. Inner layers do not receive additional plating, so their thickness remains close to the base copper weight. This distinction matters for impedance calculations because trace cross-sectional geometry directly affects characteristic impedance. Make sure you understand whether the copper weights in the stackup drawing refer to base or finished values, and confirm that the impedance simulation used the correct finished thickness.
Overall Board Thickness
Near the bottom or side of the stackup drawing, you will find the total finished board thickness with a tolerance band, typically expressed as a nominal value plus or minus some percentage or absolute dimension. The standard PCB thickness is 1.6 millimeters (63 mils), but designs range from 0.4 millimeters for thin mobile device boards to 3.2 millimeters or more for backplanes and thick power electronics.
The overall thickness is the sum of all copper layers and all dielectric layers after pressing, plus any surface finish contribution. Verify that the proposed thickness fits within your mechanical enclosure constraints, particularly for board-to-board connector mating heights, card-edge connector slot widths, and chassis slot dimensions.
Reading the Impedance Table
The impedance control section of a stackup drawing is where many engineers focus their attention, and rightly so. This table translates the physical construction into electrical performance. A typical impedance table includes the target impedance value in ohms, the trace width and spacing required to achieve that impedance, the reference layer for each controlled signal, and the dielectric constant value used in the calculation.
When reviewing the impedance table, the most important check is comparing the Dk value used by the manufacturer against the Dk value you used in your own simulation. Manufacturers typically use Dk values from the specific laminate datasheet at a frequency relevant to your application, while designers sometimes use a generic FR-4 Dk value of 4.4 that may not match the actual material. A difference of 0.2 in Dk can shift the required trace width by one to two mils, which translates to an impedance error of five to eight percent on the finished board.
If the manufacturer's trace widths differ from yours by more than half a mil, do not simply assume one calculation is wrong. Ask the manufacturer which Dk value they used, at what frequency, and for which specific prepreg or core material. Then re-run your simulation with their values. In our engineering review process at AtlasPCB, we always provide the exact Dk and Df values from the laminate datasheet alongside the impedance calculation so that customers can verify independently using their preferred impedance calculator.
A Practical Example: Reading a Six-Layer Stackup
To make these concepts concrete, consider a typical six-layer stackup proposal for a design with 50-ohm single-ended and 100-ohm differential impedance targets. Working from top to bottom, the stackup might read as follows.
Layer L1 is designated as a Signal layer with one-ounce base copper. Below L1 sits a single sheet of 1080 prepreg at 3.2 mils nominal pressed thickness. Layer L2 is a Ground plane with half-ounce copper. Below L2 is a 0.8-millimeter FR-4 core with half-ounce copper on both sides. Layer L3 is labeled as a Signal layer, and Layer L4 below it is labeled as a Power plane. Between L4 and L5 sits another 0.8-millimeter core with half-ounce copper on each side. Layer L5 is a Ground plane. Between L5 and L6 is a single sheet of 1080 prepreg at 3.2 mils pressed. Layer L6 is the bottom Signal layer with one-ounce base copper.
Reading this stackup, several things become immediately apparent. The construction uses two cores and two prepreg layers, making it a standard press construction with one lamination cycle. The outer signal layers (L1 and L6) are referenced to adjacent ground planes (L2 and L5) through thin 1080 prepreg, giving tight coupling for good impedance control. The inner signal layers (L3 and L4) are separated by a different dielectric, and depending on whether L3 routes referenced to L2 above or L4 below, the impedance characteristics will differ.
Notice the symmetry of this construction. The top half (L1-prepreg-L2-core-L3) mirrors the bottom half (L4-core-L5-prepreg-L6). This symmetry is critical for preventing board warpage during lamination and thermal cycling. If a manufacturer proposes an asymmetric construction, such as using a thicker prepreg on top than on bottom, ask why and request a bow-and-twist analysis.
Five Checks Before You Approve
After you understand what the stackup drawing says, you need to verify that what it says is correct for your design. In our experience reviewing thousands of stackup approvals, these five checks catch the vast majority of issues before they reach production.
The first check is dielectric thickness versus impedance. Take the proposed dielectric thickness between your controlled signal layer and its reference plane, plug it into your impedance calculator along with the manufacturer's Dk value, and confirm the result matches the impedance target within two ohms. If it does not match, either the dielectric thickness or the trace width needs adjustment.
The second check is copper weight versus current capacity. Verify that the copper weight on power and ground layers can handle your maximum sustained current without excessive temperature rise. A half-ounce inner layer carrying two amps through a 10-mil trace will see meaningful heating. If your design has high-current paths, confirm that the proposed copper weight provides adequate margin per IPC-2152 guidelines.
The third check is overall thickness versus your mechanical constraints. Add up all the layers including copper and dielectric to verify the total matches the proposal's stated overall thickness. Then confirm that thickness works within your enclosure, connector, and assembly constraints.
The fourth check is material grade versus your requirements. The stackup drawing should name a specific laminate, such as Shengyi S1000-2 or ITEQ IT-180A. Verify that the specified grade meets your thermal requirements for glass transition temperature, your electrical requirements for Dk and Df at your operating frequency, and any industry-specific requirements such as IPC-4101 slash sheet compliance for aerospace or automotive applications.
The fifth check is construction symmetry. Compare the top half and bottom half of the stackup layer by layer. The materials, thicknesses, and copper weights should mirror around the center. Minor asymmetry in copper density due to different routing densities on different layers is acceptable, but structural asymmetry in dielectric thickness or material type is a red flag for warpage.
When to Push Back on a Proposal
A manufacturer's stackup proposal is a starting point for discussion, not a final decree. There are several situations where pushing back is not just acceptable but necessary.
If the proposed laminate grade does not match your fabrication notes, ask why the substitution was made. Sometimes it reflects material availability, which is a legitimate concern, but you need to understand the impact on Dk, Df, and thermal performance before accepting. If the manufacturer cannot source your specified material, they should propose an equivalent grade with documented property comparison and request your written approval.
If impedance targets in the proposal differ from your design by more than two ohms, do not approve without investigation. Small differences often stem from Dk value discrepancies between your simulation and theirs, which can be resolved by agreeing on the correct value. Larger differences suggest a fundamental stackup issue that could cause signal integrity problems.
If the manufacturer proposes non-standard prepreg combinations to achieve an unusual dielectric thickness, be aware that this may create material procurement delays. A standard 4-layer stackup using common 7628 or 2116 prepreg will have faster delivery than an exotic construction requiring special-order thin prepreg. Ask your manufacturer about material availability before approving an unusual construction.
From Proposal to Production: The Approval Workflow
The stackup approval process should follow a clear workflow that prevents miscommunication. After receiving the stackup proposal from your manufacturer, perform the five checks described above. If everything passes, send written approval to proceed. If anything needs revision, clearly describe the required changes and request an updated proposal. Do not approve a stackup with verbal caveats or conditional notes; the document that gets approved is the document that gets built.
Once approved, the stackup enters what manufacturers call a "stackup freeze." This means the construction is locked for that production order, and changes after this point will incur delays and potentially re-tooling charges. Build the stackup review into your project schedule between design completion and production order placement, and allocate enough time for at least one revision cycle if your design has impedance control or non-standard construction.
The most efficient approach is to engage your manufacturer early, ideally during the stackup design phase rather than after layout is complete. When we work with customers at AtlasPCB, we prefer to review stackup proposals before routing begins so that any material constraints or impedance adjustments can be incorporated into the layout rather than requiring post-layout changes that delay the project.
Understanding your manufacturer's stackup drawing is not about becoming an expert in laminate chemistry or press cycle parameters. It is about being an informed participant in a collaborative process where your design knowledge and their manufacturing expertise combine to produce a board that works the first time. The few hours spent carefully reviewing a stackup proposal can save weeks of troubleshooting failed prototypes and costly re-spins.
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