Every PCB designer eventually hits the same frustrating problem: components that should slide cleanly into their holes require force during assembly. The root cause is almost always confusion about the difference between drill tool diameter and finished hole size.
When you place a 0.80 mm hole in your CAD tool and export the Excellon drill file, you're specifying a finished hole size — the diameter on the delivered board after all manufacturing is complete. The actual drill bit used will be larger, because subsequent plating processes deposit material that shrinks the opening.
Plated vs Non-Plated: The Key Distinction
For non-plated holes (NPTH), drill size and finished size are nearly identical. For plated through-holes (PTH), the difference is significant because multiple copper layers are deposited on the barrel wall.
Here's the breakdown of what gets deposited inside a plated hole:
- Electroless copper seed: ~0.5-2.0 μm per wall
- Electrolytic copper barrel: 20-25 μm per wall (IPC-6012 minimums)
- Surface finish: varies significantly by type
Total diameter reduction for a typical ENIG board: approximately 60 μm (0.06 mm). That means a 0.90 mm drill delivers roughly 0.84 mm finished hole.
The Critical Detail Most Guides Miss: Surface Finish Matters
Different surface finishes require different drill oversize compensations. Here's what we use in production:
| Surface Finish | Drill Oversize | Why |
|---|---|---|
| ENIG | +0.10 mm (4 mil) | Uniform nickel layer, predictable |
| HASL | +0.15 mm (6 mil) | Uncontrolled solder buildup, non-uniform cooling |
| Immersion Silver | +0.10 mm (4 mil) | Silver layer is negligible thickness |
| OSP | +0.08 mm (3 mil) | No metallic deposit in hole barrel |
| Hard Gold | +0.10-0.12 mm | Thicker nickel + gold layer |
Key point: You should NOT add these compensations yourself in CAD. Your files should always specify the finished size. The fabricator applies the appropriate oversize during CAM processing.
If you pre-compensate and the fabricator adds their compensation on top, every hole will be oversized, annular rings shrink, and pads may become too small.
IPC-6012 Tolerance Requirements
Standard achievable tolerances by hole size:
| Finished Hole Range | Standard PTH Tolerance |
|---|---|
| ≤ 0.60 mm | ±0.075 mm (±3 mil) |
| 0.60-2.50 mm | ±0.10 mm (±4 mil) |
| 2.50-6.30 mm | ±0.15 mm (±6 mil) |
Non-plated holes achieve ±0.05 mm standard, and ±0.025 mm for press-fit applications (at premium cost).
Position tolerance (equally critical): Standard is ±0.075 mm. A perfectly-sized hole shifted by 0.075 mm can break an inner-layer annular ring on Class 3 designs.
Worked Example: The Complete Workflow
Scenario: 0.6 mm round lead resistor on a 1.6 mm, 6-layer board with ENIG.
- Max lead diameter from datasheet: 0.60 mm
- Add 0.20 mm insertion clearance → target finished hole: 0.80 mm
- Specify on drawing: "0.80 mm FINISHED PLATED ±0.10 mm"
- Fabricator adds ENIG compensation → drills 0.90 mm
- Verify annular ring: (1.40 mm pad - 0.90 mm worst-case hole) / 2 = 0.25 mm ✓
- Check aspect ratio: 1.6 / 0.90 = 1.78:1 (well under 10:1 limit) ✓
Square Pins: The Diagonal Trap
The most common sizing mistake we see: designers specify holes for 0.64 mm square header pins as 0.64 + 0.20 = 0.84 mm. But the diagonal of a 0.64 mm square is 0.905 mm — the hole is physically too small for the pin to enter.
Correct approach: start from the diagonal (0.905 mm) + clearance → approximately 1.05-1.10 mm finished hole.
Cost vs Tolerance: When to Spend More
- Standard (±0.10 mm PTH): No surcharge, 90% of orders
- Tight (±0.05 mm PTH): 5-15% premium, newer drill bits required
- Ultra-tight for press-fit (±0.025 mm NPTH): 10-25% premium, individual hole measurement
The engineering decision: specify tight tolerances only where functionally required. A BGA via array needs Class 3 control. A through-hole LED does not.
The Golden Rule
Always include this note on your fabrication drawing:
"ALL HOLE DIMENSIONS IN DRILL TABLE ARE FINISHED SIZES AFTER PLATING"
This single sentence eliminates the most common source of confusion between designer and fabricator.
We wrote a comprehensive deep-dive on this topic covering high aspect ratio effects, EDA tool behavior (Altium vs KiCad vs OrCAD), and a complete component hole sizing reference table.
For engineers ordering boards: our engineering review process catches hole specification issues before production begins, preventing the assembly-line surprises that cost real time and money.
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