Reviewed by AtlasPCB Engineering Team
Every PCB begins its manufacturing journey the same way: a zip file lands in a CAM engineer's inbox. What happens in the next thirty minutes determines whether your boards ship on schedule or whether your order enters a holding pattern of clarification emails, engineering questions, and preventable delays. The PCB design file handoff is the single most consequential moment in the manufacturing timeline, and yet it is the step that receives the least attention from most design teams.
At AtlasPCB, we process hundreds of new file packages every week. Some arrive perfectly organized, with clear naming conventions, a complete fabrication drawing, and every layer accounted for. Those orders move from intake to production in under an hour. Others arrive as a jumble of ambiguously named files, missing critical information, or containing conflicting data from multiple revisions. Those orders sit in our engineering queue while we compose emails, wait for responses, and try to reconstruct the designer's intent from incomplete evidence.
This article is written from the manufacturer's side of the table. We are going to walk you through exactly what PCB manufacturing files we need, what we check first when your package arrives, what mistakes cause the most delays, and how to assemble a file package that moves through our facility without a single hold. If you design PCBs for a living, this is the article that will save you days on your next order.
What Happens When Your Files Hit Our CAM Department
When we receive your file package, the clock starts immediately. Our CAM department operates on a first-in, first-out basis for file review, and every minute spent on clarification is a minute your order is not moving toward the production floor. Understanding what happens inside our facility during those first thirty minutes will change how you think about file preparation.
The first step is import. Your zip file is extracted and loaded into our CAM software, which for most modern fabricators is either Ucamco Integr8tor, Valor Genesis, or a similar platform. The software attempts to auto-detect layer types based on file extensions and naming conventions. If your files are named clearly — GTL for the top copper layer, GBL for the bottom, GTS and GBS for solder masks — the import is seamless. If your files are named "Layer1.gbr," "Layer2.gbr," and so on, the CAM engineer must open each one individually, inspect the geometry, and manually assign layer types. This alone can add fifteen to twenty minutes to the review, multiplied across every job in the queue that day.
Once the layers are imported and assigned, the software runs an automated design-for-manufacturing check. This DFM analysis examines trace widths, clearances, annular ring sizes, acid traps, solder mask dams, drill-to-copper distances, and dozens of other parameters against the capabilities of our specific production line. Violations are flagged, categorized by severity, and compiled into a report. Minor violations — a trace that is 0.1 mil below our standard minimum, for example — are typically noted but not held. Critical violations, such as a drill hole that overlaps a copper feature on an adjacent layer or a solder mask dam below our minimum opening, will stop the job until we hear from you.
The next stage is the impedance and stackup review. If your fabrication drawing specifies controlled impedance requirements, our engineers model the stackup in a field solver, verify that the dielectric thicknesses and trace geometries will achieve your target impedance values, and propose adjustments if necessary. This is one of the areas where a complete file package makes the biggest difference. When you include a stackup drawing with your target impedance values, dielectric preferences, and copper weights clearly noted, our engineers can complete this step in minutes. When that information is missing, we must ask you a series of questions — what material do you want? What impedance targets do you need? What is the finished board thickness? Each round of questions and answers typically costs a full business day.
The final step in the intake process is the generation of a production traveler: the internal document that follows your board through every step of fabrication, from inner layer imaging to final electrical test. A clean file package with all necessary information allows us to generate this traveler on the first pass. An incomplete package means the traveler cannot be finalized, and your order waits.
In our experience, roughly forty percent of incoming file packages require at least one clarification question. Of those, the majority are missing the same few pieces of information: material specification, surface finish preference, impedance requirements, or a complete drill file set. These are not obscure requirements. They are the basics of a complete PCB manufacturing file package, and addressing them before you click "send" is the simplest way to shave days off your lead time.
The Complete PCB Manufacturing File Package
A complete file package contains more than just Gerber files. While Gerber data forms the geometric foundation of your board, it carries almost no manufacturing intelligence — it tells us what your copper looks like, but not what material to build it on, what finish to apply, or what electrical performance you expect. The complete package is a combination of geometry data, mechanical data, manufacturing instructions, and testing specifications that together give our CAM engineers everything they need to build your board correctly the first time.
The core of any file package is the set of Gerber files. At minimum, these should be in RS-274X format, which is the extended Gerber format that includes embedded aperture definitions. The older RS-274D format, which requires a separate aperture wheel file, is still occasionally encountered but creates unnecessary compatibility issues and should be avoided entirely. The newer Gerber X2 format is preferred when your EDA tool supports it, because it embeds layer type attributes directly in the file header, which eliminates guesswork during import. For a comprehensive treatment of Gerber formats and best practices, see our Gerber files guide.
Your Gerber set should include one file for every copper layer in your design, top and bottom solder mask files, at least one silkscreen file (top is standard; bottom is needed if you have bottom-side component markings), top and bottom paste mask files if your design will be assembled, and a board outline or mechanical layer file. For a standard four-layer board, that translates to a minimum of ten Gerber files: four copper layers, two solder masks, one or two silkscreens, two paste masks, and a board outline. Missing any one of these files will trigger a hold.
NC drill files in Excellon format are the second essential component. These files define every hole in your board — through-holes, vias, component mounting holes, and any slots or routed features. If your design includes blind or buried vias, you need separate drill files for each drill span, clearly labeled with the layer pairs they connect. A six-layer board with blind vias from layers one to two and layers five to six, plus through-hole vias from one to six, requires three separate drill files. Confusing these or combining them into a single file is a common source of manufacturing errors that can result in scrapped panels.
The fabrication drawing is, in our professional opinion, the single most important file in the package — and the one most frequently omitted or incomplete. We discuss this file in detail in its own section below and in our dedicated fab drawing checklist, but the essential point is this: the fabrication drawing is where you communicate everything that the Gerber data cannot. Material type, stackup specification, surface finish, copper weight, board thickness, impedance requirements, special tolerances, and any non-standard processes are all conveyed through the fab drawing. Without it, we are guessing — and we will not guess with your boards.
Stackup requirements deserve special mention, even when included in the fab drawing. If your design has controlled impedance requirements or specific dielectric material preferences, providing a dedicated stackup document dramatically accelerates our engineering review. Even a sketch showing your target layer order, copper weights, and dielectric thicknesses gives our engineers a starting point. We regularly receive designs where the only stackup information is "FR-4, 1.6mm," which tells us almost nothing about how to distribute the dielectric thickness across a multilayer construction. Our article on reading and specifying PCB stackup drawings covers this topic in depth.
The IPC-D-356 netlist file is the final component that separates a good file package from a complete one. This file defines the electrical connectivity of your board — which pads should be connected, which nets exist, and what the expected continuity should be after fabrication. We use this file to program our flying probe and bed-of-nails electrical test fixtures. Without it, we can only perform a basic continuity check against the Gerber-derived netlist, which is less reliable and cannot catch certain classes of design errors. Including the IPC-D-356 file does not add any effort on your end — every major EDA tool can generate it in seconds — but it significantly improves the quality of your final boards.
To summarize what is truly mandatory versus what is strongly recommended: copper layers, solder masks, silkscreen, board outline, NC drill files, and a fabrication drawing with material and finish specifications are non-negotiable. Paste mask files, the IPC-D-356 netlist, and a dedicated stackup document are strongly recommended and will accelerate your order. Assembly drawings and pick-and-place files are needed only if you are ordering turnkey assembly.
Gerber File Details Your Manufacturer Actually Checks
Beyond verifying that every required layer is present, our CAM engineers perform several detailed checks on your Gerber files that most designers never think about. Understanding these checks will help you catch problems before they reach our facility.
Layer naming conventions matter far more than most designers realize. When your files arrive with names like "PCB_Project_v3_final_FINAL2_TopCopper.gbr," our CAM software cannot auto-detect the layer type, and our engineers must open the file, visually inspect the geometry, and manually assign it. Worse, when similar names are used inconsistently across revisions or when a zip file contains both "TopCopper.gbr" and "Top_Copper_rev2.gbr," we have no reliable way to know which is current without asking you. The simplest approach is to use the standardized extensions that your EDA tool generates by default — .GTL, .GBL, .GTS, .GBS, .GTO, .GBO for Gerber files, and .DRL or .XLN for drill files — and to never include more than one version of any file in your submission.
Aperture list consistency is checked automatically during import. In the RS-274X format, aperture definitions are embedded in the file header, so this is rarely an issue. However, we still occasionally receive files where the aperture definitions in the header do not match the aperture calls in the body, usually as a result of manual editing or file corruption during transfer. If our import process flags aperture inconsistencies, we must put your order on hold to verify the correct data.
Solder mask openings versus pad sizes represent one of the most common geometric issues we encounter. The standard solder mask expansion — the amount by which the mask opening exceeds the pad — is typically 2 to 3 mils per side for standard surface-mount pads. When we see a file where the mask openings exactly equal the pad sizes (zero expansion) or where the mask openings are smaller than the pads (negative expansion), we flag it immediately. Sometimes this is intentional, as in the case of solder mask-defined pads for BGA components, but more often it is a configuration error in the EDA tool's design rules. In either case, we need confirmation from you before proceeding.
The paste mask file is a separate file from the solder mask, and confusing the two is a surprisingly common mistake. The solder mask defines the areas of the board where the green (or other color) coating is removed to expose copper for soldering. The paste mask defines the stencil openings for solder paste application during assembly. They look similar at a glance, but the paste mask typically has reduced openings (especially for fine-pitch components) and may include modifications like home-plate or window-pane patterns for thermal pads. If you send the solder mask file labeled as the paste mask, or vice versa, the assembly process will fail. In our facility, we catch this during the CAM review by overlaying both files and checking for the expected dimensional differences, but this check takes time and delays your order if corrections are needed.
The question of panelized versus single-board Gerbers comes up frequently. Unless you have specific panelization requirements — custom panel dimensions, particular arrangements for flex or rigid-flex boards, or fiducial placement preferences — you should send single-board Gerber data and let your manufacturer handle panelization. Our panel engineering team optimizes panel utilization to minimize waste, which often results in lower per-board cost than a customer-specified panel layout. If you do need to control the panelization, send both the single-board Gerbers and your panel drawing, and include clear notes about breakaway tab locations, V-score lines, and any keep-out areas for tooling holes.
The Fabrication Drawing — The Most Underrated File in Your Package
If there is one message we could send to every PCB designer in the world, it would be this: the fabrication drawing is not optional. It is the single most important communication tool between you and your manufacturer, and its absence is the number one cause of preventable delays in our facility. The Gerber files tell us the geometry of your board. The fabrication drawing tells us everything else.
A good fabrication drawing specifies the base material, typically by laminate designation such as FR-4 (with the specific grade, such as IT-180A or S1000-2, if you have a preference), or by performance requirement such as "mid-Tg halogen-free" if you are flexible on the exact brand. It includes the finished board thickness with tolerance, the copper weight for each layer (especially important when inner layers differ from outer layers), the surface finish (HASL, ENIG, OSP, immersion silver, or immersion tin), and any controlled impedance requirements with target values, reference layers, and tolerance bands.
What belongs on the fab drawing versus what the Gerber data already covers is a distinction worth understanding. The Gerber files define geometry: trace locations, pad shapes, solder mask openings, silkscreen graphics, and the board outline. The fabrication drawing defines process: what materials to use, how thick to make each layer, what finish to apply, what electrical performance to achieve, and what standards to inspect against. There is some overlap — the board outline appears in both, and drill information is in the NC files — but the fabrication drawing is the authoritative source for manufacturing intent. When the fab drawing and the Gerber data conflict (and they sometimes do), we follow the fab drawing and contact you to resolve the discrepancy.
Tolerances are an area where many designers either over-specify or under-specify, both of which cause problems. Over-specifying means calling out tolerances tighter than standard manufacturing capability, which forces us to either reject the requirement and ask for a revision or apply non-standard processes that increase cost and lead time. Under-specifying means providing no tolerance information at all, which forces us to apply our standard process tolerances — which may or may not meet your functional requirements. The best approach is to specify tolerances only where they matter for your design's function and to explicitly state "manufacturer's standard" for everything else. Board thickness, for example, carries an IPC standard tolerance of plus or minus ten percent, which is sufficient for the vast majority of applications. If your design requires tighter control — for a connector interface or a press-fit housing, for instance — call it out specifically and explain why, so we can plan accordingly.
Real examples from our production floor illustrate the impact of a well-prepared fabrication drawing. We recently processed a twelve-layer HDI design where the designer included a detailed fab drawing specifying Megtron 6 material, a precise stackup with impedance targets for four different trace geometries, ENIG finish with specific gold thickness requirements, and via fill with planarization for the microvias. Our CAM engineer completed the entire review, impedance modeling, and stackup finalization in forty-five minutes, and the order moved to production the same day. The following week, we received a comparable twelve-layer design with no fab drawing at all — just Gerber files and drill data in a zip file. It took three rounds of email over five business days to collect the missing information, during which the order could not proceed. Both designs were similar in complexity. The difference in lead time was entirely attributable to the file package.
The difference between a good fab drawing and one that causes three rounds of email often comes down to specificity. A fab note that reads "FR-4 material, ENIG finish, 1.6mm thick, 1oz copper" is adequate for a simple two-layer board. For anything more complex, we need more detail: which FR-4 grade, what Tg rating, what impedance targets (with the specific layers and trace widths), whether the 1oz copper is on all layers or just the outer layers, and whether "1.6mm" includes or excludes the surface finish thickness. These may seem like minor details, but each unspecified parameter generates a question, and each question adds time.
Common File Mistakes by EDA Tool
Every EDA tool has its own export workflow, default settings, and quirks that can introduce errors into your manufacturing files. At our facility, we see patterns that repeat predictably based on the design tool used, and knowing these tool-specific pitfalls can help you avoid the most common traps.
KiCad users encounter three recurring issues. The first is drill file format settings. KiCad's plot dialog offers multiple drill file formats and unit systems, and the default settings do not always produce files that align perfectly with the Gerber output. Specifically, if your Gerber files are generated in metric units but your drill file is exported in imperial (or vice versa), the hole locations will not register correctly with the pad locations when we import them. Always verify that your drill file units match your Gerber units. The second issue is the missing Edge.Cuts layer. KiCad uses a dedicated layer called Edge.Cuts for the board outline, and some designers forget to include it in their Gerber export or accidentally export the User.Comments layer instead. Without the correct board outline, we cannot determine the board dimensions or the routing path for depanelization. The third issue is a general metric-versus-imperial confusion that manifests in various ways — coordinate offsets, aperture sizes, or grid alignments that do not match between files.
Altium Designer produces generally clean output, but two issues appear repeatedly. The ODB++ export from Altium occasionally includes layer mapping errors, particularly when the designer has renamed layers from Altium's defaults or when the design uses non-standard layer configurations. If you export ODB++ from Altium, verify the layer mapping in the export dialog before generating the output, and include a standard Gerber set as backup. The second issue is layer naming. Altium allows complete freedom in layer naming, and designers often use project-specific names like "PowerPlane_3V3" or "Signal_HighSpeed_1" that, while meaningful within the design environment, do not correspond to any standard naming convention that CAM software can auto-detect. A simple readme file listing the layer names and their physical order in the stackup eliminates this ambiguity entirely.
Eagle users must contend with a legacy issue that persists in older versions and older tutorial workflows: the default Gerber output format in some Eagle configurations is RS-274D, the obsolete format that requires a separate aperture file. Modern Eagle versions default to RS-274X, but if you are following an older tutorial or using a legacy CAM processor job, you may inadvertently generate 274D output. Always verify that your export settings specify "RS-274X" and that the aperture definitions are embedded in the file rather than in a separate .APR or .WHE file.
OrCAD and Allegro present unique challenges due to their complex naming conventions and the way they handle multi-board panels. Allegro's default Gerber output uses long, descriptive filenames that often include the full layer name, the date, and other metadata, resulting in names like "design_top_copper_20260905.art" that can confuse automated import routines. More significantly, when designers export panelized designs from Allegro, the resulting Gerber files sometimes contain both the panel outline and the individual board outlines, leading to ambiguity about which outline defines the manufacturing boundary. Clear documentation in your fab drawing resolves this, but the files themselves can cause confusion without it.
Across all EDA tools, the two most universal mistakes are sending the wrong revision and packaging files in a way that creates ambiguity. Sending the wrong revision happens more often than anyone wants to admit — a designer updates the layout, regenerates one or two Gerber files, but forgets to regenerate the entire set, resulting in a package where the copper layers reflect revision C but the solder mask and drill files are still from revision B. The safest practice is to always regenerate the complete file set from scratch for every submission, delete the output directory before export, and include a version identifier in the zip file name. As for packaging, one zip file with one flat directory containing all files is ideal. Nested zip files, duplicate directories, files scattered across subdirectories, or "old" and "new" folders within the same archive all invite confusion.
IPC-2581 and ODB++ — When Smart Formats Actually Help
The Gerber format, for all its ubiquity, is fundamentally a geometry format. It describes shapes on layers. It does not inherently carry information about netlist connectivity, component placement, material requirements, stackup definitions, or manufacturing process parameters. Two newer formats — IPC-2581 and ODB++ — were designed to address these limitations by packaging all of that intelligence into a single, structured data set. For a detailed comparison, see our article on IPC-2581 versus Gerber.
IPC-2581 is an open, XML-based standard that encapsulates the complete board definition in a single file. It includes the layer geometry (equivalent to Gerber data), the netlist (equivalent to the IPC-D-356 file), the stackup definition (equivalent to the fabrication drawing's stackup section), component placement data (equivalent to a pick-and-place file), and bill-of-materials information. In theory, a single IPC-2581 file replaces the entire traditional file package. ODB++ is a similar concept developed by Mentor Graphics (now Siemens) that uses a directory structure rather than a single file, but carries comparable information density.
The practical benefit of these formats is significant when they work. Because the netlist is embedded, our CAM software can perform a true design-versus-netlist verification during import, catching shorts and opens that might not be apparent from geometric inspection alone. Because the stackup definition is included, our engineers can skip the back-and-forth about material and layer construction. Because component data is present, the transition from bare board fabrication to assembly is seamless, with no additional file exchange required.
The caveat is that not every manufacturer's CAM system can fully utilize these formats. At AtlasPCB, our toolchain supports both IPC-2581 and ODB++ import, and we encourage their use. However, we have seen cases where the IPC-2581 output from a particular EDA version contains formatting inconsistencies that our parser cannot resolve, or where the ODB++ export omits certain layer types that were present in the original design. For this reason, our standing recommendation is to include your smart format file (IPC-2581 or ODB++) as the primary data source but to always include a complete Gerber and Excellon drill set as backup. This dual-submission approach takes only a few extra minutes and provides a reliable fallback if any import issue arises with the smart format.
The practical impact on turnaround time is measurable. Orders submitted with a well-formed IPC-2581 or ODB++ file package, accompanied by a Gerber backup, average roughly twenty percent fewer engineering questions during CAM review compared to Gerber-only submissions. That translates directly to faster throughput and fewer delays. If your EDA tool supports these formats — and Altium, Cadence, Siemens Xpedition, and recent versions of KiCad all do to varying degrees — the small investment of time in learning the export workflow pays for itself on the first order.
A Manufacturer's Pre-Submission Checklist
After years of processing file packages ranging from immaculate to incomprehensible, our engineering team has distilled the ideal submission into a ten-point checklist. This is, quite literally, the manufacturer's wishlist — the ten things that, if every designer did them, would eliminate the vast majority of delays we see.
First, verify that your Gerber set is complete. Open every file in a Gerber viewer (GerbView, KiCad's viewer, or any free alternative) and confirm that every copper layer, both solder masks, at least one silkscreen, both paste masks, and the board outline are present and visually correct. Do not trust the export log alone — actually look at the files.
Second, confirm that your drill files match your Gerber data. Load both the Gerber files and the drill files into the same viewer session and verify that holes align with pads. Check the unit system — if your Gerbers are in millimeters, your drill files should be in millimeters. Verify that you have separate drill files for each drill span if your design includes blind or buried vias.
Third, include a fabrication drawing or a comprehensive set of fabrication notes. At minimum, specify the material type, board thickness, copper weight for each layer, surface finish, and any impedance requirements. If your design is straightforward, a text file with these parameters is acceptable. For anything above four layers or with controlled impedance, a proper drawing is strongly recommended.
Fourth, include your stackup requirements. Even if they are also in the fab drawing, a dedicated stackup document or table that lists each layer, its material, its thickness target, and the associated impedance specifications (if any) dramatically accelerates our engineering review.
Fifth, include the IPC-D-356 netlist. This takes seconds to generate from any EDA tool and enables us to perform comprehensive electrical testing on your finished boards.
Sixth, name your files using standard conventions. Use the default extensions from your EDA tool, or adopt a consistent naming scheme that identifies the layer type unambiguously. Include a readme file if your naming is non-standard.
Seventh, remove all old revisions from your submission. Your zip file should contain exactly one version of each file. If you need to reference a previous revision, note it in your fabrication drawing or cover email, but do not include the old files in the same package.
Eighth, package everything in a single zip file with a flat directory structure. Do not nest zip files within zip files. Do not scatter files across multiple subdirectories. One folder, all files, clearly named. Name the zip file with your project name and revision identifier: "ProjectName_RevC_20260906.zip" is ideal.
Ninth, label your revision explicitly. Include the revision identifier in the zip file name, in the fabrication drawing, and ideally in the Gerber title block. When we receive a file package, we need to know with certainty which revision it represents, especially if this is not your first submission for this design.
Tenth, send the files once, to one point of contact, through one channel. Do not send partial updates via email while the full package is uploading through the web portal. Do not send a correction to the sales team and the original to the engineering queue. One complete package, one submission, one channel. If you discover an error after submission, send a complete replacement package labeled as the new revision — not a single corrected file intended to be swapped into the original set.
These ten practices are not burdensome. Most of them take less than a minute. Together, they represent the difference between an order that flows through our facility without interruption and one that languishes in engineering hold while your lead time quietly extends.
The PCB design file handoff is not glamorous engineering work. It does not involve clever circuit design or elegant layout techniques. But it is the bridge between your design intent and the physical boards that arrive at your door, and the quality of that bridge determines whether you receive your boards on time, built to specification, and ready for assembly — or whether you spend the next week answering emails about missing files. At AtlasPCB, we have seen both outcomes thousands of times, and the deciding factor is almost always the same: a complete file package, submitted correctly, with clear documentation of your manufacturing intent.
Take the ten minutes to prepare your files properly. Your manufacturer — and your project schedule — will thank you.
Originally published on AtlasPCB Engineering Blog. We manufacture multilayer PCBs with full DFM review, impedance simulation, and stackup optimization for high-speed, RF, and HDI applications.
Top comments (0)