Originally published on AtlasPCB Engineering Blog
Designing an RF circuit board that performs to specification requires understanding the interaction between electromagnetic requirements and PCB fabrication capabilities. The material you select, the stackup you specify, and the manufacturing tolerances you call out determine whether your RF design works in production — or works only in simulation.
This guide addresses RF circuit board fabrication from the perspective of a PCB manufacturer who builds hundreds of RF designs monthly across frequency ranges from 1 GHz to 77 GHz. The focus is on practical fabrication constraints that affect RF performance, not antenna theory or circuit design methodology.
Material Selection by Frequency Band
The single most impactful decision in RF circuit board design is substrate selection. Every other design parameter — trace width, copper weight, stackup geometry — follows from this choice.
Below 3 GHz: High-Performance FR-4
For applications operating below 3 GHz (WiFi 2.4 GHz, Bluetooth, sub-3GHz cellular), carefully selected FR-4 can deliver adequate RF performance at standard PCB pricing. The key is specifying the right grade.
Standard commodity FR-4 (Isola 370HR or equivalent) has a dissipation factor around 0.020 at 1 GHz. At 2.4 GHz, this translates to approximately 0.15 dB/cm insertion loss on a 50-ohm microstrip — acceptable for short transmission lines (under 5cm) in WiFi front-end designs.
The critical requirement is specifying Dk tolerance. Standard FR-4 production tolerances allow Dk variation of ±10%. For a 50-ohm microstrip on 8mil FR-4 at 2.4 GHz, this Dk variation produces ±5 ohms impedance variation — potentially pushing your design outside the ±10% impedance budget when combined with trace width and thickness tolerances.
Solution: specify "controlled Dk" FR-4 from your fabricator, which holds Dk within ±5% by incoming material testing and press-cycle SPC.
3-30 GHz: Rogers RO4000 Series
The Rogers RO4000 family dominates this frequency band for good reason: thermoset ceramic-filled laminates that process like FR-4 (no special handling, standard drilling, compatible with lead-free reflow) while delivering RF-grade dielectric performance.
RO4350B (Dk 3.48, Df 0.0037 at 10 GHz) is the default choice for most RF designs in this band. It provides predictable impedance modeling, consistent lot-to-lot Dk (±1.5% typical), and compatibility with standard FR-4 fabrication processes. We process more RO4350B than any other RF laminate — the supply chain is robust and lead times are predictable.
RO4003C (Dk 3.38, Df 0.0027 at 10 GHz) offers lower loss at a slight cost premium. Choose it when your link budget needs every fraction of a dB — typically in PA output matching networks, diplexer filter elements, or long transmission line runs.
The RO4000 family's major advantage over PTFE substrates is dimensional stability. PTFE substrates are soft and expand significantly during thermal processing. RO4350B/RO4003C behave mechanically like FR-4 — they machine cleanly, hold registration through lamination, and do not require special drill bit geometries.
Above 24 GHz: PTFE-Based Substrates
Millimeter-wave frequencies above 24 GHz demand ultra-low loss substrates where Df below 0.0015 is non-negotiable. At 60 GHz, even RO4350B's Df of 0.0037 produces insertion loss of 0.8 dB/cm — unacceptable for most antenna feed networks and beamforming distribution layers.
Rogers RO3003 (Dk 3.00, Df 0.0013 at 10 GHz, ceramic-filled PTFE) provides excellent loss performance with reasonable dimensional stability for a PTFE material. Its Dk of 3.0 also simplifies mmWave design calculations.
Taconic TLY-5 (Dk 2.20, Df 0.0009) offers the lowest loss in our material library but requires careful handling during fabrication. The low Dk means wider traces for 50 ohms (useful for manufacturing tolerance) but also larger circuit footprints.
PTFE substrate fabrication requires specific manufacturing accommodations: modified drill entry conditions to prevent hole wall smearing, plasma desmear instead of chemical permanganate (which attacks PTFE), and sodium naphthalenide or plasma surface treatment for copper adhesion. Not every PCB fabricator handles these correctly — verify your supplier's PTFE processing experience before committing.
Hybrid Stackup Design
Pure Rogers or PTFE construction for an entire multilayer board is expensive and often unnecessary. Most RF designs concentrate RF functionality on one or two layers while the remaining layers handle digital control, power distribution, and ground planes. Hybrid stackups place premium RF material only where needed.
Standard Hybrid Architecture
A typical 8-layer RF board might use:
- Layers 1-2: Rogers RO4350B (RF signal + ground)
- Layers 2-3 bonding: Rogers 4450F prepreg
- Layers 3-6: FR-4 core (digital signals + power)
- Layers 6-7 bonding: Rogers 4450F prepreg
- Layers 7-8: Rogers RO4350B (RF signal + ground)
This provides RF-grade performance on the outer layers while using cost-effective FR-4 for the digital/power core. Cost reduction versus all-Rogers: typically 40-60%.
Bonding Layer Selection
The bonding material between dissimilar substrates is critical and often overlooked. Requirements:
- Compatible processing temperature — must flow and cure at a temperature both substrates tolerate
- Dk consistency — affects impedance on adjacent RF traces
- Thickness control — directly affects impedance calculation accuracy
- Adhesion — must bond reliably to both Rogers/PTFE and FR-4 surfaces
Rogers 4450F (Dk 3.54, Df 0.004) is our standard bonding prepreg for RO4350B/FR-4 hybrids. For PTFE hybrids, Taconic FastRise FR-27 (Dk 2.7, Df 0.002) or thermoplastic bonding films provide better Dk matching to the PTFE substrate.
Hybrid Registration Challenges
Dissimilar materials expand differently during lamination. Rogers RO4350B has a CTE(xy) of 11 ppm/°C while FR-4 is 14-16 ppm/°C. Over a 500mm panel dimension and 150°C temperature rise during lamination, this produces 0.75-1.25mm differential expansion.
Our process compensates with artwork scaling factors specific to each material pair. The inner-layer artwork for Rogers layers is scaled differently from FR-4 layers to ensure registration convergence at room temperature after press. This is one reason RF hybrid boards require an experienced fabricator — the scaling factors are developed empirically through production lots, not calculated from datasheet values alone.
Copper Roughness and Skin Effect
At frequencies above 5-10 GHz, conductor loss begins to dominate over dielectric loss. The mechanism is skin effect combined with surface roughness.
Current at 10 GHz penetrates only 0.66μm into the conductor surface. If that surface has roughness peaks of 5-8μm (standard electrodeposited copper), the current must follow the contours of those peaks — effectively traveling a longer path. This increases conductor loss by 30-80% compared to a perfectly smooth surface.
Foil Options
| Foil Type | Typical Rz (μm) | Application |
|---|---|---|
| Standard ED | 5-8 | Below 3 GHz |
| RTF (Reverse Treated) | 3-5 | 3-10 GHz |
| VLP (Very Low Profile) | 1.5-2.5 | 10-40 GHz |
| HVLP (Hyper VLP) | 0.8-1.5 | 40+ GHz |
The trade-off is adhesion. Rougher copper bonds better to the dielectric through mechanical anchoring. VLP and HVLP foils rely more on chemical bonding (oxide or silane treatments), making them more sensitive to processing conditions. Specify the foil grade on your fabrication drawing — do not leave it to the fabricator's default selection.
Roughness Impact on Impedance
Copper roughness also affects impedance modeling. Standard impedance calculators assume smooth conductors. For VLP foil on RO4350B at 28 GHz, the effective Dk "seen" by the electromagnetic field is approximately 3-5% higher than the laminate Dk alone, because the field penetrates into the roughness valleys filled with dielectric material. Advanced field solvers (like Polar Si9000 with Huray roughness model) account for this; simpler tools do not.
At AtlasPCB, our engineering review includes Huray-model impedance simulation for all RF boards above 10 GHz. We verify that the as-built impedance (accounting for actual foil roughness) meets your target — not just the theoretical smooth-conductor value.
Manufacturing Tolerances for RF Performance
RF circuit boards are more sensitive to manufacturing variation than digital designs. Small fabrication tolerances that digital signals ignore can shift RF matching networks or filter passbands significantly.
Dielectric Thickness
A 50-ohm microstrip on 8mil RO4350B requires trace width of approximately 17mil. If the dielectric thickness varies by ±1mil (12.5%), the impedance shifts by approximately ±3 ohms — consuming most of your ±8% impedance budget before considering trace width variation.
Standard RO4350B thickness tolerance is ±0.5mil on pressed panels. For critical RF layers, we can hold ±0.3mil through incoming material selection and press-cycle monitoring. Specify your tolerance requirement on the fabrication drawing; do not assume the standard is adequate.
Trace Width and Edge Definition
Standard LDI (Laser Direct Imaging) achieves ±0.5mil trace width tolerance. For RF microstrip and stripline, this combines with dielectric thickness tolerance to determine final impedance spread.
Edge definition (trace sidewall profile) also matters at mmWave frequencies. An ideal rectangular cross-section is assumed in impedance calculations, but real traces have trapezoidal profiles due to etching chemistry. The etch factor (ratio of undercut to copper thickness) typically produces 65-75° sidewall angles for 1oz copper. This predictably lowers impedance by 1-2 ohms compared to rectangular-profile calculations — your fabricator's impedance model should account for this.
Plating Thickness on RF Traces
Final surface plating (ENIG, immersion silver, or OSP) adds material to trace surfaces and affects both impedance and insertion loss. ENIG adds approximately 3-5μm of nickel plus 0.05-0.1μm of gold. The nickel layer has significantly higher resistivity than copper (6.84 μΩ·cm versus 1.72 μΩ·cm) and becomes the primary current-carrying surface at frequencies where skin depth is less than the nickel thickness.
For RF circuits above 10 GHz: specify immersion silver or OSP rather than ENIG on RF trace areas. If ENIG is required for BGA solderability on the same layer, use selective plating — ENIG on pad areas, bare copper or immersion silver on transmission lines. This is a standard process at AtlasPCB for hybrid digital/RF boards.
Impedance Control and Verification
Every RF circuit board from our facility includes impedance-controlled fabrication and TDR (Time Domain Reflectometry) verification. The process:
Pre-production simulation — Si9000 or equivalent field solver calculates required trace geometry for target impedance, using actual material Dk data and the Huray roughness model.
Artwork compensation — Trace widths adjusted based on expected etch behavior for the specific copper weight, photoresist type, and etch chemistry.
In-process monitoring — First-panel etch verification measures actual trace width before continuing the lot.
Final TDR measurement — Production panels include impedance coupons (same trace geometry as design, same layer, same location on panel) measured by TDR to verify ±8% or tighter tolerance.
For mmWave designs above 40 GHz, we also offer VNA (Vector Network Analyzer) characterization of transmission line test structures to verify insertion loss per unit length — confirming that material selection, copper roughness, and processing have achieved the expected performance.
Design for RF Manufacturability
Based on our experience fabricating RF circuit boards across frequency bands from 1 to 77 GHz, several design practices consistently improve first-pass success:
Include RF test structures on your panel. Beyond impedance coupons, include a calibrated transmission line (50mm minimum length) for insertion loss measurement. This gives you production-verified loss data, not just material datasheet values.
Specify ground via spacing for mode suppression. Coplanar waveguide structures and microstrip-to-stripline transitions need ground via fencing. For reliable mode suppression below 40 GHz, space ground vias at λ/10 or closer (approximately 750μm at 40 GHz). Call this out explicitly in your fabrication notes.
Account for board-level assembly effects. Solder mask over transmission lines adds approximately 0.1-0.2 dB/cm insertion loss at 28 GHz. Either specify solder mask relief over RF traces or include the mask's Dk/Df in your simulation. Mask Dk varies by manufacturer (typically 3.5-4.5); ask your fabricator for the specific value.
Use consistent reference planes. RF traces should reference a continuous ground plane on the immediately adjacent layer. Splits in the reference plane for power distribution create slot antenna effects and impedance discontinuities that are nearly impossible to fix after fabrication.
Conclusion
RF circuit board fabrication is a collaboration between the RF designer and the PCB manufacturer. The designer specifies performance requirements; the manufacturer translates those into fabrication parameters and verifies achievement through testing. This collaboration works best when both parties understand each other's constraints.
At AtlasPCB, every RF board receives engineering review by staff familiar with high-frequency fabrication. We verify material selection against your frequency band, recommend hybrid stackup architectures that optimize cost, and confirm impedance and loss targets are achievable with our manufacturing processes before committing to production. The result is RF circuit boards that perform to specification on the first build — not the third.
Building RF hardware? AtlasPCB fabricates RF circuit boards on Rogers, PTFE, and hybrid stackups from prototype through production — with engineering review on every order to verify material selection and impedance achievability.
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