AI and PCB Design: A Complicated Relationship That's Finally Settling

AI and PCB design have had a complicated couple of years.

First came the pitch: describe a board in a sentence, get Gerbers back. Then came the backlash, mostly from people who design boards for a living, and they had a point. A language model can recite everything about trace widths and clearances. It cannot measure either. Ask one to check a board and it sounds just as sure of itself whether the board is right or wrong.

What is settling now is less exciting than the pitch and more useful than the backlash: a division of labour. AI drafts and edits. Exact checks measure. You decide whether the board is the one you meant. Each side has stopped being asked to do the other's job.

I work on PCBEditor, a browser PCB tool built around that split, so this is one view from inside it. Below is how the split looks on a real board, and a checklist for the part that is still yours.

The short answer

You can verify much of a PCB automatically: design-rule violations, unrouted nets, overlapping parts, shorted connector pins, wrong enable levels and miswired USB connectors are all checked exactly. What no check catches yet is a circuit that is electrically valid but not what you meant, such as a reset button wired to a spare GPIO. That still needs a datasheet review.

The backlash had a point

The skeptics' real objection was never "AI can't learn electronics". It was that reciting a rule and applying it are different things. A model can explain why USB D+ and D- should run side by side. It cannot look at a layout and tell you that, on this board, they run 600 µm apart.

We saw the same thing when we asked a model to act as a rule checker on a board summary: it reported different error counts for the same board on different runs. A count that changes while the board doesn't is not a check.

So the first part of the settlement is to take counting away from the model.

Job 1: exact checks measure

A design-rule check verifies geometry against manufacturing limits: clearances, widths, drills, edges. A design review also asks whether the circuit is right: connections, pin functions, supply levels and whether the board matches what was asked for. A board can pass DRC and still not work.

So a useful AI PCB review checks more than geometry. PCBEditor's Review my design checks four groups and sorts every finding into "must fix" and "worth a look":

• Design rules. Clearance between copper, trace width, annular ring, drill-to-drill and hole-to-copper spacing, board-edge margin, unrouted connections, and parts whose courtyards overlap (two parts on one spot cannot both be soldered, so that one counts as must-fix).
• Electrical faults that pass a clean DRC. The final netlist is audited for mistakes geometry cannot see: connector contacts shorted together, enable pins held at the wrong level, a USB port that back-feeds the supply, a USB connector whose contacts carry the wrong signals, socket rows that do not match the module plugged into them, and nets that reach only one pin.
• Signal and power details. Pairs such as USB D+ and D- that are not routed side by side, ground areas on different layers that are not stitched together, and a summary of every power path from its source to the parts it feeds.
• Your request. An AI model compares what you asked for with the parts on the board and names any requested function that has no part, such as a missing regulator or sensor. This is the one judgement in the report, and it is shown separately from the checks.

Each rule or electrical finding comes with a fixed explanation of why it matters and what to do, and the example that triggered it. Those findings and their counts come from the checkers, not from a model, so the same board gives the same answer every time.

Review my design on an ESP32-C3 sensor board, 18 October 2026. The counts come from the design-rule and electrical checks.

On this board the review found a real problem we had noticed by eye: the regulator U3 and capacitor C6 sit so close that their courtyards overlap, so one of them cannot be placed. It also flagged the USB pair, which was routed 600 µm apart where it should run side by side, and a leftover net from an earlier edit that reaches a single pin. Those are exactly the findings a model is bad at and a checker is good at.

Job 2: AI drafts and edits

This is where language models really help: reading what you asked for, choosing parts, drafting the connections, and turning a plain-English request into a change on the board. In the review, AI does two things: the comparison with your request, and the fixes you ask for.

Fixing works the way asking does. Switch to Build and describe the change, naming the parts and pins ("move C6 away from U3"), or use Fix DRC with AI for rule violations. Then review again, because every edit can move something else.

Job 3: you judge what the board is for

This part has not moved to software, which is why the relationship is settling rather than settled. Checks prove what they check. A board that matches its own netlist perfectly can still have the wrong netlist.

Here is the kind of thing only you will catch, from one of our own test boards in October. A prompt asks for an ESP32-C3 board with reset and boot buttons. BOOT comes out right, on GPIO9. The "reset button" comes out as a user button on GPIO4, with nothing on EN. That is a perfectly valid circuit, because a button from a GPIO to ground is exactly what a user button looks like, so no check objects. It just isn't what you asked for.

The datasheet settles it. Espressif's schematic checklist says CHIP_EN enables the chip when high and resets it when low, must not be left floating, and usually gets 10 kΩ and 1 µF. So the review step is: find EN, check the pull-up and the capacitor, and check that the reset button pulls that net low. The fix is one sentence asking for SW1 to move to EN, keeping the 10 kΩ pull-up and 1 µF capacitor.

Layout context is the other place you are needed. A rule check has no idea which end of a module is the antenna. Espressif's layout guide wants a module's PCB antenna outside the base board, or at least its feed point as close to the board edge as possible, with a clearance area around it.

What is still open

Settling is not the same as solved. Three things still need a person:

• Intent. A circuit that is electrically valid but not what you meant. Only a review against the datasheets finds it.
• Layout context that isn't a rule. Antenna keepouts, which way a connector faces, room for the plug.
• Dense, fine-pitch boards. A 0.4 mm-pitch QFN with flash and USB on four layers still needs a person to guide placement.

How to review an AI-generated PCB

Run the design-rule and electrical checks first, then read the schematic against the datasheets: power from the connector to every chip, every reset, boot and enable pin, special-function pins such as I²C and USB, supply voltages against part ratings, and required capacitors. Then check the layout for antenna keepouts and connector orientation, and re-check after every edit.

In the editor, that is five steps:

1. Open the board. Generate it from a description, draw it, or import a KiCad board, then switch to the PCB view.
2. Press Review my design. It runs the checks and changes nothing.
3. Read must-fix first. These stop the board from being built or working. "Worth a look" items are judgement calls.
4. Fix in plain English. Describe the change, naming the parts and pins.
5. Review again. Every edit can move something else, so run the review after each one.

Then work through the rest by hand.

Schematic

• Power: every rail from the connector to each chip, input protection, regulator input range and dropout.
• Ratings: every supply against every part's absolute maximum, and series parts (diodes, fuses) against the load current.
• Straps: reset, boot and enable pins, each with its pull-up or pull-down and capacitor.
• Special-function pins: I²C, SPI, UART, USB, ADC, crystal and programming header on the pins that have that hardware.
• Function: every output traced to the load it drives, and every timing or current-setting value recomputed from the datasheet formula.
• Required parts: decoupling and bulk capacitors at the datasheet values, not just present.
• Connectors: pinout against the cable or module, including unused contacts such as a USB ID pin.
• Parts list: every part number matches its value and its land pattern.

Layout

• Antennas at the board edge with their keepout clear of copper on every layer.
• Connectors on the edge, facing out, with room for the plug.
• Decoupling capacitors next to the pins they serve; differential pairs routed together.
• Design-rule check against your fab's rules, then the Gerbers opened in a viewer.

Can a chat assistant do the review?

A general chat assistant is a good second pair of eyes on a schematic image or a netlist: it will spot a missing pull-up, a capacitor without a ground, or a part used outside its typical circuit, and it explains datasheet details well. It is not a checker. It cannot measure a clearance, it does not trace every pin, and as above, it can report different error counts for the same board on different runs. That is why Review my design gets its numbers from the checkers and uses AI only to explain and fix.

If you use one, ask narrow questions you can verify, not "is this correct?". Give it the netlist and the datasheet's pin table and ask "which net drives EN, and what else is on it?". Then check the answer against the datasheet yourself.

Where it lands

The relationship isn't settling because AI got perfect at electronics. It is settling because nobody needs it to be. The AI drafts and edits, the checks measure and give the same answer every run, and you decide whether the board is the one you meant. That last job is still the one that decides whether the board works, and it is the one the checklist above is for.

The full guide, with the review result and the checklist, is at pcbeditor.com/ai-pcb-review.