Espressif's current ESP32-P4 parts end in X, the development boards are now called P4X, and a board laid out for the first P4 silicon does not simply take the new chip. Three parts of the circuit changed between chip revision v1.x and v3.x, and the firmware has to be rebuilt. Here is each change with Espressif's values, drawn in KiCad 9.
Short answer: "P4X" is the ESP32-P4 at chip revision v3.x: Espressif's datasheet lists ESP32-P4NRW16X and ESP32-P4NRW32X, both v3.x, and its P4X development boards carry v3.1 or later. On the PCB, three things change from v1.x: pin 54 goes from NC to VDD_HP_1 and needs the 1.1 V core supply with a 0.1 µF capacitor; the external DC/DC's feedback gets two 499 kΩ resistors and a 22 pF capacitor; and the 1 MΩ pull-down on USB_DP is no longer needed. Firmware must be built with ESP-IDF v5.5.3 or later (or v6.0) for v3.x.
What the X means
The ESP32-P4 datasheet (pre-release v0.7) now lists two parts, ESP32-P4NRW16X and ESP32-P4NRW32X, with 16 MB and 32 MB of PSRAM in the package, and gives both as chip revision v3.x. Espressif's chip revision v3.x user guide names the same two as its related products. The development boards follow: Espressif's documentation gives one difference between the ESP32-P4X-Function-EV-Board and the ESP32-P4-Function-EV-Board, the main chip, which is chip revision v3.1 or later on the P4X board.
What the X itself stands for, Espressif does not write down. The datasheet's nomenclature explains every other letter (N for normal-temperature PSRAM, R for PSRAM, W for 16-line 1.8 V PSRAM, the number for the PSRAM size in MB) and stops there. The same datasheet also says that several chip revisions can be on the market under the same part number. So read the X as "the v3.x part" when you order, and confirm the revision on the chip itself.
The three board changes at a glance
| What | v1.0 / v1.3 | v3.0 and later | What to do |
|---|---|---|---|
| Pin 54 | NC (no connection) | VDD_HP_1, a digital supply pin (0.99 to 1.3 V) | Feed it from ESP_VDD_HP; Espressif uses a 0 Ω (R39) and 0.1 µF (C39) at the pin |
| DC/DC feedback (FB_DCDC) | R1, R2 and C2 as empty pads | R1 = R2 = 499 kΩ, C2 = 22 pF across R1 | Fit all three; Espressif says they must be populated |
| 1 MΩ on USB_DP | Fitted, to stop a current surge on VDD_USBPHY when CHIP_PU goes low | Not needed (the fault is fixed) | Optional; you may keep it so one layout suits both |
| Firmware | ESP-IDF builds for v1.x | ESP-IDF v5.5.3 or later, or v6.0 or later, built for v3.x | Rebuild; one image cannot serve both revisions |
The DC/DC feedback: 499 kΩ, 499 kΩ, 22 pF
The P4's high-performance core does not run from your 3.3 V rail. Its four VDD_HP pins take 0.99 to 1.3 V (1.1 V typical) from an external step-down converter, and the chip controls that converter itself through two pins: EN_DCDC (pin 79) switches it on once the firmware starts, and FB_DCDC (pin 78) goes to the converter's feedback pin. Espressif's example is a TLV62569 with 4.7 µF in, a 2.2 µH inductor and 22 µF out.
On v1.x, the feedback resistors and capacitor were optional. Espressif's v1.x schematic shows R1, R2 and C2 as TBD(NC) with a note not to mount them by default, and the guidelines asked designers to keep the pads anyway.
On v3.0 and later, Espressif writes that the feedback resistor and feedback capacitor must be populated: R1 = 499 kΩ from the DC/DC output (ESP_VDD_HP) to FB_DCDC, R2 = 499 kΩ from FB_DCDC to ground, and C2 = 22 pF across R1. With its own TLV62569 values unchanged, that is the whole DC/DC difference. If you use another converter, pick it from Espressif's verified list (ETA3485, SY8088, RY3420, BL8028, LP3219 or TLV62569), take its input and inductor from its own datasheet, and place it close to the P4.
In download mode, or with no firmware, EN_DCDC is at 0; once the firmware starts, the P4 drives it, and in sleep it can use it to switch the supply off. Wire it straight to the converter's EN pin, as Espressif's reference schematic does.
Pin 54 becomes VDD_HP_1
On v1.0 and v1.3, pin 54 of the QFN104 package is NC. From v3.0 it is VDD_HP_1, one of the four high-performance supply pins: VDD_HP_0 is pin 26, VDD_HP_1 pin 54, VDD_HP_2 pin 76 and VDD_HP_3 pin 91. All four take the same ESP_VDD_HP rail.
Espressif's v3.0 reference schematic feeds pin 54 from ESP_VDD_HP through a 0 Ω resistor (R39) and puts a 0.1 µF capacitor (C39) right at the pin, the same 0.1 µF each VDD_HP pin gets; pin 26 also has the 10 µF bulk capacitor. On a layout, that means a trace or plane connection from the core supply to pin 54 and a decoupling capacitor beside it, at a pin that used to have nothing.
The 1 MΩ on USB_DP
On v1.0 and v1.3, Espressif adds a 1 MΩ pull-down on USB_DP to stop a large transient current on VDD_USBPHY when CHIP_PU is pulled low. In v3.0 and later that is fixed, and Espressif allows the 1 MΩ to stay for design compatibility. A related v1.x fix also goes away: on v1.0 and v1.3, VDD_USBPHY leaks current in low-power modes and Espressif recommends a MOSFET to switch it off. In v3.0 that is fixed too.
Will a v3.x chip work on my v1.x board?
Not without changes. Two of the three are part changes: fit R1, R2 and C2 on the pads Espressif told you to keep, and the 1 MΩ on USB_DP can stay. Pin 54 is the problem. A v1.x layout had no reason to route it, so on most boards the pad connects to nothing, and v3.x needs it on the core supply with a capacitor beside it. That is a layout change: plan a new board revision.
The datasheet allows several revisions under one part number. If your board is laid out for one revision only, check the manufacturing code on parts as they arrive, and on modules and development boards ask which chip revision is inside.
Which revision is on my board?
The manufacturing code line in the chip marking gives the revision. From Espressif's errata, chip revision identification:
| Chip revision | Manufacturing code |
|---|---|
| v1.0 | X C XX |
| v1.3 | X E XX |
| v3.0 | X F XX |
| v3.1 | X G XX |
| v3.2 | X H XX or X J XX |
In software the revision is in eFuse: the major number in EFUSE_RD_MAC_SPI_SYS_2_REG bits 23, 5 and 4, the minor number in bits 3 to 0. esptool reads it and prints the chip revision when it connects.
Firmware: ESP-IDF v5.5.3 and the revision option
Chip revision v3.x needs ESP-IDF v5.5.3 or later, or v6.0 or later. Those versions add one option to sdkconfig, CONFIG_ESP32P4_SELECTS_REV_LESS_V3: n, the default, builds for v3.x; y builds for v1.x. A project started on an in-between ESP-IDF version may still carry CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y, and then the firmware either fails to download to a v3.x chip or fails to boot after flashing. Set it to n and rebuild. Espressif is explicit that the two revisions cannot share one firmware image.
Drawing an ESP32-P4 in KiCad
KiCad 9.0.9's standard library has symbols for the ESP32-C3, ESP32-S2, ESP32-S3 and the PICO chips, and none for the ESP32-P4, so you will draw your own or bring one in. Build it from the current datasheet, not from a v1.x design:
- Pin 54 is
VDD_HP_1with the power-input pin type. A symbol made for v1.x marks it NC, and KiCad's electrical rule check says nothing about an unconnected NC pin, so the mistake survives until the board does not boot. - Give FB_DCDC and EN_DCDC their own nets to the converter's FB and EN pins. Neither goes to your 3.3 V rail.
- Put R1, R2 and C2 on the schematic with values, not as do-not-populate parts, and keep C39 beside pin 54 in the layout.
The two figures above were drawn that way: KiCad's own TLV62569DBV, resistor, capacitor and inductor symbols, Espressif's values and reference designators, and KiCad's DNP flag on the parts Espressif leaves unmounted.
The full guide, with Espressif's power checklist for the rest of a v3.x board (VDD_LDO, VDD_USBPHY, VDD_BAT, CHIP_PU timing) and the sources, is on pcbeditor.com.
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