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Dibyaprakash Pradhan
Dibyaprakash Pradhan

Posted on Originally published at pcbeditor.com AI-assisted

Via-in-Pad: The Space Saver That Quietly Drains Your Solder Joints

"Vias directly on SMD pads?" is one of the most-viewed PCB questions on Electrical Engineering Stack Exchange, and the answers there all say some version of "it depends". It does, but on one thing only: what happens to the hole.

The problem with an open hole

A plated hole is a capillary. During reflow, molten solder on the pad flows into the via and runs down the barrel. The joint above is left with less solder than the stencil gave it. On a big pad that's a weaker joint. On a small resistor or a fine-pitch lead it can be almost no joint at all, an intermittent connection you can't see.

Three views of one KiCad board: a 0.8 mm BGA with dog-bone fan-out, the same BGA with a via in every pad, and a QFN with nine thermal vias in its exposed pad
Dog-bone fan-out, via-in-pad and QFN thermal vias on one real board. A top view can't show the fill: the middle panel's vias must be filled and capped.

It also causes a strange, specific failure: tombstoning. Put a via in one pad of an 0402 resistor and not the other, and the two ends wet differently. The side that keeps its solder pulls the part upright. If your small parts stand on end, and only on certain pads, look for vias in those pads.

When via-in-pad is the right call

  • Fine-pitch BGAs. Between closely spaced balls there's no room for a via and a trace. The inner balls go down through vias in their pads.
  • Boxed-in pads. On dense packages some inner pads are surrounded by others with no path out on the top layer. A via in the pad is the only exit.
  • Thermal pads. The exposed pad under a QFN or power part is usually stitched to inner ground with an array of vias to carry heat. That's normal practice; keep drills small and follow the part's recommended land pattern.
  • Very short high-speed connections, where removing the trace between pad and via removes a little inductance.

What to tell the fab

IPC-4761 names seven ways to protect a via, Type I to Type VII. Tenting and plugging (Types I to IV) are for ordinary vias that aren't in a pad. For a via under a solder joint you want Type VII: filled and capped, often sold as VIPPO (via-in-pad plated over). The hole is filled, sanded flat and plated over, so the pad solders as if there were no hole.

It costs extra (fill, cure, planarise, plate) and sometimes adds lead time, and some budget fabs don't offer it. Check before you design around it, and write it in your fabrication notes so it isn't missed.

The decision in four lines

  1. Room for a via beside the pad on a short trace? Use that (a "dog-bone").
  2. Thermal pad under a QFN or power part? Thermal vias in the pad are normal; follow the land pattern.
  3. Fine-pitch BGA or a boxed-in pad? Via-in-pad, filled and capped, and tell the fab.
  4. Small passive or ordinary fine-pitch lead? Don't put an open via in it.

How we ended up dealing with it

The router in the AI PCB tool I work on escapes dense parts with ordinary vias wherever there's a path. We only added via-in-pad when a real board, a chip-down nRF52840 in a fine-pitch package, had pads that were completely boxed in: no amount of clever routing gets a trace out of a pad that has no gap next to it. The router now launches only those pads through a via in their own centre, picks the smallest via that fits, and in review mode it asks before doing so, because the moment a board has signal vias in pads, the fab order has to change too.

That's the general lesson: via-in-pad isn't a layout trick, it's a manufacturing decision. The guide with cross-section diagrams of the three options and the full IPC-4761 table is on pcbeditor.com.


Have you had a via-in-pad board come back with bad joints? I'd like to know whether it was the via, the fill spec, or the fab.

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