Via-in-pad (VIP) has become essential for modern BGA fanout, but getting the fabrication spec right is where many designs stumble. After reviewing hundreds of designs with VIP callout issues, here's the practical guide I wish existed when I first specified IPC-4761 Type VII.
The Problem VIP Solves
At 0.5mm BGA pitch and below, traditional dog-bone fanout physically cannot fit between pads for inner ball rows. Via-in-pad places the via directly in the component pad, eliminating the routing escape problem entirely.
But here's what catches engineers off guard: placing a via on a pad in your CAD tool does NOT communicate fill requirements to your fabricator. Without explicit VIP specifications in your fab drawing, you may receive boards with unfilled vias that wick solder during assembly.
The Spec Checklist
Before you send Gerbers to any fabricator, confirm these items exist in your fab drawing:
- Via drill size specified (typical: 0.1-0.3mm for VIP)
- Fill material called out (non-conductive epoxy or conductive copper epoxy)
- IPC-4761 classification stated (Type VII = filled + capped)
- Maximum dimple depth specified (standard: < 25um)
- Cap plating thickness noted (minimum 25um copper)
- VIP vias identified on drill drawing or dedicated layer
- Annular ring adequate for cap plating (minimum pad diameter = drill + 0.15mm)
IPC-4761 Type VII: What It Actually Means
IPC-4761 defines seven types of via protection. For BGA applications, you need Type VII specifically:
| Type | Description | For BGA? |
|---|---|---|
| I-IV | Tented/plugged (not planar) | No |
| V-VI | Filled (not fully planar) | Sometimes |
| VII | Filled, planarized, and cap-plated | Yes |
The Type VII process flow:
- Drill via (mechanical or laser)
- Plate through-hole copper (20-25um)
- Fill via with epoxy (vacuum/screen print)
- Cure epoxy (150-180°C)
- Planarize surface (ceramic brush or belt sander)
- Cap plate additional copper (25+ um over fill)
The result: a flat copper surface indistinguishable from surrounding pad copper.
Conductive vs Non-Conductive Fill
Non-conductive epoxy (standard): Use for signal vias under BGA. Lower cost, adequate for most applications. The barrel plating carries the current, not the fill.
Conductive fill (copper/silver epoxy): Use for thermal vias under QFN exposed pads, or power vias carrying >1A per via. 20-40% cost premium.
Common mistake: Specifying conductive fill for ALL vias "just in case." Only thermal and high-current power vias benefit.
The 4 Most Common DFM Failures
1. Insufficient Annular Ring
After fill and planarization, cap plating needs landing area. If your pad doesn't account for drill tolerance:
Rule: Min pad diameter = Drill + 0.15mm (mechanical) or + 0.10mm (laser)
For 0.5mm pitch BGA:
- Pad: 0.275mm
- Max drill: 0.275 - 0.15 = 0.125mm → laser via territory
2. No Explicit Fill Callout
Your CAD tool shows the via on the pad. The fabricator sees a drill hit. Without a note saying "fill and cap per IPC-4761 Type VII," you get unfilled vias.
3. Dimple Depth Unspecified
Without a dimple spec, you may get 50-75um concavity at via center. This causes uneven solder paste and voiding under BGA balls.
Specify: Maximum dimple 25um (15um for fine-pitch BGA <0.4mm).
4. Via Too Large for Reliable Fill
Vias >0.35mm diameter trap air bubbles during filling. Stick to:
- Laser (0.075-0.15mm): Excellent fill
- Small mechanical (0.15-0.25mm): Good fill
- Medium (0.25-0.35mm): Careful process control needed
- Large (>0.35mm): Avoid for VIP
Cost Impact
| Board Type | VIP Cost Adder |
|---|---|
| 4-layer, <50 VIP vias | +15-20% |
| 6-layer HDI, 100-300 vias | +20-30% |
| 8+ layer, full VIP | +25-35% |
Optimize by using VIP only where required (inner BGA rows) and dog-bone for outer rows where space permits.
Fab Drawing Template
Include this in your fabrication drawing:
VIA-IN-PAD REQUIREMENTS:
- Classification: IPC-4761 Type VII (Filled and Capped)
- Fill material: Non-conductive epoxy
- Applicable vias: All vias within BGA U1-U5 pad boundaries
- Maximum dimple (concavity): 25 um (1.0 mil)
- Maximum protrusion (convexity): 25 um (1.0 mil)
- Minimum cap plating thickness: 25 um
- Via fill void-free per IPC-6012 Class 3
Key Takeaways
- Always specify IPC-4761 Type VII explicitly — don't assume the fabricator will figure it out
- Non-conductive fill is standard; only use conductive for thermal/power vias
- Mind your annular ring math — it's the #1 source of VIP yield issues
- Dimple <25um is the critical acceptance criterion for BGA reliability
- Combine VIP with HDI processes for best cost efficiency
For a deeper dive into BGA fanout strategies and HDI via structures, check out our complete VIPPO design and manufacturing guide.
We've been fabricating VIP boards with both conductive and non-conductive fill for designs up to 5+N+5 HDI buildups. If you're working on a dense BGA design and want to discuss your via-in-pad approach, our engineering team can review your stackup.
What's your experience with VIP specs? Have you run into fill issues or dimple problems? Drop a comment below.
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